Merge branch 'master' of ssh://dryerzinia.io:/opt/git/Automation master
Merge branch 'master' of ssh://dryerzinia.io:/opt/git/Automation

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/Makefile
@@ -1,1 +1,114 @@
+#
+#  There exist several targets which are by default empty and which can be 
+#  used for execution of your targets. These targets are usually executed 
+#  before and after some main targets. They are: 
+#
+#     .build-pre:              called before 'build' target
+#     .build-post:             called after 'build' target
+#     .clean-pre:              called before 'clean' target
+#     .clean-post:             called after 'clean' target
+#     .clobber-pre:            called before 'clobber' target
+#     .clobber-post:           called after 'clobber' target
+#     .all-pre:                called before 'all' target
+#     .all-post:               called after 'all' target
+#     .help-pre:               called before 'help' target
+#     .help-post:              called after 'help' target
+#
+#  Targets beginning with '.' are not intended to be called on their own.
+#
+#  Main targets can be executed directly, and they are:
+#  
+#     build                    build a specific configuration
+#     clean                    remove built files from a configuration
+#     clobber                  remove all built files
+#     all                      build all configurations
+#     help                     print help mesage
+#  
+#  Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and
+#  .help-impl are implemented in nbproject/makefile-impl.mk.
+#
+#  Available make variables:
+#
+#     CND_BASEDIR                base directory for relative paths
+#     CND_DISTDIR                default top distribution directory (build artifacts)
+#     CND_BUILDDIR               default top build directory (object files, ...)
+#     CONF                       name of current configuration
+#     CND_ARTIFACT_DIR_${CONF}   directory of build artifact (current configuration)
+#     CND_ARTIFACT_NAME_${CONF}  name of build artifact (current configuration)
+#     CND_ARTIFACT_PATH_${CONF}  path to build artifact (current configuration)
+#     CND_PACKAGE_DIR_${CONF}    directory of package (current configuration)
+#     CND_PACKAGE_NAME_${CONF}   name of package (current configuration)
+#     CND_PACKAGE_PATH_${CONF}   path to package (current configuration)
+#
+# NOCDDL
 
+
+# Environment 
+MKDIR=mkdir
+CP=cp
+CCADMIN=CCadmin
+RANLIB=ranlib
+
+
+# build
+build: .build-post
+
+.build-pre:
+# Add your pre 'build' code here...
+
+.build-post: .build-impl
+# Add your post 'build' code here...
+
+
+# clean
+clean: .clean-post
+
+.clean-pre:
+# Add your pre 'clean' code here...
+# WARNING: the IDE does not call this target since it takes a long time to
+# simply run make. Instead, the IDE removes the configuration directories
+# under build and dist directly without calling make.
+# This target is left here so people can do a clean when running a clean
+# outside the IDE.
+
+.clean-post: .clean-impl
+# Add your post 'clean' code here...
+
+
+# clobber
+clobber: .clobber-post
+
+.clobber-pre:
+# Add your pre 'clobber' code here...
+
+.clobber-post: .clobber-impl
+# Add your post 'clobber' code here...
+
+
+# all
+all: .all-post
+
+.all-pre:
+# Add your pre 'all' code here...
+
+.all-post: .all-impl
+# Add your post 'all' code here...
+
+
+# help
+help: .help-post
+
+.help-pre:
+# Add your pre 'help' code here...
+
+.help-post: .help-impl
+# Add your post 'help' code here...
+
+
+
+# include project implementation makefile
+include nbproject/Makefile-impl.mk
+
+# include project make variables
+include nbproject/Makefile-variables.mk
+

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/funclist
@@ -1,1 +1,4 @@
-
+_main: CODE, 135 0 146
+__initialization: CODE, 130 0 2
+_isr: CODE, 4 0 125
+Total: 273

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/main.c
@@ -1,1 +1,233 @@
 
+#include <xc.h>
+
+// #pragma config statements should precede project file includes.
+// Use project enums instead of #define for ON and OFF.
+
+// CONFIG1
+#pragma config FOSC = INTOSC    // Oscillator Selection Bits (Internal HFINTOSC. I/O function on RA4 and RA5.)
+#pragma config WDTE = OFF       // Watchdog Timer Enable (WDT disabled)
+#pragma config PWRTE = OFF      // Power-up Timer Enable (PWRT disabled)
+#pragma config MCLRE = ON       // MCLR Pin Function Select (MCLR/VPP pin function is MCLR)
+#pragma config CP = OFF         // Flash Program Memory Code Protection (Program memory code protection is disabled)
+#pragma config BOREN = ON       // Brown-out Reset Enable (Brown-out Reset enabled)
+#pragma config CLKOUTEN = OFF   // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)
+
+// CONFIG2
+#pragma config WRT = OFF        // Flash Memory Self-Write Protection (Write protection off)
+#pragma config PPS1WAY = OFF    // Peripheral Pin Select one-way control (The PPSLOCK bit can be set and cleared repeatedly by software)
+#pragma config ZCDDIS = ON      // Zero-cross detect disable (Zero-cross detect circuit is disabled at POR)
+#pragma config PLLEN = ON       // Phase Lock Loop enable (4x PLL is always enabled)
+#pragma config STVREN = ON      // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)
+#pragma config BORV = LO        // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.)
+#pragma config LPBOR = OFF      // Low-Power Brown Out Reset (Low-Power BOR is disabled)
+#pragma config LVP = OFF        // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming)
+
+#include <stdio.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+#include <pic16f1703.h>
+
+volatile uint8_t level = 0;
+volatile uint8_t cycle_pos = 0;
+
+void interrupt isr(void){
+
+    if(PIR1bits.SSP1IF){
+
+        PIR1bits.SSP1IF = 0;
+
+        uint8_t stat, dummy;
+        stat = SSP1STAT & 0b00101101;
+
+        switch(stat){
+
+            case 0b00001001:
+                dummy = SSP1BUF;
+                break;
+
+            case 0b00101001:
+                level = SSP1BUF;
+                break;
+
+            default:
+                dummy = SSP1BUF;
+                break;
+        }
+
+        if(level == 0) LATAbits.LATA4 = 0;
+        else LATAbits.LATA4 = 1;
+
+    }
+    if(INTCONbits.IOCIF){
+
+        INTCONbits.IOCIF = 0;
+
+        if(IOCCFbits.IOCCF2){
+
+            IOCCFbits.IOCCF2 = 0;
+
+            if(level != 0) level = 0;
+            else level = 255;
+
+            if(level == 0) LATAbits.LATA4 = 0;
+            else LATAbits.LATA4 = 1;
+
+        }
+        if(IOCAFbits.IOCAF5){
+
+            IOCAFbits.IOCAF5 = 0;
+
+            if(level == 255)
+                LATAbits.LATA4 = 1;
+            else if(level == 0)
+                LATAbits.LATA4 = 0;
+            else {
+
+                // Reset timer to 0
+                TMR0 = 0;
+                cycle_pos = 0;
+                LATAbits.LATA4 = 0;
+
+            }
+        }
+    }
+    if(INTCONbits.TMR0IF){
+
+        INTCONbits.TMR0IF = 0;
+
+        if(level == 255)
+            LATAbits.LATA4 = 1;
+        else if(level == 0)
+            LATAbits.LATA4 = 0;
+        else {
+
+            cycle_pos++;
+
+            if(cycle_pos == level)
+                LATAbits.LATA4 = 1;
+            else if(cycle_pos == level + 5)
+                LATAbits.LATA4 = 0;
+
+        }
+
+    }
+
+}
+
+void main(void) {
+
+    // Switch clock to 16 MHz
+    OSCCONbits.IRCF = 0b1111;
+    OSCCONbits.SCS = 0b10;
+
+    while(OSCSTATbits.HFIOFS == 0); // Wait for clock to stabalize
+
+    // Setup PPI
+    // Unlock PPS
+    GIE = 0; // Disable Interrupts
+    PPSLOCK = 0x55;
+    PPSLOCK = 0xAA;
+    PPSLOCK = 0x00;
+
+    // I2C PPI
+    SSPCLKPPSbits.SSPCLKPPS = 0b10000; // RC0
+    SSPDATPPSbits.SSPDATPPS = 0b10001; // RC1
+    RC0PPSbits.RC0PPS = 0b10000;
+    RC1PPSbits.RC1PPS = 0b10001;
+
+    // Lock PPS
+    PPSLOCK = 0x55;
+    PPSLOCK = 0xAA;
+    PPSLOCK = 0x01;
+
+    // Disable analog inputs
+    ANSELA = 0;
+    ANSELC = 0;
+
+    // Enable interupt on change
+    INTCONbits.IOCIE = 1;
+
+    // Enable Weak Pullups
+    OPTION_REGbits.nWPUEN = 0;
+
+    // Setup Address selection inputs
+    TRISCbits.TRISC3 = 1;
+    TRISCbits.TRISC4 = 1;
+    TRISCbits.TRISC5 = 1;
+    WPUCbits.WPUC3 = 1;
+    WPUCbits.WPUC4 = 1;
+    WPUCbits.WPUC5 = 1;
+    IOCCPbits.IOCCP3 = 1;
+    IOCCNbits.IOCCN3 = 1;
+    IOCCPbits.IOCCP4 = 1;
+    IOCCNbits.IOCCN4 = 1;
+    IOCCPbits.IOCCP5 = 1;
+    IOCCNbits.IOCCN5 = 1;
+    IOCCFbits.IOCCF3 = 0;
+    IOCCFbits.IOCCF4 = 0;
+    IOCCFbits.IOCCF5 = 0;
+
+    // Setup Switch Input
+    TRISCbits.TRISC2 = 1;
+    WPUCbits.WPUC2 = 1;
+    IOCCPbits.IOCCP2 = 1;
+    IOCCNbits.IOCCN2 = 1;
+    IOCCFbits.IOCCF2 = 0;
+
+    // Setup Zero-Crossing detect input
+    TRISAbits.TRISA5 = 1;
+    WPUAbits.WPUA5 = 1;
+    IOCAPbits.IOCAP5 = 1;
+    //IOCANbits.IOCAN5 = 1;
+    IOCAFbits.IOCAF5 = 0;
+
+    // Setup SRC output
+    TRISAbits.TRISA4 = 0;
+    LATAbits.LATA4 = 0;
+
+    // Timer0 Config
+
+    // Disable interupt and clear flag
+    INTCONbits.TMR0IE = 0;
+    INTCONbits.TMR0IF = 0;
+
+    OPTION_REGbits.T0CS = 0; // Timer0 Fosc/4 clock
+    OPTION_REGbits.PSA = 0; // Prescaler assigned to timer 0
+    OPTION_REGbits.PS = 0b000; // Prescaller 1:2
+
+    INTCONbits.TMR0IE = 1; // Enable Timer 0 Interrupts
+
+    // Clear and disable SPI interrupts
+    PIR1bits.SSP1IF = 0;
+    PIE1bits.SSP1IE = 0;
+
+    TRISCbits.TRISC0 = 1;
+    TRISCbits.TRISC1 = 1;
+
+    ODCONCbits.ODC0 = 1;
+    ODCONCbits.ODC1 = 1;
+
+    SSP1STATbits.SMP = 1;
+    SSP1CON1bits.SSPM = 0b0110; //I2C Mode 7 Bit
+
+    SSP1MSK = 0b11111111; // Check for exact address
+    // Lower 4 bits are 1011 and top 3 of addres are selected by dip switch
+    SSP1ADD = 0b00010110
+            + (PORTCbits.RC5 << 7)
+            + (PORTCbits.RC4 << 6)
+            + (PORTCbits.RC3 << 5);
+
+    SSP1CON1bits.SSPEN = 1; // Enable I2C
+
+    PIE1bits.SSP1IE = 1; // Enable I2C Interrupts
+
+    // Enable all interrupts
+    INTCONbits.PEIE = 1; // Enable Peripheral Interrupts
+    INTCONbits.GIE = 1; // Enable Interrupts
+
+    while(1){} // Run forever
+
+}

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Makefile-default.mk
@@ -1,1 +1,141 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a -pre and a -post target defined where you can add customized code.
+#
+# This makefile implements configuration specific macros and targets.
 
+
+# Include project Makefile
+ifeq "${IGNORE_LOCAL}" "TRUE"
+# do not include local makefile. User is passing all local related variables already
+else
+include Makefile
+# Include makefile containing local settings
+ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk"
+include nbproject/Makefile-local-default.mk
+endif
+endif
+
+# Environment
+MKDIR=mkdir -p
+RM=rm -f 
+MV=mv 
+CP=cp 
+
+# Macros
+CND_CONF=default
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+IMAGE_TYPE=debug
+OUTPUT_SUFFIX=elf
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+else
+IMAGE_TYPE=production
+OUTPUT_SUFFIX=hex
+DEBUGGABLE_SUFFIX=elf
+FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+endif
+
+# Object Directory
+OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE}
+
+# Distribution Directory
+DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE}
+
+# Source Files Quoted if spaced
+SOURCEFILES_QUOTED_IF_SPACED=main.c
+
+# Object Files Quoted if spaced
+OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/main.p1
+POSSIBLE_DEPFILES=${OBJECTDIR}/main.p1.d
+
+# Object Files
+OBJECTFILES=${OBJECTDIR}/main.p1
+
+# Source Files
+SOURCEFILES=main.c
+
+
+CFLAGS=
+ASFLAGS=
+LDLIBSOPTIONS=
+
+############# Tool locations ##########################################
+# If you copy a project from one host to another, the path where the  #
+# compiler is installed may be different.                             #
+# If you open this project with MPLAB X in the new host, this         #
+# makefile will be regenerated and the paths will be corrected.       #
+#######################################################################
+# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build
+FIXDEPS=fixDeps
+
+.build-conf:  ${BUILD_SUBPROJECTS}
+	${MAKE}  -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+
+MP_PROCESSOR_OPTION=16F1703
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: compile
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+${OBJECTDIR}/main.p1: main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR} 
+	@${RM} ${OBJECTDIR}/main.p1.d 
+	@${RM} ${OBJECTDIR}/main.p1 
+	${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --opt=default,+asm,+asmfile,-speed,+space,-debug --addrqual=ignore --mode=free -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,+osccal,-resetbits,-download,-stackcall,+clib --output=-mcof,+elf:multilocs --stack=compiled:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s"    -o${OBJECTDIR}/main.p1  main.c 
+	@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d 
+	@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  
+	
+else
+${OBJECTDIR}/main.p1: main.c  nbproject/Makefile-${CND_CONF}.mk
+	@${MKDIR} ${OBJECTDIR} 
+	@${RM} ${OBJECTDIR}/main.p1.d 
+	@${RM} ${OBJECTDIR}/main.p1 
+	${MP_CC} --pass1 $(MP_EXTRA_CC_PRE) --chip=$(MP_PROCESSOR_OPTION) -Q -G  --double=24 --float=24 --opt=default,+asm,+asmfile,-speed,+space,-debug --addrqual=ignore --mode=free -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,+osccal,-resetbits,-download,-stackcall,+clib --output=-mcof,+elf:multilocs --stack=compiled:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s"    -o${OBJECTDIR}/main.p1  main.c 
+	@-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d 
+	@${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../  
+	
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: assemble
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+else
+endif
+
+# ------------------------------------------------------------------------------------
+# Rules for buildStep: link
+ifeq ($(TYPE_IMAGE), DEBUG_RUN)
+dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk    
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G -mdist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.map  -D__DEBUG=1 --debugger=pickit3  --double=24 --float=24 --opt=default,+asm,+asmfile,-speed,+space,-debug --addrqual=ignore --mode=free -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,+osccal,-resetbits,-download,-stackcall,+clib --output=-mcof,+elf:multilocs --stack=compiled:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s"        -odist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}  ${OBJECTFILES_QUOTED_IF_SPACED}     
+	@${RM} dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.hex 
+	
+else
+dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES}  nbproject/Makefile-${CND_CONF}.mk   
+	@${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} 
+	${MP_CC} $(MP_EXTRA_LD_PRE) --chip=$(MP_PROCESSOR_OPTION) -G -mdist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.map  --double=24 --float=24 --opt=default,+asm,+asmfile,-speed,+space,-debug --addrqual=ignore --mode=free -P -N255 --warn=0 --asmlist --summary=default,-psect,-class,+mem,-hex,-file --output=default,-inhx032 --runtime=default,+clear,+init,-keep,-no_startup,+osccal,-resetbits,-download,-stackcall,+clib --output=-mcof,+elf:multilocs --stack=compiled:auto:auto "--errformat=%f:%l: error: (%n) %s" "--warnformat=%f:%l: warning: (%n) %s" "--msgformat=%f:%l: advisory: (%n) %s"     -odist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX}  ${OBJECTFILES_QUOTED_IF_SPACED}     
+	
+endif
+
+
+# Subprojects
+.build-subprojects:
+
+
+# Subprojects
+.clean-subprojects:
+
+# Clean Targets
+.clean-conf: ${CLEAN_SUBPROJECTS}
+	${RM} -r build/default
+	${RM} -r dist/default
+
+# Enable dependency checking
+.dep.inc: .depcheck-impl
+
+DEPFILES=$(shell "${PATH_TO_IDE_BIN}"mplabwildcard ${POSSIBLE_DEPFILES})
+ifneq (${DEPFILES},)
+include ${DEPFILES}
+endif
+

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Makefile-genesis.properties
@@ -1,1 +1,6 @@
+#
+#Tue Jan 27 21:57:14 MST 2015
+com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=f654f11d585cacf70b570c49f2939b4c
+host.platform=linux
+conf.ids=
 

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Makefile-impl.mk
@@ -1,1 +1,70 @@
+#
+# Generated Makefile - do not edit!
+#
+# Edit the Makefile in the project folder instead (../Makefile). Each target
+# has a pre- and a post- target defined where you can add customization code.
+#
+# This makefile implements macros and targets common to all configurations.
+#
+# NOCDDL
 
+
+# Building and Cleaning subprojects are done by default, but can be controlled with the SUB
+# macro. If SUB=no, subprojects will not be built or cleaned. The following macro
+# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf
+# and .clean-reqprojects-conf unless SUB has the value 'no'
+SUB_no=NO
+SUBPROJECTS=${SUB_${SUB}}
+BUILD_SUBPROJECTS_=.build-subprojects
+BUILD_SUBPROJECTS_NO=
+BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}}
+CLEAN_SUBPROJECTS_=.clean-subprojects
+CLEAN_SUBPROJECTS_NO=
+CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}}
+
+
+# Project Name
+PROJECTNAME=Dimmer_Module.X
+
+# Active Configuration
+DEFAULTCONF=default
+CONF=${DEFAULTCONF}
+
+# All Configurations
+ALLCONFS=default 
+
+
+# build
+.build-impl: .build-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf
+
+
+# clean
+.clean-impl: .clean-pre
+	${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf
+
+# clobber
+.clobber-impl: .clobber-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean
+
+
+
+# all
+.all-impl: .all-pre .depcheck-impl
+	    ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build
+
+
+
+# dependency checking support
+.depcheck-impl:
+#	@echo "# This code depends on make tool being used" >.dep.inc
+#	@if [ -n "${MAKE_VERSION}" ]; then \
+#	    echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \
+#	    echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \
+#	    echo "include \$${DEPFILES}" >>.dep.inc; \
+#	    echo "endif" >>.dep.inc; \
+#	else \
+#	    echo ".KEEP_STATE:" >>.dep.inc; \
+#	    echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \
+#	fi
+

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Makefile-local-default.mk
@@ -1,1 +1,37 @@
+#
+# Generated Makefile - do not edit!
+#
+#
+# This file contains information about the location of compilers and other tools.
+# If you commmit this file into your revision control server, you will be able to 
+# to checkout the project and build it from the command line with make. However,
+# if more than one person works on the same project, then this file might show
+# conflicts since different users are bound to have compilers in different places.
+# In that case you might choose to not commit this file and let MPLAB X recreate this file
+# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at
+# least once so the file gets created and the project can be built. Finally, you can also
+# avoid using this file at all if you are only building from the command line with make.
+# You can invoke make with the values of the macros:
+# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ...  
+#
+PATH_TO_IDE_BIN=/opt/microchip/mplabx/mplab_ide/mplab_ide/modules/../../bin/
+# Adding MPLAB X bin directory to path.
+PATH:=/opt/microchip/mplabx/mplab_ide/mplab_ide/modules/../../bin/:$(PATH)
+# Path to java used to run MPLAB X when this makefile was created
+MP_JAVA_PATH="/opt/microchip/mplabx/sys/java/jre1.7.0_25/bin/"
+OS_CURRENT="$(shell uname -s)"
+MP_CC="/opt/microchip/xc8/v1.32/bin/xc8"
+# MP_CPPC is not defined
+# MP_BC is not defined
+# MP_AS is not defined
+# MP_LD is not defined
+# MP_AR is not defined
+DEP_GEN=${MP_JAVA_PATH}java -jar "/opt/microchip/mplabx/mplab_ide/mplab_ide/modules/../../bin/extractobjectdependencies.jar" 
+MP_CC_DIR="/opt/microchip/xc8/v1.32/bin"
+# MP_CPPC_DIR is not defined
+# MP_BC_DIR is not defined
+# MP_AS_DIR is not defined
+# MP_LD_DIR is not defined
+# MP_AR_DIR is not defined
+# MP_BC_DIR is not defined
 

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Makefile-variables.mk
@@ -1,1 +1,14 @@
+#
+# Generated - do not edit!
+#
+# NOCDDL
+#
+CND_BASEDIR=`pwd`
+# default configuration
+CND_ARTIFACT_DIR_default=dist/default/production
+CND_ARTIFACT_NAME_default=Dimmer_Module.X.production.hex
+CND_ARTIFACT_PATH_default=dist/default/production/Dimmer_Module.X.production.hex
+CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package
+CND_PACKAGE_NAME_default=dimmermodule.x.tar
+CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/dimmermodule.x.tar
 

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/Package-default.bash
@@ -1,1 +1,74 @@
+#!/bin/bash -x
 
+#
+# Generated - do not edit!
+#
+
+# Macros
+TOP=`pwd`
+CND_CONF=default
+CND_DISTDIR=dist
+TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging
+TMPDIRNAME=tmp-packaging
+OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+OUTPUT_BASENAME=Dimmer_Module.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}
+PACKAGE_TOP_DIR=dimmermodule.x/
+
+# Functions
+function checkReturnCode
+{
+    rc=$?
+    if [ $rc != 0 ]
+    then
+        exit $rc
+    fi
+}
+function makeDirectory
+# $1 directory path
+# $2 permission (optional)
+{
+    mkdir -p "$1"
+    checkReturnCode
+    if [ "$2" != "" ]
+    then
+      chmod $2 "$1"
+      checkReturnCode
+    fi
+}
+function copyFileToTmpDir
+# $1 from-file path
+# $2 to-file path
+# $3 permission
+{
+    cp "$1" "$2"
+    checkReturnCode
+    if [ "$3" != "" ]
+    then
+        chmod $3 "$2"
+        checkReturnCode
+    fi
+}
+
+# Setup
+cd "${TOP}"
+mkdir -p ${CND_DISTDIR}/${CND_CONF}/package
+rm -rf ${TMPDIR}
+mkdir -p ${TMPDIR}
+
+# Copy files and create directories and links
+cd "${TOP}"
+makeDirectory ${TMPDIR}/dimmermodule.x/bin
+copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755
+
+
+# Generate tar file
+cd "${TOP}"
+rm -f ${CND_DISTDIR}/${CND_CONF}/package/dimmermodule.x.tar
+cd ${TMPDIR}
+tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/dimmermodule.x.tar *
+checkReturnCode
+
+# Cleanup
+cd "${TOP}"
+rm -rf ${TMPDIR}
+

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/configurations.xml
@@ -1,1 +1,162 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<configurationDescriptor version="62">
+  <logicalFolder name="root" displayName="root" projectFiles="true">
+    <logicalFolder name="HeaderFiles"
+                   displayName="Header Files"
+                   projectFiles="true">
+    </logicalFolder>
+    <logicalFolder name="LinkerScript"
+                   displayName="Linker Files"
+                   projectFiles="true">
+    </logicalFolder>
+    <logicalFolder name="SourceFiles"
+                   displayName="Source Files"
+                   projectFiles="true">
+      <itemPath>main.c</itemPath>
+    </logicalFolder>
+    <logicalFolder name="ExternalFiles"
+                   displayName="Important Files"
+                   projectFiles="false">
+      <itemPath>Makefile</itemPath>
+    </logicalFolder>
+  </logicalFolder>
+  <projectmakefile>Makefile</projectmakefile>
+  <confs>
+    <conf name="default" type="2">
+      <toolsSet>
+        <developmentServer>localhost</developmentServer>
+        <targetDevice>PIC16F1703</targetDevice>
+        <targetHeader></targetHeader>
+        <targetPluginBoard></targetPluginBoard>
+        <platformTool>PICkit3PlatformTool</platformTool>
+        <languageToolchain>XC8</languageToolchain>
+        <languageToolchainVersion>1.32</languageToolchainVersion>
+        <platform>2</platform>
+      </toolsSet>
+      <compileType>
+        <linkerTool>
+          <linkerLibItems>
+          </linkerLibItems>
+        </linkerTool>
+        <archiverTool>
+        </archiverTool>
+        <loading>
+          <useAlternateLoadableFile>false</useAlternateLoadableFile>
+          <parseOnProdLoad>false</parseOnProdLoad>
+          <alternateLoadableFile></alternateLoadableFile>
+        </loading>
+      </compileType>
+      <makeCustomizationType>
+        <makeCustomizationPreStepEnabled>false</makeCustomizationPreStepEnabled>
+        <makeCustomizationPreStep></makeCustomizationPreStep>
+        <makeCustomizationPostStepEnabled>false</makeCustomizationPostStepEnabled>
+        <makeCustomizationPostStep></makeCustomizationPostStep>
+        <makeCustomizationPutChecksumInUserID>false</makeCustomizationPutChecksumInUserID>
+        <makeCustomizationEnableLongLines>false</makeCustomizationEnableLongLines>
+        <makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>
+      </makeCustomizationType>
+      <HI-TECH-COMP>
+        <property key="asmlist" value="true"/>
+        <property key="define-macros" value=""/>
+        <property key="extra-include-directories" value=""/>
+        <property key="identifier-length" value="255"/>
+        <property key="operation-mode" value="free"/>
+        <property key="opt-xc8-compiler-strict_ansi" value="false"/>
+        <property key="optimization-assembler" value="true"/>
+        <property key="optimization-assembler-files" value="true"/>
+        <property key="optimization-debug" value="false"/>
+        <property key="optimization-global" value="true"/>
+        <property key="optimization-level" value="9"/>
+        <property key="optimization-set" value="default"/>
+        <property key="optimization-speed" value="false"/>
+        <property key="preprocess-assembler" value="true"/>
+        <property key="undefine-macros" value=""/>
+        <property key="use-cci" value="false"/>
+        <property key="use-iar" value="false"/>
+        <property key="verbose" value="false"/>
+        <property key="warning-level" value="0"/>
+        <property key="what-to-do" value="ignore"/>
+      </HI-TECH-COMP>
+      <HI-TECH-LINK>
+        <property key="additional-options-checksum" value=""/>
+        <property key="additional-options-code-offset" value=""/>
+        <property key="additional-options-command-line" value=""/>
+        <property key="additional-options-errata" value=""/>
+        <property key="additional-options-extend-address" value="false"/>
+        <property key="additional-options-trace-type" value=""/>
+        <property key="additional-options-use-response-files" value="false"/>
+        <property key="backup-reset-condition-flags" value="false"/>
+        <property key="calibrate-oscillator" value="true"/>
+        <property key="calibrate-oscillator-value" value=""/>
+        <property key="clear-bss" value="true"/>
+        <property key="code-model-external" value="wordwrite"/>
+        <property key="code-model-rom" value=""/>
+        <property key="create-html-files" value="false"/>
+        <property key="data-model-ram" value=""/>
+        <property key="data-model-size-of-double" value="24"/>
+        <property key="data-model-size-of-float" value="24"/>
+        <property key="display-class-usage" value="false"/>
+        <property key="display-hex-usage" value="false"/>
+        <property key="display-overall-usage" value="true"/>
+        <property key="display-psect-usage" value="false"/>
+        <property key="fill-flash-options-addr" value=""/>
+        <property key="fill-flash-options-const" value=""/>
+        <property key="fill-flash-options-how" value="0"/>
+        <property key="fill-flash-options-inc-const" value="1"/>
+        <property key="fill-flash-options-increment" value=""/>
+        <property key="fill-flash-options-seq" value=""/>
+        <property key="fill-flash-options-what" value="0"/>
+        <property key="format-hex-file-for-download" value="false"/>
+        <property key="initialize-data" value="true"/>
+        <property key="keep-generated-startup.as" value="false"/>
+        <property key="link-in-c-library" value="true"/>
+        <property key="link-in-peripheral-library" value="true"/>
+        <property key="managed-stack" value="false"/>
+        <property key="opt-xc8-linker-file" value="false"/>
+        <property key="opt-xc8-linker-link_startup" value="false"/>
+        <property key="opt-xc8-linker-serial" value=""/>
+        <property key="program-the-device-with-default-config-words" value="true"/>
+      </HI-TECH-LINK>
+      <PICkit3PlatformTool>
+        <property key="AutoSelectMemRanges" value="auto"/>
+        <property key="Freeze Peripherals" value="true"/>
+        <property key="SecureSegment.SegmentProgramming" value="FullChipProgramming"/>
+        <property key="ToolFirmwareFilePath"
+                  value="Press to browse for a specific firmware version"/>
+        <property key="ToolFirmwareOption.UseLatestFirmware" value="true"/>
+        <property key="hwtoolclock.frcindebug" value="false"/>
+        <property key="memories.aux" value="false"/>
+        <property key="memories.bootflash" value="true"/>
+        <property key="memories.configurationmemory" value="true"/>
+        <property key="memories.eeprom" value="true"/>
+        <property key="memories.flashdata" value="true"/>
+        <property key="memories.id" value="true"/>
+        <property key="memories.programmemory" value="true"/>
+        <property key="memories.programmemory.end" value="0x7ff"/>
+        <property key="memories.programmemory.start" value="0x0"/>
+        <property key="poweroptions.powerenable" value="false"/>
+        <property key="programmertogo.imagename" value=""/>
+        <property key="programoptions.eraseb4program" value="true"/>
+        <property key="programoptions.pgmspeed" value="2"/>
+        <property key="programoptions.preserveeeprom" value="false"/>
+        <property key="programoptions.preserveprogramrange" value="false"/>
+        <property key="programoptions.preserveprogramrange.end" value="0x7ff"/>
+        <property key="programoptions.preserveprogramrange.start" value="0x0"/>
+        <property key="programoptions.preserveuserid" value="false"/>
+        <property key="programoptions.testmodeentrymethod" value="VPPFirst"/>
+        <property key="programoptions.usehighvoltageonmclr" value="false"/>
+        <property key="programoptions.uselvpprogramming" value="false"/>
+        <property key="voltagevalue" value="3.25"/>
+      </PICkit3PlatformTool>
+      <XC8-config-global>
+        <property key="advanced-elf" value="true"/>
+        <property key="output-file-format" value="-mcof,+elf"/>
+        <property key="stack-size-high" value="auto"/>
+        <property key="stack-size-low" value="auto"/>
+        <property key="stack-size-main" value="auto"/>
+        <property key="stack-type" value="compiled"/>
+      </XC8-config-global>
+    </conf>
+  </confs>
+</configurationDescriptor>
 

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/private/configurations.xml
@@ -1,1 +1,26 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<configurationDescriptor version="62">
+  <projectmakefile>Makefile</projectmakefile>
+  <defaultConf>0</defaultConf>
+  <confs>
+    <conf name="default" type="2">
+      <platformToolSN>:=MPLABComm-USB-Microchip:=&lt;vid>04D8:=&lt;pid>900A:=&lt;rev>0002:=&lt;man>Microchip Technology Inc.:=&lt;prod>PICkit 3:=&lt;sn>BUR114180848:=&lt;drv>x:=end</platformToolSN>
+      <languageToolchainDir>/opt/microchip/xc8/v1.32/bin</languageToolchainDir>
+      <mdbdebugger version="1">
+        <placeholder1>place holder 1</placeholder1>
+        <placeholder2>place holder 2</placeholder2>
+      </mdbdebugger>
+      <runprofile version="6">
+        <args></args>
+        <rundir></rundir>
+        <buildfirst>true</buildfirst>
+        <console-type>0</console-type>
+        <terminal-type>0</terminal-type>
+        <remove-instrumentation>0</remove-instrumentation>
+        <environment>
+        </environment>
+      </runprofile>
+    </conf>
+  </confs>
+</configurationDescriptor>
 

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/private/private.properties

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/project.properties

--- /dev/null
+++ b/code/Modules/Dimmer_Module.X/nbproject/project.xml
@@ -1,1 +1,17 @@
+<?xml version="1.0" encoding="UTF-8"?><project xmlns="http://www.netbeans.org/ns/project/1">
+    <type>com.microchip.mplab.nbide.embedded.makeproject</type>
+    <configuration>
+        <data xmlns="http://www.netbeans.org/ns/make-project/1">
+            <name>Dimmer_Module</name>
+            <creation-uuid>72bdb422-6099-4ba6-9bd3-07d35e783fdc</creation-uuid>
+            <make-project-type>0</make-project-type>
+            <c-extensions>c</c-extensions>
+            <cpp-extensions/>
+            <header-extensions/>
+            <asminc-extensions/>
+            <sourceEncoding>ISO-8859-1</sourceEncoding>
+            <make-dep-projects/>
+        </data>
+    </configuration>
+</project>
 

--- /dev/null
+++ b/schem/Boards/Modules/CC3000_Radio_Module/CC3000_Radio_Module.net
@@ -1,1 +1,28 @@
+unnamed_net15	ANT1-1 L2-2 C4-2 
+unnamed_net14	L1-2 C4-1 U3-35 
+unnamed_net13	U3-39 U3-29 
+unnamed_net12	U3-28 U3-27 
+unnamed_net11	TP3-1 U3-24 
+unnamed_net10	TP5-1 U3-8 
+unnamed_net9	TP4-1 U3-6 
+unnamed_net8	U3-7 U3-5 
+unnamed_net7	TP2-1 U3-4 
+unnamed_net6	TP1-1 U3-2 
+INT	U3-14 U1-11 
+CS	U3-12 U1-14 
+SCK	U3-17 U1-15 
+SDO	U3-15 U1-16 
+SDI	U3-13 U1-17 
+ENABLE	U3-26 U1-18 
+unnamed_net5	U1-6 
+unnamed_net4	U1-3 PROGPIC-4 
+unnamed_net3	U1-2 PROGPIC-3 
+unnamed_net2	U1-1 PROGPIC-2 
+unnamed_net1	J1-2 OUT-2 
+GND	C2-1 C3-1 L2-1 L1-1 U3-46 U3-21 U3-22 U3-20 U3-18 U3-25 U3-31 U3-32 U3-33 U3-34 U3-36 U3-37 U3-38 U3-39 U3-40 U3-41 U3-42 U3-43 U3-44 U3-45 U3-16 U3-11 U3-10 U3-9 U3-1 U1-19 PROGPIC-5 C1-1 U2-7 U2-3 \
+ U2-2 U2-4 U2-1 OUT-5 IN-5 
+SDA	U1-13 U2-5 OUT-4 IN-4 
+SCL	U1-12 U2-6 OUT-3 IN-3 
+SIG	U1-10 J1-1 IN-2 
++3.3V	U3-23 C3-2 C2-2 U3-19 PROGPIC-1 U1-20 C1-2 U?-? OUT-1 IN-1 
 

--- /dev/null
+++ b/schem/Boards/Modules/CC3000_Radio_Module/CC3000_Radio_Module.pcb
@@ -1,1 +1,1772 @@
-
+# release: pcb 20110918
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["" 112000 158000]
+
+Grid[500.0 0 0 0]
+Cursor[0 12000 0.000000]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[600 600 600 600 1300 700]
+Flags("nameonpcb,uniquename,clearnew,snappin")
+Groups("1,c:2:3:4:5:6,s:7:8")
+Styles["Signal,600,3600,2000,600:Power,1500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
+
+Symbol[' ' 1800]
+(
+)
+Symbol['!' 1200]
+(
+	SymbolLine[0 4500 0 5000 800]
+	SymbolLine[0 1000 0 3500 800]
+)
+Symbol['"' 1200]
+(
+	SymbolLine[0 1000 0 2000 800]
+	SymbolLine[1000 1000 1000 2000 800]
+)
+Symbol['#' 1200]
+(
+	SymbolLine[0 3500 2000 3500 800]
+	SymbolLine[0 2500 2000 2500 800]
+	SymbolLine[1500 2000 1500 4000 800]
+	SymbolLine[500 2000 500 4000 800]
+)
+Symbol['$' 1200]
+(
+	SymbolLine[1500 1500 2000 2000 800]
+	SymbolLine[500 1500 1500 1500 800]
+	SymbolLine[0 2000 500 1500 800]
+	SymbolLine[0 2000 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 4000 800]
+	SymbolLine[1500 4500 2000 4000 800]
+	SymbolLine[500 4500 1500 4500 800]
+	SymbolLine[0 4000 500 4500 800]
+	SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['%' 1200]
+(
+	SymbolLine[0 1500 0 2000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1000 1000 800]
+	SymbolLine[1000 1000 1500 1500 800]
+	SymbolLine[1500 1500 1500 2000 800]
+	SymbolLine[1000 2500 1500 2000 800]
+	SymbolLine[500 2500 1000 2500 800]
+	SymbolLine[0 2000 500 2500 800]
+	SymbolLine[0 5000 4000 1000 800]
+	SymbolLine[3500 5000 4000 4500 800]
+	SymbolLine[4000 4000 4000 4500 800]
+	SymbolLine[3500 3500 4000 4000 800]
+	SymbolLine[3000 3500 3500 3500 800]
+	SymbolLine[2500 4000 3000 3500 800]
+	SymbolLine[2500 4000 2500 4500 800]
+	SymbolLine[2500 4500 3000 5000 800]
+	SymbolLine[3000 5000 3500 5000 800]
+)
+Symbol['&' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 3500 1500 2000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[1000 5000 2000 4000 800]
+	SymbolLine[0 2500 2500 5000 800]
+	SymbolLine[500 1000 1000 1000 800]
+	SymbolLine[1000 1000 1500 1500 800]
+	SymbolLine[1500 1500 1500 2000 800]
+	SymbolLine[0 3500 0 4500 800]
+)
+Symbol[''' 1200]
+(
+	SymbolLine[0 2000 1000 1000 800]
+)
+Symbol['(' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
+)
+Symbol[')' 1200]
+(
+	SymbolLine[0 1000 500 1500 800]
+	SymbolLine[500 1500 500 4500 800]
+	SymbolLine[0 5000 500 4500 800]
+)
+Symbol['*' 1200]
+(
+	SymbolLine[0 2000 2000 4000 800]
+	SymbolLine[0 4000 2000 2000 800]
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol['+' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol[',' 1200]
+(
+	SymbolLine[0 6000 1000 5000 800]
+)
+Symbol['-' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+)
+Symbol['.' 1200]
+(
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['/' 1200]
+(
+	SymbolLine[0 4500 3000 1500 800]
+)
+Symbol['0' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4000 2000 2000 800]
+)
+Symbol['1' 1200]
+(
+	SymbolLine[0 1800 800 1000 800]
+	SymbolLine[800 1000 800 5000 800]
+	SymbolLine[0 5000 1500 5000 800]
+)
+Symbol['2' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[0 5000 2500 2500 800]
+	SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['3' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 2800 1500 2800 800]
+	SymbolLine[2000 1500 2000 2300 800]
+	SymbolLine[2000 3300 2000 4500 800]
+	SymbolLine[2000 3300 1500 2800 800]
+	SymbolLine[2000 2300 1500 2800 800]
+)
+Symbol['4' 1200]
+(
+	SymbolLine[0 3500 2000 1000 800]
+	SymbolLine[0 3500 2500 3500 800]
+	SymbolLine[2000 1000 2000 5000 800]
+)
+Symbol['5' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[0 1000 0 3000 800]
+	SymbolLine[0 3000 500 2500 800]
+	SymbolLine[500 2500 1500 2500 800]
+	SymbolLine[1500 2500 2000 3000 800]
+	SymbolLine[2000 3000 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['6' 1200]
+(
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[1500 2800 2000 3300 800]
+	SymbolLine[0 2800 1500 2800 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3300 2000 4500 800]
+)
+Symbol['7' 1200]
+(
+	SymbolLine[500 5000 2500 1000 800]
+	SymbolLine[0 1000 2500 1000 800]
+)
+Symbol['8' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3700 0 4500 800]
+	SymbolLine[0 3700 700 3000 800]
+	SymbolLine[700 3000 1300 3000 800]
+	SymbolLine[1300 3000 2000 3700 800]
+	SymbolLine[2000 3700 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 2300 700 3000 800]
+	SymbolLine[0 1500 0 2300 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 2300 800]
+	SymbolLine[1300 3000 2000 2300 800]
+)
+Symbol['9' 1200]
+(
+	SymbolLine[500 5000 2000 3000 800]
+	SymbolLine[2000 1500 2000 3000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+)
+Symbol[':' 1200]
+(
+	SymbolLine[0 2500 500 2500 800]
+	SymbolLine[0 3500 500 3500 800]
+)
+Symbol[';' 1200]
+(
+	SymbolLine[0 5000 1000 4000 800]
+	SymbolLine[1000 2500 1000 3000 800]
+)
+Symbol['<' 1200]
+(
+	SymbolLine[0 3000 1000 2000 800]
+	SymbolLine[0 3000 1000 4000 800]
+)
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+(
+	SymbolLine[0 2500 2000 2500 800]
+	SymbolLine[0 3500 2000 3500 800]
+)
+Symbol['>' 1200]
+(
+	SymbolLine[0 2000 1000 3000 800]
+	SymbolLine[0 4000 1000 3000 800]
+)
+Symbol['?' 1200]
+(
+	SymbolLine[1000 3000 1000 3500 800]
+	SymbolLine[1000 4500 1000 5000 800]
+	SymbolLine[0 1500 0 2000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 2000 800]
+	SymbolLine[1000 3000 2000 2000 800]
+)
+Symbol['@' 1200]
+(
+	SymbolLine[0 1000 0 4000 800]
+	SymbolLine[0 4000 1000 5000 800]
+	SymbolLine[1000 5000 4000 5000 800]
+	SymbolLine[5000 3500 5000 1000 800]
+	SymbolLine[5000 1000 4000 0 800]
+	SymbolLine[4000 0 1000 0 800]
+	SymbolLine[1000 0 0 1000 800]
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+	SymbolLine[3000 3500 3500 3000 800]
+	SymbolLine[3500 3000 4000 3500 800]
+	SymbolLine[3500 3000 3500 1500 800]
+	SymbolLine[3500 2000 3000 1500 800]
+	SymbolLine[2000 1500 3000 1500 800]
+	SymbolLine[2000 1500 1500 2000 800]
+	SymbolLine[4000 3500 5000 3500 800]
+)
+Symbol['A' 1200]
+(
+	SymbolLine[0 2000 0 5000 800]
+	SymbolLine[0 2000 700 1000 800]
+	SymbolLine[700 1000 1800 1000 800]
+	SymbolLine[1800 1000 2500 2000 800]
+	SymbolLine[2500 2000 2500 5000 800]
+	SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['B' 1200]
+(
+	SymbolLine[0 5000 2000 5000 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2500 3300 2500 4500 800]
+	SymbolLine[2000 2800 2500 3300 800]
+	SymbolLine[500 2800 2000 2800 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2300 800]
+	SymbolLine[2000 2800 2500 2300 800]
+)
+Symbol['C' 1200]
+(
+	SymbolLine[700 5000 2000 5000 800]
+	SymbolLine[0 4300 700 5000 800]
+	SymbolLine[0 1700 0 4300 800]
+	SymbolLine[0 1700 700 1000 800]
+	SymbolLine[700 1000 2000 1000 800]
+)
+Symbol['D' 1200]
+(
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[1800 1000 2500 1700 800]
+	SymbolLine[2500 1700 2500 4300 800]
+	SymbolLine[1800 5000 2500 4300 800]
+	SymbolLine[0 5000 1800 5000 800]
+	SymbolLine[0 1000 1800 1000 800]
+)
+Symbol['E' 1200]
+(
+	SymbolLine[0 2800 1500 2800 800]
+	SymbolLine[0 5000 2000 5000 800]
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+)
+Symbol['F' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[0 2800 1500 2800 800]
+)
+Symbol['G' 1200]
+(
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
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+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[1000 3000 2000 3000 800]
+)
+Symbol['H' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[2500 1000 2500 5000 800]
+	SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['I' 1200]
+(
+	SymbolLine[0 1000 1000 1000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 5000 1000 5000 800]
+)
+Symbol['J' 1200]
+(
+	SymbolLine[700 1000 1500 1000 800]
+	SymbolLine[1500 1000 1500 4500 800]
+	SymbolLine[1000 5000 1500 4500 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 4500 0 4000 800]
+)
+Symbol['K' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3000 2000 1000 800]
+	SymbolLine[0 3000 2000 5000 800]
+)
+Symbol['L' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['M' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 1500 3000 800]
+	SymbolLine[1500 3000 3000 1000 800]
+	SymbolLine[3000 1000 3000 5000 800]
+)
+Symbol['N' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2500 5000 800]
+	SymbolLine[2500 1000 2500 5000 800]
+)
+Symbol['O' 1200]
+(
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['P' 1200]
+(
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[2000 3000 2500 2500 800]
+	SymbolLine[500 3000 2000 3000 800]
+)
+Symbol['Q' 1200]
+(
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4000 800]
+	SymbolLine[1000 5000 2000 4000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[1000 3500 2000 5000 800]
+)
+Symbol['R' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[2000 3000 2500 2500 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[1300 3000 2500 5000 800]
+)
+Symbol['S' 1200]
+(
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['T' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['U' 1200]
+(
+	SymbolLine[0 1000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 1000 2000 4500 800]
+)
+Symbol['V' 1200]
+(
+	SymbolLine[0 1000 1000 5000 800]
+	SymbolLine[1000 5000 2000 1000 800]
+)
+Symbol['W' 1200]
+(
+	SymbolLine[0 1000 0 3000 800]
+	SymbolLine[0 3000 500 5000 800]
+	SymbolLine[500 5000 1500 3000 800]
+	SymbolLine[1500 3000 2500 5000 800]
+	SymbolLine[2500 5000 3000 3000 800]
+	SymbolLine[3000 3000 3000 1000 800]
+)
+Symbol['X' 1200]
+(
+	SymbolLine[0 5000 2500 1000 800]
+	SymbolLine[0 1000 2500 5000 800]
+)
+Symbol['Y' 1200]
+(
+	SymbolLine[0 1000 1000 3000 800]
+	SymbolLine[1000 3000 2000 1000 800]
+	SymbolLine[1000 3000 1000 5000 800]
+)
+Symbol['Z' 1200]
+(
+	SymbolLine[0 1000 2500 1000 800]
+	SymbolLine[0 5000 2500 1000 800]
+	SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['[' 1200]
+(
+	SymbolLine[0 1000 500 1000 800]
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['\' 1200]
+(
+	SymbolLine[0 1500 3000 4500 800]
+)
+Symbol[']' 1200]
+(
+	SymbolLine[0 1000 500 1000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['^' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1000 1500 800]
+)
+Symbol['_' 1200]
+(
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['a' 1200]
+(
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[2000 3000 2000 4500 800]
+	SymbolLine[2000 4500 2500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['b' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3500 2000 4500 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+)
+Symbol['c' 1200]
+(
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 2000 5000 800]
+)
+Symbol['d' 1200]
+(
+	SymbolLine[2000 1000 2000 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+)
+Symbol['e' 1200]
+(
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[0 4000 2000 4000 800]
+	SymbolLine[2000 4000 2000 3500 800]
+)
+Symbol['f' 1000]
+(
+	SymbolLine[500 1500 500 5000 800]
+	SymbolLine[500 1500 1000 1000 800]
+	SymbolLine[1000 1000 1500 1000 800]
+	SymbolLine[0 3000 1000 3000 800]
+)
+Symbol['g' 1200]
+(
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[0 6000 500 6500 800]
+	SymbolLine[500 6500 1500 6500 800]
+	SymbolLine[1500 6500 2000 6000 800]
+	SymbolLine[2000 3000 2000 6000 800]
+)
+Symbol['h' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+)
+Symbol['i' 1000]
+(
+	SymbolLine[0 2000 0 2100 1000]
+	SymbolLine[0 3500 0 5000 800]
+)
+Symbol['j' 1000]
+(
+	SymbolLine[500 2000 500 2100 1000]
+	SymbolLine[500 3500 500 6000 800]
+	SymbolLine[0 6500 500 6000 800]
+)
+Symbol['k' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3500 1500 5000 800]
+	SymbolLine[0 3500 1000 2500 800]
+)
+Symbol['l' 1000]
+(
+	SymbolLine[0 1000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['m' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+	SymbolLine[2000 3500 2500 3000 800]
+	SymbolLine[2500 3000 3000 3000 800]
+	SymbolLine[3000 3000 3500 3500 800]
+	SymbolLine[3500 3500 3500 5000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['n' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['o' 1200]
+(
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['p' 1200]
+(
+	SymbolLine[500 3500 500 6500 800]
+	SymbolLine[0 3000 500 3500 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[1000 5000 2000 5000 800]
+	SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['q' 1200]
+(
+	SymbolLine[2000 3500 2000 6500 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['r' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 2000 3000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['s' 1200]
+(
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2000 4000 2500 4500 800]
+	SymbolLine[500 4000 2000 4000 800]
+	SymbolLine[0 3500 500 4000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['t' 1000]
+(
+	SymbolLine[500 1000 500 4500 800]
+	SymbolLine[500 4500 1000 5000 800]
+	SymbolLine[0 2500 1000 2500 800]
+)
+Symbol['u' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3000 2000 4500 800]
+)
+Symbol['v' 1200]
+(
+	SymbolLine[0 3000 1000 5000 800]
+	SymbolLine[2000 3000 1000 5000 800]
+)
+Symbol['w' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[1000 5000 1500 4500 800]
+	SymbolLine[1500 3000 1500 4500 800]
+	SymbolLine[1500 4500 2000 5000 800]
+	SymbolLine[2000 5000 2500 5000 800]
+	SymbolLine[2500 5000 3000 4500 800]
+	SymbolLine[3000 3000 3000 4500 800]
+)
+Symbol['x' 1200]
+(
+	SymbolLine[0 3000 2000 5000 800]
+	SymbolLine[0 5000 2000 3000 800]
+)
+Symbol['y' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[2000 3000 2000 6000 800]
+	SymbolLine[1500 6500 2000 6000 800]
+	SymbolLine[500 6500 1500 6500 800]
+	SymbolLine[0 6000 500 6500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['z' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[0 5000 2000 3000 800]
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['{' 1200]
+(
+	SymbolLine[500 1500 1000 1000 800]
+	SymbolLine[500 1500 500 2500 800]
+	SymbolLine[0 3000 500 2500 800]
+	SymbolLine[0 3000 500 3500 800]
+	SymbolLine[500 3500 500 4500 800]
+	SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['|' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+)
+Symbol['}' 1200]
+(
+	SymbolLine[0 1000 500 1500 800]
+	SymbolLine[500 1500 500 2500 800]
+	SymbolLine[500 2500 1000 3000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[500 3500 500 4500 800]
+	SymbolLine[0 5000 500 4500 800]
+)
+Symbol['~' 1200]
+(
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1000 3000 800]
+	SymbolLine[1000 3000 1500 3500 800]
+	SymbolLine[1500 3500 2000 3500 800]
+	SymbolLine[2000 3500 2500 3000 800]
+)
+Attribute("PCB::grid::unit" "mil")
+Via[40000 93000 3600 1200 0 2000 "" ""]
+Via[56500 96000 3600 1200 0 2000 "" ""]
+Via[31500 93500 3600 1200 0 2000 "" ""]
+Via[62000 94500 3600 1200 0 2000 "" ""]
+Via[86500 77000 3600 1200 0 2000 "" ""]
+Via[81500 94000 3600 1200 0 2000 "" ""]
+Via[60000 104500 3600 1200 0 2000 "" ""]
+Via[32500 104000 3600 1200 0 2000 "" ""]
+Via[19500 114500 6000 2000 0 3500 "" ""]
+Via[19500 135000 6000 2000 0 3500 "" ""]
+Via[39000 118500 3600 1200 0 2000 "" ""]
+Via[47000 123500 3600 1200 0 2000 "" ""]
+Via[51000 133500 3600 1200 0 2000 "" ""]
+Via[82500 111500 3600 1200 0 2000 "" ""]
+
+Element["" "GSIP5" "PROGPIC" "unknown" 16000 149500 48500 -3500 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square,edge2"]
+	Pin[10000 0 7000 3000 7600 3800 "2" "2" "edge2"]
+	Pin[20000 0 7000 3000 7600 3800 "3" "3" "edge2"]
+	Pin[30000 0 7000 3000 7600 3800 "4" "4" "edge2"]
+	Pin[40000 0 7000 3000 7600 3800 "5" "5" "edge2"]
+	ElementLine [0 5000 40000 5000 2000]
+	ElementLine [0 -5000 40000 -5000 2000]
+	ElementLine [5000 -5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 270 180 2000]
+	ElementArc [40000 0 5000 5000 90 180 2000]
+
+	)
+
+Element["" "0805" "C1" "100nF" 21000 101000 9500 -3500 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[3543 -393 3543 393 5118 2000 5718 "1" "1" "square"]
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-393 2755 393 2755 800]
+	ElementLine [-393 -2755 393 -2755 800]
+
+	)
+
+Element["" "SO8" "U2" "unknown" 66500 126000 12500 8500 0 100 ""]
+(
+	Attribute("device" "MV85RC04V")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-7500 7000 -7500 13500 2000 1000 3000 "NC" "1" "square,edge2"]
+	Pad[-2500 7000 -2500 13500 2000 1000 3000 "A1" "2" "square,edge2"]
+	Pad[2500 7000 2500 13500 2000 1000 3000 "A2" "3" "square,edge2"]
+	Pad[7500 7000 7500 13500 2000 1000 3000 "VSS" "4" "square,edge2"]
+	Pad[7500 -13500 7500 -7000 2000 1000 3000 "SDA" "5" "square"]
+	Pad[2500 -13500 2500 -7000 2000 1000 3000 "SCL" "6" "square"]
+	Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "WP" "7" "square"]
+	Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "8" "8" "square"]
+	ElementLine [-9500 15500 9500 15500 1000]
+	ElementLine [9500 -15500 9500 15500 1000]
+	ElementLine [-9500 -15500 9500 -15500 1000]
+	ElementLine [-9500 2500 -9500 15500 1000]
+	ElementLine [-9500 -15500 -9500 -2500 1000]
+	ElementArc [-9500 0 2500 2500 90 180 1000]
+
+	)
+
+Element["" "JMP_SLDR-2N" "J1" "unknown" 91500 111500 -2500 -12000 0 100 ""]
+(
+	Attribute("device" "JUMPER")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3000 -1250 -3000 1250 5000 2000 7000 "1" "1" "octagon"]
+	Pad[-1750 -2500 -1750 2500 2500 2000 4500 "1" "1" "square"]
+	Pad[3000 -1250 3000 1250 5000 2000 7000 "2" "2" "octagon"]
+	Pad[1750 -2500 1750 2500 2500 2000 4500 "2" "2" "square"]
+	ElementLine [3000 5250 -3000 5250 1000]
+	ElementLine [3000 -5250 -3000 -5250 1000]
+	ElementArc [-3000 -1250 4000 4000 270 90 1000]
+	ElementArc [-3000 1250 4000 4000 0 90 1000]
+	ElementArc [3000 1250 4000 4000 90 90 1000]
+	ElementArc [3000 -1250 4000 4000 180 90 1000]
+
+	)
+
+Element["" "GSIP5" "OUT" "unknown" 104000 100500 -4500 -12000 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
+	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
+	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
+	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
+	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
+	ElementLine [-5000 0 -5000 40000 2000]
+	ElementLine [5000 0 5000 40000 2000]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 180 180 2000]
+	ElementArc [0 40000 5000 5000 0 180 2000]
+
+	)
+
+Element["" "GSIP5" "IN" "unknown" 7500 100000 -2500 -13000 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
+	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
+	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
+	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
+	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
+	ElementLine [-5000 0 -5000 40000 2000]
+	ElementLine [5000 0 5000 40000 2000]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 180 180 2000]
+	ElementArc [0 40000 5000 5000 0 180 2000]
+
+	)
+
+Element["" "2500AT44M0400" "ANT1" "unknown" 91500 8500 -6500 5000 0 100 ""]
+(
+	Attribute("device" "unknown")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-15748 -984 -15748 984 3937 2000 3937 "1" "1" "square"]
+	Pad[15748 -984 15748 984 3937 200 3937 "" "2" "square"]
+
+	)
+
+Element["" "0805" "C3" "1uF" 73000 87000 4500 -6000 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["" "0805" "C4" "unknown" 57957 8500 -2957 4000 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "1" "1" "square"]
+	Pad[3543 -393 3543 393 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-393 -2755 393 -2755 800]
+	ElementLine [-393 2755 393 2755 800]
+
+	)
+
+Element["" "0805" "L2" "unknown" 68500 12000 4500 1000 0 100 ""]
+(
+	Attribute("device" "INDUCTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["" "0805" "L1" "unknown" 47500 12043 -9000 1457 0 100 ""]
+(
+	Attribute("device" "INDUCTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["" "0805" "C2" "1uF" 73000 74500 5500 -3500 0 100 ""]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "1" "1" "square"]
+	Pad[-393 3543 393 3543 5118 2000 5718 "2" "2" "square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["" "CON_TP__Vector_K24" "TP5" "unknown" 7000 76500 -4000 5000 0 100 ""]
+(
+	Attribute("device" "TESTPOINT")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7500 2000 9500 4600 "1" "1" ""]
+	ElementArc [0 0 4750 4750 0 360 1000]
+
+	)
+
+Element["" "CON_TP__Vector_K24" "TP4" "unknown" 7000 66500 -4500 -11000 0 100 ""]
+(
+	Attribute("device" "TESTPOINT")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7500 2000 9500 4600 "1" "1" ""]
+	ElementArc [0 0 4750 4750 0 360 1000]
+
+	)
+
+Element["" "CON_TP__Vector_K24" "TP3" "unknown" 76000 56500 -4000 -11500 0 100 ""]
+(
+	Attribute("device" "TESTPOINT")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7500 2000 9500 4600 "1" "1" ""]
+	ElementArc [0 0 4750 4750 0 360 1000]
+
+	)
+
+Element["" "CON_TP__Vector_K24" "TP2" "unknown" 7500 45000 -5000 5500 0 100 ""]
+(
+	Attribute("device" "TESTPOINT")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7500 2000 9500 4600 "1" "1" ""]
+	ElementArc [0 0 4750 4750 0 360 1000]
+
+	)
+
+Element["" "CON_TP__Vector_K24" "TP1" "unknown" 7000 35000 -4000 -11000 0 100 ""]
+(
+	Attribute("device" "TESTPOINT")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7500 2000 9500 4600 "1" "1" ""]
+	ElementArc [0 0 4750 4750 0 360 1000]
+
+	)
+
+Element["" "CC3000" "U3" "unknown" 43332 59037 17500 -38000 0 100 ""]
+(
+	Attribute("device" "CC3000")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[7480 0 9449 0 7480 2000 7480 "GND" "41" "square,edge2"]
+	Pad[-9449 0 -7480 0 7480 2000 7480 "GND" "38" "square"]
+	Pad[7480 10433 9449 10433 7480 2000 7480 "GND" "42" "square,edge2"]
+	Pad[-9449 10433 -7480 10433 7480 2000 7480 "GND" "39" "square"]
+	Pad[7480 -10433 9449 -10433 7480 2000 7480 "GND" "40" "square,edge2"]
+	Pad[-9449 -10433 -7480 -10433 7480 2000 7480 "GND" "37" "square"]
+	Pad[23031 28543 23031 28543 4724 2000 4724 "GND" "45" "square,edge2"]
+	Pad[-23031 28543 -23031 28543 4724 2000 4724 "GND" "44" "square"]
+	Pad[23031 -28543 23031 -28543 4724 2000 4724 "GND" "46" "square,edge2"]
+	Pad[-23031 -28543 -23031 -28543 4724 2000 4724 "GND" "43" "square"]
+	Pad[-24016 -21260 -22047 -21260 2756 2000 2756 "GND" "1" "square"]
+	Pad[-24016 -16535 -22047 -16535 2756 2000 2756 "Res_1" "2" "square"]
+	Pad[-24016 -11811 -22047 -11811 2756 2000 2756 "NC" "3" "square"]
+	Pad[-24016 -7087 -22047 -7087 2756 2000 2756 "Res_2" "4" "square"]
+	Pad[-24016 -2362 -22047 -2362 2756 2000 2756 "WL_EN2" "5" "square"]
+	Pad[-24016 2362 -22047 2362 2756 2000 2756 "WL_RS232_TX" "6" "square"]
+	Pad[-24016 7087 -22047 7087 2756 2000 2756 "WL_EN1" "7" "square"]
+	Pad[-24016 11811 -22047 11811 2756 2000 2756 "WL_RS232_RX" "8" "square"]
+	Pad[-24016 16535 -22047 16535 2756 2000 2756 "GND" "9" "square"]
+	Pad[-24016 21260 -22047 21260 2756 2000 2756 "GND" "10" "square"]
+	Pad[-16535 27559 -16535 29528 2756 2000 2756 "GND" "11" "square,edge2"]
+	Pad[-11811 27559 -11811 29528 2756 2000 2756 "SPI_CS" "12" "square,edge2"]
+	Pad[-7087 27559 -7087 29528 2756 2000 2756 "SPI_DOUT" "13" "square,edge2"]
+	Pad[-2362 27559 -2362 29528 2756 2000 2756 "SPI_IRQ" "14" "square,edge2"]
+	Pad[2362 27559 2362 29528 2756 2000 2756 "SPI_DIN" "15" "square,edge2"]
+	Pad[7087 27559 7087 29528 2756 2000 2756 "GND" "16" "square,edge2"]
+	Pad[11811 27559 11811 29528 2756 2000 2756 "SPI_CLK" "17" "square,edge2"]
+	Pad[16535 27559 16535 29528 2756 2000 2756 "GND" "18" "square,edge2"]
+	Pad[22047 -21260 24016 -21260 2756 2000 2756 "SDA_CC3000" "28" "square,edge2"]
+	Pad[22047 -16535 24016 -16535 2756 2000 2756 "SDA_EEPROM" "27" "square,edge2"]
+	Pad[22047 -11811 24016 -11811 2756 2000 2756 "VBAT_SW_EN" "26" "square,edge2"]
+	Pad[22047 -7087 24016 -7087 2756 2000 2756 "GND" "25" "square,edge2"]
+	Pad[22047 -2362 24016 -2362 2756 2000 2756 "Res_3" "24" "square,edge2"]
+	Pad[22047 2362 24016 2362 2756 2000 2756 "VIO_HOST" "23" "square,edge2"]
+	Pad[22047 7087 24016 7087 2756 2000 2756 "GND" "22" "square,edge2"]
+	Pad[22047 11811 24016 11811 2756 2000 2756 "EXT_32K" "21" "square,edge2"]
+	Pad[22047 16535 24016 16535 2756 2000 2756 "GND" "20" "square,edge2"]
+	Pad[22047 21260 24016 21260 2756 2000 2756 "VBAT_IN" "19" "square,edge2"]
+	Pad[-16535 -29528 -16535 -27559 2756 2000 2756 "GND" "36" "square"]
+	Pad[-11811 -29528 -11811 -27559 2756 2000 2756 "RF_ANT" "35" "square"]
+	Pad[-7087 -29528 -7087 -27559 2756 2000 2756 "GND" "34" "square"]
+	Pad[-2362 -29528 -2362 -27559 2756 2000 2756 "GND" "33" "square"]
+	Pad[2362 -29528 2362 -27559 2756 2000 2756 "GND" "32" "square"]
+	Pad[7087 -29528 7087 -27559 2756 2000 2756 "GND" "31" "square"]
+	Pad[11811 -29528 11811 -27559 2756 2000 2756 "SCL_CC3000" "30" "square"]
+	Pad[16535 -29528 16535 -27559 2756 2000 2756 "SCL_EEPROM" "29" "square"]
+
+	)
+
+Element["" "Shrink small outline package, .65mm, wide" "U1" "SSOP20" 27900 135200 -9200 -13500 0 100 ""]
+(
+	Pad[0 2200 0 4400 1600 3000 2200 "1" "1" "edge2"]
+	Pad[2600 2200 2600 4400 1600 3000 2200 "2" "2" "square,edge2"]
+	Pad[5100 2200 5100 4400 1600 3000 2200 "3" "3" "square,edge2"]
+	Pad[7700 2200 7700 4400 1600 3000 2200 "4" "4" "square,edge2"]
+	Pad[10300 2200 10300 4400 1600 3000 2200 "5" "5" "square,edge2"]
+	Pad[12800 2200 12800 4400 1600 3000 2200 "6" "6" "square,edge2"]
+	Pad[15400 2200 15400 4400 1600 3000 2200 "7" "7" "square,edge2"]
+	Pad[17900 2200 17900 4400 1600 3000 2200 "8" "8" "square,edge2"]
+	Pad[20500 2200 20500 4400 1600 3000 2200 "9" "9" "square,edge2"]
+	Pad[23100 2200 23100 4400 1600 3000 2200 "10" "10" "square,edge2"]
+	Pad[23100 -26400 23100 -24200 1600 3000 2200 "11" "11" "square"]
+	Pad[20500 -26400 20500 -24200 1600 3000 2200 "12" "12" "square"]
+	Pad[18000 -26400 18000 -24200 1600 3000 2200 "13" "13" "square"]
+	Pad[15400 -26400 15400 -24200 1600 3000 2200 "14" "14" "square"]
+	Pad[12800 -26400 12800 -24200 1600 3000 2200 "15" "15" "square"]
+	Pad[10300 -26400 10300 -24200 1600 3000 2200 "16" "16" "square"]
+	Pad[7700 -26400 7700 -24200 1600 3000 2200 "17" "17" "square"]
+	Pad[5200 -26400 5200 -24200 1600 3000 2200 "18" "18" "square"]
+	Pad[2600 -26400 2600 -24200 1600 3000 2200 "19" "19" "square"]
+	Pad[0 -26400 0 -24200 1600 3000 2200 "20" "20" "square"]
+	ElementLine [-2200 6200 -2200 -8500 1000]
+	ElementLine [-2200 -13500 -2200 -28200 1000]
+	ElementLine [-2200 -28200 25300 -28200 1000]
+	ElementLine [25300 6200 25300 -28200 1000]
+	ElementLine [-2200 6200 25300 6200 1000]
+	ElementArc [-2200 -11000 2500 2500 90 180 1000]
+
+	)
+Layer(1 "top")
+(
+	Line[75500 8500 61500 8500 3937 1200 "clearline"]
+	Line[54500 8500 42000 8500 3937 1200 "clearline"]
+	Line[31500 19000 31500 27000 3937 1200 "clearline"]
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+	)
+)
+Layer(10 "silk")
+(
+	Text[111500 19000 3 100 "CC3000 Control Module" "clearline"]
+	Text[112000 81500 3 100 "r1" "clearline"]
+	Text[90500 75500 0 100 "OSHW" "clearline"]
+	Polygon("pin,via")
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+	)
+)
+NetList()
+(
+	Net("+3.3V" "(unknown)")
+	(
+		Connect("C1-2")
+		Connect("C2-2")
+		Connect("C3-2")
+		Connect("IN-1")
+		Connect("OUT-1")
+		Connect("PROGPIC-1")
+		Connect("U1-20")
+		Connect("U3-19")
+		Connect("U3-23")
+		Connect("U?-?")
+	)
+	Net("CS" "(unknown)")
+	(
+		Connect("U1-14")
+		Connect("U3-12")
+	)
+	Net("ENABLE" "(unknown)")
+	(
+		Connect("U1-18")
+		Connect("U3-26")
+	)
+	Net("GND" "(unknown)")
+	(
+		Connect("C1-1")
+		Connect("C2-1")
+		Connect("C3-1")
+		Connect("IN-5")
+		Connect("L1-1")
+		Connect("L2-1")
+		Connect("OUT-5")
+		Connect("PROGPIC-5")
+		Connect("U1-19")
+		Connect("U2-1")
+		Connect("U2-2")
+		Connect("U2-3")
+		Connect("U2-4")
+		Connect("U2-7")
+		Connect("U3-1")
+		Connect("U3-9")
+		Connect("U3-10")
+		Connect("U3-11")
+		Connect("U3-16")
+		Connect("U3-18")
+		Connect("U3-20")
+		Connect("U3-21")
+		Connect("U3-22")
+		Connect("U3-25")
+		Connect("U3-31")
+		Connect("U3-32")
+		Connect("U3-33")
+		Connect("U3-34")
+		Connect("U3-36")
+		Connect("U3-37")
+		Connect("U3-38")
+		Connect("U3-39")
+		Connect("U3-40")
+		Connect("U3-41")
+		Connect("U3-42")
+		Connect("U3-43")
+		Connect("U3-44")
+		Connect("U3-45")
+		Connect("U3-46")
+	)
+	Net("INT" "(unknown)")
+	(
+		Connect("U1-11")
+		Connect("U3-14")
+	)
+	Net("SCK" "(unknown)")
+	(
+		Connect("U1-15")
+		Connect("U3-17")
+	)
+	Net("SCL" "(unknown)")
+	(
+		Connect("IN-3")
+		Connect("OUT-3")
+		Connect("U1-12")
+		Connect("U2-6")
+	)
+	Net("SDA" "(unknown)")
+	(
+		Connect("IN-4")
+		Connect("OUT-4")
+		Connect("U1-13")
+		Connect("U2-5")
+	)
+	Net("SDI" "(unknown)")
+	(
+		Connect("U1-17")
+		Connect("U3-13")
+	)
+	Net("SDO" "(unknown)")
+	(
+		Connect("U1-16")
+		Connect("U3-15")
+	)
+	Net("SIG" "(unknown)")
+	(
+		Connect("IN-2")
+		Connect("J1-1")
+		Connect("U1-10")
+	)
+	Net("unnamed_net1" "(unknown)")
+	(
+		Connect("J1-2")
+		Connect("OUT-2")
+	)
+	Net("unnamed_net2" "(unknown)")
+	(
+		Connect("PROGPIC-2")
+		Connect("U1-1")
+	)
+	Net("unnamed_net3" "(unknown)")
+	(
+		Connect("PROGPIC-3")
+		Connect("U1-2")
+	)
+	Net("unnamed_net4" "(unknown)")
+	(
+		Connect("PROGPIC-4")
+		Connect("U1-3")
+	)
+	Net("unnamed_net5" "(unknown)")
+	(
+		Connect("U1-6")
+	)
+	Net("unnamed_net6" "(unknown)")
+	(
+		Connect("TP1-1")
+		Connect("U3-2")
+	)
+	Net("unnamed_net7" "(unknown)")
+	(
+		Connect("TP2-1")
+		Connect("U3-4")
+	)
+	Net("unnamed_net8" "(unknown)")
+	(
+		Connect("U3-5")
+		Connect("U3-7")
+	)
+	Net("unnamed_net9" "(unknown)")
+	(
+		Connect("TP4-1")
+		Connect("U3-6")
+	)
+	Net("unnamed_net10" "(unknown)")
+	(
+		Connect("TP5-1")
+		Connect("U3-8")
+	)
+	Net("unnamed_net11" "(unknown)")
+	(
+		Connect("TP3-1")
+		Connect("U3-24")
+	)
+	Net("unnamed_net12" "(unknown)")
+	(
+		Connect("U3-27")
+		Connect("U3-28")
+	)
+	Net("unnamed_net13" "(unknown)")
+	(
+		Connect("U3-29")
+		Connect("U3-30")
+	)
+	Net("unnamed_net14" "(unknown)")
+	(
+		Connect("C4-1")
+		Connect("L1-2")
+		Connect("U3-35")
+	)
+	Net("unnamed_net15" "(unknown)")
+	(
+		Connect("ANT1-1")
+		Connect("C4-2")
+		Connect("L2-2")
+	)
+)
+

--- /dev/null
+++ b/schem/Boards/Modules/CC3000_Radio_Module/CC3000_Radio_Module.sch
@@ -1,1 +1,543 @@
+v 20130925 2
+C 52400 43100 1 0 1 connector5-2.sym
+{
+T 52100 45550 5 10 0 0 180 2 1
+device=CONNECTOR_5
+T 51700 42850 5 10 1 1 180 8 1
+footprint=GSIP5
+T 51700 45600 5 10 1 1 180 8 1
+refdes=IN
+}
+C 52900 43400 1 90 0 gnd-1.sym
+N 52600 43500 52400 43500 4
+C 52300 45200 1 0 0 3.3V-plus-1.sym
+N 52500 45200 52500 45100 4
+N 52500 45100 52400 45100 4
+C 52600 44300 1 270 1 busripper-2.sym
+{
+T 53000 44300 5 8 0 0 90 2 1
+device=none
+}
+C 52600 43900 1 270 1 busripper-2.sym
+{
+T 53000 43900 5 8 0 0 90 2 1
+device=none
+}
+N 52400 43900 52600 43900 4
+{
+T 52900 43800 5 10 1 1 0 0 1
+netname=SDA
+}
+N 52400 44300 52600 44300 4
+{
+T 52900 44200 5 10 1 1 0 0 1
+netname=SCL
+}
+C 54200 43100 1 0 0 connector5-2.sym
+{
+T 54500 45550 5 10 0 0 180 8 1
+device=CONNECTOR_5
+T 54900 42850 5 10 1 1 180 2 1
+footprint=GSIP5
+T 54900 45600 5 10 1 1 180 2 1
+refdes=OUT
+}
+C 53800 43400 1 270 1 gnd-1.sym
+N 54100 43500 54200 43500 4
+C 54300 45200 1 0 1 3.3V-plus-1.sym
+N 54100 45200 54100 45100 4
+N 54100 45100 54200 45100 4
+C 54100 44300 1 90 0 busripper-2.sym
+{
+T 53700 44300 5 8 0 0 90 0 1
+device=none
+}
+C 54100 43900 1 90 0 busripper-2.sym
+{
+T 53700 43900 5 8 0 0 90 0 1
+device=none
+}
+N 54200 43900 54100 43900 4
+{
+T 53800 43800 5 10 1 1 0 6 1
+netname=SDA
+}
+N 54200 44300 54100 44300 4
+{
+T 53800 44200 5 10 1 1 0 6 1
+netname=SCL
+}
+N 52400 44700 52800 44700 4
+N 53800 44700 54200 44700 4
+B 58400 42500 4600 1100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 59600 43100 9 24 1 0 0 0 1
+Automation
+T 59800 42900 9 10 1 0 0 0 1
+CC3000 Radio Module
+T 58600 42600 9 10 1 0 0 0 1
+Revision 1
+T 62800 42600 9 10 1 0 0 6 1
+Dr. Yerzinia
+C 52800 44800 1 270 0 jumper-1.sym
+{
+T 53300 44500 5 8 0 0 270 0 1
+device=JUMPER
+T 52700 44900 5 10 1 1 0 0 1
+refdes=J1
+T 53000 44900 5 10 1 1 0 0 1
+footprint=JMP_SLDR-2N
+}
+T 51600 42600 9 10 1 0 0 0 1
+Connectors
+C 55600 43300 1 0 0 MB85RC04V.sym
+{
+T 56000 45200 5 10 1 1 0 0 1
+refdes=U2
+T 56700 45200 5 10 1 1 0 0 1
+footprint=SO8
+T 56000 43300 5 10 1 1 0 0 1
+device=MV85RC04V
+}
+C 55400 43200 1 0 0 gnd-1.sym
+N 55500 43500 55500 44900 4
+N 55500 43700 55600 43700 4
+N 57600 45000 57600 44900 4
+N 57600 44900 57500 44900 4
+N 57500 44500 57600 44500 4
+N 55500 44900 55600 44900 4
+N 55500 44500 55600 44500 4
+N 55500 44100 55600 44100 4
+C 57400 45000 1 0 0 3.3V-plus-1.sym
+N 57500 44100 57600 44100 4
+{
+T 57900 44000 5 10 1 1 0 0 1
+netname=SCL
+}
+C 57600 44100 1 270 1 busripper-2.sym
+{
+T 58000 44100 5 8 0 0 90 2 1
+device=none
+}
+N 57500 43700 57600 43700 4
+{
+T 57900 43600 5 10 1 1 0 0 1
+netname=SDA
+}
+C 57600 43700 1 270 1 busripper-2.sym
+{
+T 58000 43700 5 8 0 0 90 2 1
+device=none
+}
+C 57900 44400 1 90 0 gnd-1.sym
+B 55200 42500 3200 3400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 55300 42600 9 10 1 0 0 0 1
+FRAM
+C 61400 48600 1 270 1 busripper-2.sym
+{
+T 61800 48600 5 8 0 0 90 2 1
+device=none
+}
+C 61400 49000 1 270 1 busripper-2.sym
+{
+T 61800 49000 5 8 0 0 90 2 1
+device=none
+}
+N 61300 49000 61400 49000 4
+{
+T 61700 48900 5 10 1 1 0 0 1
+netname=SDA
+}
+N 61300 48600 61400 48600 4
+{
+T 61700 48500 5 10 1 1 0 0 1
+netname=SCL
+}
+B 51500 42500 3700 3400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 61600 52000 1 0 1 3.3V-plus-1.sym
+N 61700 51800 61300 51800 4
+N 61400 51800 61400 52000 4
+C 62600 51600 1 0 1 capacitor-1.sym
+{
+T 62400 52300 5 10 0 0 0 6 1
+device=CAPACITOR
+T 62400 52500 5 10 0 0 0 6 1
+symversion=0.1
+T 62600 51900 5 10 1 1 0 6 1
+refdes=C1
+T 62000 51600 5 10 1 1 0 6 1
+footprint=0805
+T 62000 51900 5 10 1 1 0 6 1
+value=100nF
+}
+C 62800 51400 1 0 1 gnd-1.sym
+N 62700 51800 62600 51800 4
+N 62700 51700 62700 51800 4
+C 61800 51500 1 90 1 gnd-1.sym
+N 61500 51400 61300 51400 4
+C 50800 50200 1 0 1 connector5-2.sym
+{
+T 50500 52650 5 10 0 0 0 6 1
+device=CONNECTOR_5
+T 50100 49950 5 10 1 1 0 0 1
+footprint=GSIP5
+T 50100 52700 5 10 1 1 0 0 1
+refdes=PROGPIC
+}
+C 51000 50200 1 0 1 gnd-1.sym
+N 50900 50500 50900 50600 4
+C 51100 52300 1 0 1 3.3V-plus-1.sym
+N 50900 52200 50900 52300 4
+N 50800 51800 51800 51800 4
+N 51800 51400 50800 51400 4
+N 51800 51000 50800 51000 4
+N 50900 50600 50800 50600 4
+N 50900 52200 50800 52200 4
+T 51600 46000 9 10 1 0 0 0 1
+Radio
+N 61300 49800 61400 49800 4
+{
+T 61700 49700 5 10 1 1 0 0 1
+netname=SCK
+}
+C 61400 49800 1 270 1 busripper-2.sym
+{
+T 61800 49800 5 8 0 0 90 2 1
+device=none
+}
+N 61300 50200 61400 50200 4
+{
+T 61700 50100 5 10 1 1 0 0 1
+netname=SDO
+}
+C 61400 50200 1 270 1 busripper-2.sym
+{
+T 61800 50200 5 8 0 0 90 2 1
+device=none
+}
+N 61300 50600 61400 50600 4
+{
+T 61700 50500 5 10 1 1 0 0 1
+netname=SDI
+}
+C 61400 50600 1 270 1 busripper-2.sym
+{
+T 61800 50600 5 8 0 0 90 2 1
+device=none
+}
+N 61300 49400 61400 49400 4
+{
+T 61700 49300 5 10 1 1 0 0 1
+netname=CS
+}
+C 61400 49400 1 270 1 busripper-2.sym
+{
+T 61800 49400 5 8 0 0 90 2 1
+device=none
+}
+N 61300 48200 61400 48200 4
+{
+T 61700 48100 5 10 1 1 0 0 1
+netname=INT
+}
+C 61400 48200 1 270 1 busripper-2.sym
+{
+T 61800 48200 5 8 0 0 90 2 1
+device=none
+}
+N 61300 51000 61400 51000 4
+{
+T 61700 50900 5 10 1 1 0 0 1
+netname=ENABLE
+}
+C 61400 51000 1 270 1 busripper-2.sym
+{
+T 61800 51000 5 8 0 0 90 2 1
+device=none
+}
+C 51800 47800 1 0 0 PIC24F04KA201.sym
+{
+T 52200 52100 5 10 1 1 0 0 1
+refdes=U1
+T 52200 47800 5 10 1 1 0 0 1
+footprint=SSOP20
+T 60900 47800 5 10 1 1 0 6 1
+device=PIC24F04KA201
+}
+N 51600 49800 51800 49800 4
+C 51700 48200 1 90 0 busripper-2.sym
+{
+T 51300 48200 5 8 0 0 90 0 1
+device=none
+}
+N 51800 48200 51700 48200 4
+{
+T 51400 48100 5 10 1 1 0 6 1
+netname=SIG
+}
+N 52600 44700 52600 45300 4
+N 52600 45300 52800 45300 4
+{
+T 53100 45200 5 10 1 1 0 0 1
+netname=SIG
+}
+C 52800 45300 1 270 1 busripper-2.sym
+{
+T 53200 45300 5 8 0 0 90 2 1
+device=none
+}
+C 45500 43300 1 0 0 CC3000.sym
+{
+T 45900 53200 5 10 1 1 0 0 1
+refdes=U3
+T 48100 53200 5 10 1 1 0 6 1
+device=CC3000
+T 45900 43400 5 10 1 1 0 2 1
+footprint=CC3000
+}
+N 45500 52900 45300 52900 4
+N 45300 52900 45300 43500 4
+C 45200 43200 1 0 0 gnd-1.sym
+N 45500 52500 45300 52500 4
+N 45500 52100 45300 52100 4
+N 45500 51700 45300 51700 4
+N 45500 51300 45300 51300 4
+N 45500 43700 45300 43700 4
+N 45500 44100 45300 44100 4
+N 45500 44500 45300 44500 4
+N 45500 44900 45300 44900 4
+N 45500 45300 45300 45300 4
+N 45500 45700 45300 45700 4
+N 45500 46100 45300 46100 4
+N 45500 46500 45300 46500 4
+N 45500 46900 45300 46900 4
+N 45500 47300 45300 47300 4
+N 45500 47700 45300 47700 4
+N 45500 48100 45300 48100 4
+N 45500 48500 45300 48500 4
+N 45500 48900 45300 48900 4
+N 45500 49300 45300 49300 4
+N 45500 50900 45300 50900 4
+N 45500 50500 45300 50500 4
+N 45500 50100 45300 50100 4
+N 45500 49700 45300 49700 4
+C 48500 43700 1 0 0 gnd-1.sym
+N 48600 44000 48600 44100 4
+N 48600 44100 48500 44100 4
+C 50000 46600 1 0 1 3.3V-plus-1.sym
+N 49800 46600 49800 45700 4
+N 49800 45700 48500 45700 4
+N 48500 45300 48700 45300 4
+N 48700 45300 48700 45700 4
+N 48500 49300 48700 49300 4
+N 48700 49300 48700 48900 4
+N 48700 48900 48500 48900 4
+N 48500 48100 48700 48100 4
+N 48700 48100 48700 48500 4
+N 48700 48500 48500 48500 4
+N 48500 50500 48700 50500 4
+N 48700 50500 48700 50900 4
+N 48700 50900 48500 50900 4
+C 49000 52400 1 90 0 gnd-1.sym
+N 48700 52500 48500 52500 4
+C 48700 52200 1 270 0 testpt-1.sym
+{
+T 49200 52000 5 10 1 1 0 0 1
+refdes=TP1
+T 49600 51800 5 10 0 0 270 0 1
+device=TESTPOINT
+T 49100 52100 5 10 0 1 0 0 1
+footprint=CON_TP__Vector_K24
+}
+N 48500 52100 48700 52100 4
+C 48700 51800 1 270 0 testpt-1.sym
+{
+T 49200 51600 5 10 1 1 0 0 1
+refdes=TP2
+T 49600 51400 5 10 0 0 270 0 1
+device=TESTPOINT
+T 49100 51700 5 10 0 1 0 0 1
+footprint=CON_TP__Vector_K24
+}
+C 48700 51400 1 270 0 testpt-1.sym
+{
+T 49200 51200 5 10 1 1 0 0 1
+refdes=TP3
+T 49600 51000 5 10 0 0 270 0 1
+device=TESTPOINT
+T 49000 51200 5 10 0 1 0 0 1
+footprint=CON_TP__Vector_K24
+}
+N 48700 51700 48500 51700 4
+N 48500 51300 48700 51300 4
+N 48500 46100 48600 46100 4
+{
+T 48900 46000 5 10 1 1 0 0 1
+netname=SCK
+}
+C 48600 46100 1 270 1 busripper-2.sym
+{
+T 49000 46100 5 8 0 0 90 2 1
+device=none
+}
+N 48500 47300 48600 47300 4
+{
+T 48900 47200 5 10 1 1 0 0 1
+netname=SDI
+}
+C 48600 47300 1 270 1 busripper-2.sym
+{
+T 49000 47300 5 8 0 0 90 2 1
+device=none
+}
+N 48500 46500 48600 46500 4
+{
+T 48900 46400 5 10 1 1 0 0 1
+netname=SDO
+}
+C 48600 46500 1 270 1 busripper-2.sym
+{
+T 49000 46500 5 8 0 0 90 2 1
+device=none
+}
+N 48500 47700 48600 47700 4
+{
+T 48900 47600 5 10 1 1 0 0 1
+netname=CS
+}
+C 48600 47700 1 270 1 busripper-2.sym
+{
+T 49000 47700 5 8 0 0 90 2 1
+device=none
+}
+N 48500 46900 48600 46900 4
+{
+T 48900 46800 5 10 1 1 0 0 1
+netname=INT
+}
+C 48600 46900 1 270 1 busripper-2.sym
+{
+T 49000 46900 5 8 0 0 90 2 1
+device=none
+}
+N 48500 44900 48600 44900 4
+{
+T 48900 44800 5 10 1 1 0 0 1
+netname=ENABLE
+}
+C 48600 44900 1 270 1 busripper-2.sym
+{
+T 49000 44900 5 8 0 0 90 2 1
+device=none
+}
+C 49700 44300 1 0 0 capacitor-1.sym
+{
+T 49900 45000 5 10 0 0 0 0 1
+device=CAPACITOR
+T 50000 44600 5 10 1 1 0 6 1
+refdes=C4
+T 49900 45200 5 10 0 0 0 0 1
+symversion=0.1
+T 50300 44400 5 10 1 1 0 2 1
+footprint=0805
+}
+C 49600 43400 1 90 0 inductor-1.sym
+{
+T 49100 43600 5 10 0 0 90 0 1
+device=INDUCTOR
+T 49600 43900 5 10 1 1 0 0 1
+refdes=L1
+T 48900 43600 5 10 0 0 90 0 1
+symversion=0.1
+T 49600 43700 5 10 1 1 0 0 1
+footprint=0805
+}
+C 50900 43400 1 90 0 inductor-1.sym
+{
+T 50400 43600 5 10 0 0 90 0 1
+device=INDUCTOR
+T 50900 43900 5 10 1 1 0 0 1
+refdes=L2
+T 50200 43600 5 10 0 0 90 0 1
+symversion=0.1
+T 50900 43700 5 10 1 1 0 0 1
+footprint=0805
+}
+N 48500 44500 49700 44500 4
+N 49500 44500 49500 44300 4
+N 50800 44300 50800 44500 4
+N 50600 44500 51000 44500 4
+C 49400 42900 1 0 0 gnd-1.sym
+N 49500 43200 49500 43400 4
+C 50700 42900 1 0 0 gnd-1.sym
+N 50800 43200 50800 43400 4
+N 51000 44500 51000 44600 4
+L 51500 42500 44900 42500 3 0 0 0 -1 -1
+L 44900 42500 44900 53600 3 0 0 0 -1 -1
+L 44900 53600 49700 53600 3 0 0 0 -1 -1
+L 49700 53600 49700 47100 3 0 0 0 -1 -1
+L 51500 45800 51500 47100 3 0 0 0 -1 -1
+L 51500 47100 49700 47100 3 0 0 0 -1 -1
+L 49700 53600 63000 53600 3 0 0 0 -1 -1
+L 63000 53600 63000 43600 3 0 0 0 -1 -1
+C 50700 44600 1 0 0 antenna.sym
+{
+T 49300 45300 5 10 1 1 0 0 1
+refdes=ANT1
+T 49300 45100 5 10 1 1 0 0 1
+footprint=2500AT44M0400
+}
+T 45000 42600 9 10 1 0 0 0 1
+WiFi
+C 48700 50200 1 270 0 testpt-1.sym
+{
+T 49600 49800 5 10 0 0 270 0 1
+device=TESTPOINT
+T 48900 50100 5 10 0 1 0 0 1
+footprint=CON_TP__Vector_K24
+T 49200 50000 5 10 1 1 0 0 1
+refdes=TP4
+}
+C 48700 49800 1 270 0 testpt-1.sym
+{
+T 49600 49400 5 10 0 0 270 0 1
+device=TESTPOINT
+T 49200 49600 5 10 1 1 0 0 1
+refdes=TP5
+T 48900 49700 5 10 0 1 0 0 1
+footprint=CON_TP__Vector_K24
+}
+N 48700 50100 48500 50100 4
+N 48500 49700 48700 49700 4
+C 50900 46000 1 180 0 capacitor-1.sym
+{
+T 50700 45300 5 10 0 0 180 0 1
+device=CAPACITOR
+T 50300 45900 5 10 1 1 0 6 1
+refdes=C3
+T 50700 45100 5 10 0 0 180 0 1
+symversion=0.1
+T 50600 45700 5 10 1 1 0 2 1
+footprint=0805
+T 50600 45900 5 10 1 1 0 0 1
+value=1uF
+}
+C 50900 46600 1 180 0 capacitor-1.sym
+{
+T 50700 45900 5 10 0 0 180 0 1
+device=CAPACITOR
+T 50300 46500 5 10 1 1 0 6 1
+refdes=C2
+T 50700 45700 5 10 0 0 180 0 1
+symversion=0.1
+T 50600 46300 5 10 1 1 0 2 1
+footprint=0805
+T 50600 46500 5 10 1 1 0 0 1
+value=1uF
+}
+N 50000 46400 49800 46400 4
+C 51400 45700 1 90 0 gnd-1.sym
+N 51100 45800 50900 45800 4
+C 51400 46300 1 90 0 gnd-1.sym
+N 51100 46400 50900 46400 4
+N 50000 45800 49800 45800 4
 

--- a/schem/Boards/Modules/MRF24J40MA_Radio_Module/MRF24J40MA_Radio_Module.pcb
+++ b/schem/Boards/Modules/MRF24J40MA_Radio_Module/MRF24J40MA_Radio_Module.pcb
@@ -6,7 +6,7 @@
 PCB["" 112000 126000]
 
 Grid[500.0 0 0 0]
-Cursor[0 119500 0.000000]
+Cursor[97500 53500 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[800 800 800 800 1300 800]
@@ -795,12 +795,12 @@
 Via[84000 55500 3600 2000 0 2000 "" ""]
 Via[84000 43000 3600 2000 0 2000 "" ""]
 Via[50000 38000 3600 2000 0 2000 "" ""]
-Via[79000 32000 3600 2000 0 2000 "" ""]
-Via[73000 27500 3600 2000 0 2000 "" ""]
 Via[98000 30500 3600 2000 0 2000 "" ""]
 Via[56000 61500 3600 2000 0 2000 "" ""]
 Via[77500 14000 3600 2000 0 2000 "" ""]
 Via[95000 11000 3600 2000 0 2000 "" ""]
+Via[79500 21000 3600 2000 0 2000 "" ""]
+Via[79000 28000 3600 2000 0 2000 "" ""]
 
 Element["" "GSIP5" "PROGPIC" "unknown" 22000 7500 49000 -3500 0 100 ""]
 (
@@ -833,6 +833,139 @@
 	Pad[-3543 -393 -3543 393 5118 2000 5718 "2" "2" "onsolder,square"]
 	ElementLine [-393 -2755 393 -2755 800]
 	ElementLine [-393 2755 393 2755 800]
+
+	)
+
+Element["onsolder" "SO8" "U2" "unknown" 38000 48250 -9250 -16250 0 100 "auto"]
+(
+	Attribute("device" "MV85RC04V")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "NC" "1" "onsolder,square"]
+	Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "A1" "2" "onsolder,square"]
+	Pad[2500 -13500 2500 -7000 2000 1000 3000 "A2" "3" "onsolder,square"]
+	Pad[7500 -13500 7500 -7000 2000 1000 3000 "VSS" "4" "onsolder,square"]
+	Pad[7500 7000 7500 13500 2000 1000 3000 "SDA" "5" "onsolder,square,edge2"]
+	Pad[2500 7000 2500 13500 2000 1000 3000 "SCL" "6" "onsolder,square,edge2"]
+	Pad[-2500 7000 -2500 13500 2000 1000 3000 "WP" "7" "onsolder,square,edge2"]
+	Pad[-7500 7000 -7500 13500 2000 1000 3000 "8" "8" "onsolder,square,edge2"]
+	ElementLine [-9500 -15500 9500 -15500 1000]
+	ElementLine [9500 -15500 9500 15500 1000]
+	ElementLine [-9500 15500 9500 15500 1000]
+	ElementLine [-9500 -15500 -9500 -2500 1000]
+	ElementLine [-9500 2500 -9500 15500 1000]
+	ElementArc [-9500 0 2500 2500 90 180 1000]
+
+	)
+
+Element["onsolder" "JMP_SLDR-2N" "J1" "unknown" 90000 24500 -13000 2750 0 100 "auto"]
+(
+	Attribute("device" "JUMPER")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3000 -1250 -3000 1250 5000 2000 7000 "1" "1" "onsolder,octagon"]
+	Pad[-1750 -2500 -1750 2500 2500 2000 4500 "1" "1" "onsolder,square"]
+	Pad[3000 -1250 3000 1250 5000 2000 7000 "2" "2" "onsolder,octagon"]
+	Pad[1750 -2500 1750 2500 2500 2000 4500 "2" "2" "onsolder,square"]
+	ElementLine [3000 -5250 -3000 -5250 1000]
+	ElementLine [3000 5250 -3000 5250 1000]
+	ElementArc [-3000 1250 4000 4000 0 90 1000]
+	ElementArc [-3000 -1250 4000 4000 270 90 1000]
+	ElementArc [3000 -1250 4000 4000 180 90 1000]
+	ElementArc [3000 1250 4000 4000 90 90 1000]
+
+	)
+
+Element["" "GSIP5" "OUT" "unknown" 104000 14500 -4000 -13000 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
+	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
+	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
+	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
+	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
+	ElementLine [-5000 0 -5000 40000 2000]
+	ElementLine [5000 0 5000 40000 2000]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 180 180 2000]
+	ElementArc [0 40000 5000 5000 0 180 2000]
+
+	)
+
+Element["" "GSIP5" "IN" "unknown" 7500 14500 -2500 -12500 0 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
+	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
+	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
+	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
+	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
+	ElementLine [-5000 0 -5000 40000 2000]
+	ElementLine [5000 0 5000 40000 2000]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 180 180 2000]
+	ElementArc [0 40000 5000 5000 0 180 2000]
+
+	)
+
+Element["onsolder" "CHS01TA" "S1" "unknown" 88335 6000 -6169 11437 0 100 "auto"]
+(
+	Attribute("device" "SPST")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[11654 0 14016 0 3937 0 3937 "1" "1" "onsolder,square,edge2"]
+	Pad[-14016 0 -11654 0 3937 0 3937 "2" "2" "onsolder,square"]
+	ElementLine [-17953 3937 17953 3937 1000]
+	ElementLine [17953 -3937 17953 3937 1000]
+	ElementLine [-17953 -3937 17953 -3937 1000]
+	ElementLine [-17953 -3937 -17953 3937 1000]
+	ElementLine [0 0 3937 -3937 1000]
+	ElementLine [0 0 -3937 -3937 1000]
+
+	)
+
+Element["onsolder" "Shrink small outline package, .65mm, wide" "U1" "SSOP20" 63600 37300 3800 13000 0 100 "auto"]
+(
+	Pad[0 -4400 0 -2200 1600 3000 2200 "1" "1" "onsolder"]
+	Pad[2600 -4400 2600 -2200 1600 3000 2200 "2" "2" "onsolder,square"]
+	Pad[5100 -4400 5100 -2200 1600 3000 2200 "3" "3" "onsolder,square"]
+	Pad[7700 -4400 7700 -2200 1600 3000 2200 "4" "4" "onsolder,square"]
+	Pad[10300 -4400 10300 -2200 1600 3000 2200 "5" "5" "onsolder,square"]
+	Pad[12800 -4400 12800 -2200 1600 3000 2200 "6" "6" "onsolder,square"]
+	Pad[15400 -4400 15400 -2200 1600 3000 2200 "7" "7" "onsolder,square"]
+	Pad[17900 -4400 17900 -2200 1600 3000 2200 "8" "8" "onsolder,square"]
+	Pad[20500 -4400 20500 -2200 1600 3000 2200 "9" "9" "onsolder,square"]
+	Pad[23100 -4400 23100 -2200 1600 3000 2200 "10" "10" "onsolder,square"]
+	Pad[23100 24200 23100 26400 1600 3000 2200 "11" "11" "onsolder,square,edge2"]
+	Pad[20500 24200 20500 26400 1600 3000 2200 "12" "12" "onsolder,square,edge2"]
+	Pad[18000 24200 18000 26400 1600 3000 2200 "13" "13" "onsolder,square,edge2"]
+	Pad[15400 24200 15400 26400 1600 3000 2200 "14" "14" "onsolder,square,edge2"]
+	Pad[12800 24200 12800 26400 1600 3000 2200 "15" "15" "onsolder,square,edge2"]
+	Pad[10300 24200 10300 26400 1600 3000 2200 "16" "16" "onsolder,square,edge2"]
+	Pad[7700 24200 7700 26400 1600 3000 2200 "17" "17" "onsolder,square,edge2"]
+	Pad[5200 24200 5200 26400 1600 3000 2200 "18" "18" "onsolder,square,edge2"]
+	Pad[2600 24200 2600 26400 1600 3000 2200 "19" "19" "onsolder,square,edge2"]
+	Pad[0 24200 0 26400 1600 3000 2200 "20" "20" "onsolder,square,edge2"]
+	ElementLine [-2200 -6200 -2200 8500 1000]
+	ElementLine [-2200 13500 -2200 28200 1000]
+	ElementLine [-2200 28200 25300 28200 1000]
+	ElementLine [25300 -6200 25300 28200 1000]
+	ElementLine [-2200 -6200 25300 -6200 1000]
+	ElementArc [-2200 11000 2500 2500 90 180 1000]
 
 	)
 
@@ -863,144 +996,6 @@
 	ElementLine [0 74563 -3937 78500 1000]
 
 	)
-
-Element["onsolder" "SO8" "U2" "unknown" 38000 48250 -9250 -16250 0 100 "auto"]
-(
-	Attribute("device" "MV85RC04V")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "NC" "1" "onsolder,square"]
-	Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "A1" "2" "onsolder,square"]
-	Pad[2500 -13500 2500 -7000 2000 1000 3000 "A2" "3" "onsolder,square"]
-	Pad[7500 -13500 7500 -7000 2000 1000 3000 "VSS" "4" "onsolder,square"]
-	Pad[7500 7000 7500 13500 2000 1000 3000 "SDA" "5" "onsolder,square,edge2"]
-	Pad[2500 7000 2500 13500 2000 1000 3000 "SCL" "6" "onsolder,square,edge2"]
-	Pad[-2500 7000 -2500 13500 2000 1000 3000 "WP" "7" "onsolder,square,edge2"]
-	Pad[-7500 7000 -7500 13500 2000 1000 3000 "8" "8" "onsolder,square,edge2"]
-	ElementLine [-9500 -15500 9500 -15500 1000]
-	ElementLine [9500 -15500 9500 15500 1000]
-	ElementLine [-9500 15500 9500 15500 1000]
-	ElementLine [-9500 -15500 -9500 -2500 1000]
-	ElementLine [-9500 2500 -9500 15500 1000]
-	ElementArc [-9500 0 2500 2500 90 180 1000]
-
-	)
-
-Element["onsolder" "JMP_SLDR-2N" "J1" "unknown" 90000 24500 -13000 2750 0 100 "auto"]
-(
-	Attribute("device" "JUMPER")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pad[-3000 -1250 -3000 1250 5000 2000 7000 "1" "1" "onsolder,octagon"]
-	Pad[-1750 -2500 -1750 2500 2500 2000 4500 "1" "1" "onsolder,square"]
-	Pad[3000 -1250 3000 1250 5000 2000 7000 "2" "2" "onsolder,octagon"]
-	Pad[1750 -2500 1750 2500 2500 2000 4500 "2" "2" "onsolder,square"]
-	ElementLine [3000 -5250 -3000 -5250 1000]
-	ElementLine [3000 5250 -3000 5250 1000]
-	ElementArc [-3000 1250 4000 4000 0 90 1000]
-	ElementArc [-3000 -1250 4000 4000 270 90 1000]
-	ElementArc [3000 -1250 4000 4000 180 90 1000]
-	ElementArc [3000 1250 4000 4000 90 90 1000]
-
-	)
-
-Element["" "GSIP5" "OUT" "unknown" 104000 14500 -4000 -13000 0 100 ""]
-(
-	Attribute("device" "CONNECTOR_5")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
-	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
-	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
-	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
-	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
-	ElementLine [-5000 0 -5000 40000 2000]
-	ElementLine [5000 0 5000 40000 2000]
-	ElementLine [-5000 5000 5000 5000 1000]
-	ElementArc [0 0 5000 5000 180 180 2000]
-	ElementArc [0 40000 5000 5000 0 180 2000]
-
-	)
-
-Element["" "GSIP5" "IN" "unknown" 7500 14500 -2500 -12500 0 100 ""]
-(
-	Attribute("device" "CONNECTOR_5")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
-	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
-	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
-	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
-	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
-	ElementLine [-5000 0 -5000 40000 2000]
-	ElementLine [5000 0 5000 40000 2000]
-	ElementLine [-5000 5000 5000 5000 1000]
-	ElementArc [0 0 5000 5000 180 180 2000]
-	ElementArc [0 40000 5000 5000 0 180 2000]
-
-	)
-
-Element["onsolder" "SSOP20" "U1" "unknown" 63700 37900 -1000 -4400 0 100 "auto"]
-(
-	Attribute("device" "PIC24F04KA201")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pad[0 -1500 0 700 1600 3000 2200 "MCLR/VPP/RA5" "1" "onsolder"]
-	Pad[2600 -1500 2600 700 1600 3000 2200 "PGC2/AN0/VREF+/CN2/RA0" "2" "onsolder,square"]
-	Pad[5100 -1500 5100 700 1600 3000 2200 "PGD2/AN1/VREF-/CN3/RA1" "3" "onsolder,square"]
-	Pad[7700 -1500 7700 700 1600 3000 2200 "AN2/C2INB/CN4/RB0" "4" "onsolder,square"]
-	Pad[10300 -1500 10300 700 1600 3000 2200 "AN3/C2INA/CN5/RB1" "5" "onsolder,square"]
-	Pad[12800 -1500 12800 700 1600 3000 2200 "U1RX/CN6/RB2" "6" "onsolder,square"]
-	Pad[15400 -1500 15400 700 1600 3000 2200 "OSCI/CLKI/AN4/C1INB/CN30/RA2" "7" "onsolder,square"]
-	Pad[17900 -1500 17900 700 1600 3000 2200 "OSCO/CLKO/AN5/C1INA/CN29/RA3" "8" "onsolder,square"]
-	Pad[20500 -1500 20500 700 1600 3000 2200 "PGD3/SOSCI/CN1/RB4" "9" "onsolder,square"]
-	Pad[23100 -1500 23100 700 1600 3000 2200 "PGC3/SOSCO/T1CK/CN0/RA4" "10" "onsolder,square"]
-	Pad[23100 21300 23100 23500 1600 3000 2200 "U1TX/INT0/CN23/RB7" "11" "onsolder,square,edge2"]
-	Pad[20500 21300 20500 23500 1600 3000 2200 "SCL1/U1CTS/CN22/RB8" "12" "onsolder,square,edge2"]
-	Pad[18000 21300 18000 23500 1600 3000 2200 "SDA1/U1BCLK/U1RTS/CN21/RB9" "13" "onsolder,square,edge2"]
-	Pad[15400 21300 15400 23500 1600 3000 2200 "OC1/IC1/C2OUT/INT2/CTED1/CN8/RA6" "14" "onsolder,square,edge2"]
-	Pad[12800 21300 12800 23500 1600 3000 2200 "AN12/HLVDIN/SCK1/CTED2/CN14/RB12" "15" "onsolder,square,edge2"]
-	Pad[10300 21300 10300 23500 1600 3000 2200 "AN11/SDO1/CTPLS/CN13/RB13" "16" "onsolder,square,edge2"]
-	Pad[7700 21300 7700 23500 1600 3000 2200 "AN10/CVREF/SDI1/OCFA/C1OUT/INT1/CN12/RB14" "17" "onsolder,square,edge2"]
-	Pad[5200 21300 5200 23500 1600 3000 2200 "REFO/SS1/T2CK/T3CK/CN11/RB15" "18" "onsolder,square,edge2"]
-	Pad[2600 21300 2600 23500 1600 3000 2200 "VSS" "19" "onsolder,square,edge2"]
-	Pad[0 21300 0 23500 1600 3000 2200 "VDD" "20" "onsolder,square,edge2"]
-	ElementLine [-2200 -3300 -2200 8500 1000]
-	ElementLine [-2200 13500 -2200 25300 1000]
-	ElementLine [-2200 25300 25300 25300 1000]
-	ElementLine [25300 -3300 25300 25300 1000]
-	ElementLine [-2200 -3300 25300 -3300 1000]
-	ElementArc [-2200 11000 2500 2500 90 180 1000]
-
-	)
-
-Element["onsolder" "CHS01TA" "S1" "unknown" 88335 6000 -6169 11437 0 100 "auto"]
-(
-	Attribute("device" "SPST")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pad[11654 0 14016 0 3937 0 3937 "1" "1" "onsolder,square,edge2"]
-	Pad[-14016 0 -11654 0 3937 0 3937 "2" "2" "onsolder,square"]
-	ElementLine [-17953 3937 17953 3937 1000]
-	ElementLine [17953 -3937 17953 3937 1000]
-	ElementLine [-17953 -3937 17953 -3937 1000]
-	ElementLine [-17953 -3937 -17953 3937 1000]
-	ElementLine [0 0 3937 -3937 1000]
-	ElementLine [0 0 -3937 -3937 1000]
-
-	)
 Layer(1 "top")
 (
 	Line[21000 70500 21000 60500 1000 2000 "clearline"]
@@ -1026,7 +1021,6 @@
 	Line[85500 50000 90500 50000 1000 2000 "clearline"]
 	Line[90500 50000 91000 50500 1000 2000 "clearline"]
 	Line[84000 43000 88500 43000 1000 2000 "clearline"]
-	Line[88500 43000 91000 40500 1000 2000 "clearline"]
 	Line[84000 55500 46000 55500 1000 2000 "clearline"]
 	Line[46000 55500 37000 46500 1000 2000 "clearline"]
 	Line[37000 46500 37000 39000 1000 2000 "clearline"]
@@ -1042,18 +1036,9 @@
 	Line[50000 30000 50000 38000 1000 2000 "clearline"]
 	Line[79000 44000 80500 45500 1000 2000 "clearline"]
 	Line[80500 45500 80500 52000 1000 2000 "clearline"]
-	Line[79000 44000 79000 32000 1000 2000 "clearline"]
-	Line[76500 49000 76500 34500 1000 2000 "clearline"]
-	Line[78500 28000 80500 28000 1000 2000 "clearline"]
-	Line[80500 28000 83500 31000 1000 2000 "clearline"]
 	Line[83500 31000 90500 31000 1000 2000 "clearline"]
 	Line[90500 31000 91000 30500 1000 2000 "clearline"]
-	Line[76500 34500 75500 33500 1000 2000 "clearline"]
-	Line[75500 33500 75500 30500 1000 2000 "clearline"]
-	Line[75500 30500 78000 28000 1000 2000 "clearline"]
-	Line[78000 28000 79000 28000 1000 2000 "clearline"]
 	Line[91000 20500 80000 20500 1000 2000 "clearline"]
-	Line[80000 20500 73000 27500 1000 2000 "clearline"]
 	Line[98000 30500 98000 58500 1000 2000 "clearline"]
 	Line[98000 58500 96000 60500 1000 2000 "clearline"]
 	Line[96000 60500 91000 60500 1000 2000 "clearline"]
@@ -1068,9 +1053,18 @@
 	Line[95000 11000 81500 11000 1000 2000 "clearline"]
 	Line[56000 64500 62000 70500 1000 2000 "clearline"]
 	Line[56000 61500 56000 64500 1000 2000 "clearline"]
-	Line[103000 70500 62000 70500 1000 2000 "clearline"]
 	Line[103000 70500 104000 69500 1000 2000 "clearline"]
 	Line[104000 69500 104000 54500 1000 2000 "clearline"]
+	Line[88500 43000 91000 40500 1000 2000 "clearline"]
+	Line[79000 44000 79000 27500 1000 2000 "clearline"]
+	Line[83500 31000 82500 30000 1000 2000 "clearline"]
+	Line[82500 30000 82500 25500 1000 2000 "clearline"]
+	Line[82500 25500 81500 24500 1000 2000 "clearline"]
+	Line[81500 24500 76500 24500 1000 2000 "clearline"]
+	Line[76500 24500 75500 25500 1000 2000 "clearline"]
+	Line[75500 25500 75500 48000 1000 2000 "clearline"]
+	Line[75500 48000 76500 49000 1000 2000 "clearline"]
+	Line[103000 70500 62000 70500 1000 2000 "clearline"]
 )
 Layer(2 "ground")
 (
@@ -1090,23 +1084,12 @@
 	Line[62000 19000 62000 7500 1000 2000 "clearline"]
 	Line[35500 58500 35500 38000 1000 2000 "clearline"]
 	Line[30500 38000 45500 38000 1000 2000 "clearline"]
-	Line[58000 28000 63500 33500 1000 2000 "clearline"]
-	Line[63500 33500 63500 37300 1000 2000 "clearline"]
-	Line[63500 37300 63700 37500 1000 2000 "clearline"]
 	Line[42000 7500 42000 24000 1000 2000 "clearline"]
 	Line[42000 24000 44000 26000 1000 2000 "clearline"]
-	Line[44000 26000 59000 26000 1000 2000 "clearline"]
-	Line[59000 26000 66000 33000 1000 2000 "clearline"]
-	Line[66000 33000 66000 37200 1000 2000 "clearline"]
-	Line[66000 37200 66300 37500 1000 2000 "clearline"]
 	Line[52000 7500 50000 7500 1000 2000 "clearline"]
 	Line[50000 7500 44000 13500 1000 2000 "clearline"]
 	Line[44000 13500 44000 23000 1000 2000 "clearline"]
 	Line[44000 23000 45000 24000 1000 2000 "clearline"]
-	Line[45000 24000 60000 24000 1000 2000 "clearline"]
-	Line[60000 24000 69000 33000 1000 2000 "clearline"]
-	Line[69000 33000 69000 37300 1000 2000 "clearline"]
-	Line[69000 37300 68800 37500 1000 2000 "clearline"]
 	Line[32000 7500 34500 7500 1000 2000 "clearline"]
 	Line[34500 7500 40000 13000 1000 2000 "clearline"]
 	Line[40000 13000 40000 25000 1000 2000 "clearline"]
@@ -1119,7 +1102,6 @@
 	Line[7500 44500 12500 44500 1000 2000 "clearline"]
 	Line[12500 44500 17000 49000 1000 2000 "clearline"]
 	Line[17000 49000 17000 62500 1000 2000 "clearline"]
-	Line[17000 62500 22000 67500 1000 2000 "clearline"]
 	Line[7500 34500 12000 34500 1000 2000 "clearline"]
 	Line[12000 34500 19000 41500 1000 2000 "clearline"]
 	Line[19000 41500 19000 61500 1000 2000 "clearline"]
@@ -1130,17 +1112,6 @@
 	Line[104000 44500 103000 44500 1000 2000 "clearline"]
 	Line[103000 44500 98500 49000 1000 2000 "clearline"]
 	Line[98500 49000 98500 62500 1000 2000 "clearline"]
-	Line[98500 62500 94000 67000 1000 2000 "clearline"]
-	Line[94000 67000 84000 67000 1000 2000 "clearline"]
-	Line[22000 67500 83500 67500 1000 2000 "clearline"]
-	Line[83500 67500 84000 67000 1000 2000 "clearline"]
-	Line[81700 60300 81700 67300 1000 2000 "clearline"]
-	Line[81700 67300 81500 67500 1000 2000 "clearline"]
-	Line[45500 58500 45500 67500 1000 2000 "clearline"]
-	Line[84200 60300 84200 64200 1000 2000 "clearline"]
-	Line[84200 64200 85000 65000 1000 2000 "clearline"]
-	Line[85000 65000 93000 65000 1000 2000 "clearline"]
-	Line[93000 65000 96500 61500 1000 2000 "clearline"]
 	Line[96500 61500 96500 42000 1000 2000 "clearline"]
 	Line[96500 42000 104000 34500 1000 2000 "clearline"]
 	Line[57000 2500 57000 11500 1000 2000 "clearline"]
@@ -1156,33 +1127,21 @@
 	Line[42000 30000 56500 30000 1000 2000 "clearline"]
 	Line[56500 30000 60500 34000 1000 2000 "clearline"]
 	Line[60500 34000 60500 54000 1000 2000 "clearline"]
-	Line[60500 54000 64000 57500 1000 2000 "clearline"]
-	Line[64000 57500 64000 60000 1000 2000 "clearline"]
-	Line[64000 60000 63700 60300 1000 2000 "clearline"]
-	Line[66300 60300 66300 64200 1000 2000 "clearline"]
-	Line[66300 64200 65500 65000 1000 2000 "clearline"]
-	Line[65500 65000 51000 65000 1000 2000 "clearline"]
 	Line[51000 65000 49500 63500 1000 2000 "clearline"]
 	Line[49500 63500 49500 53500 1000 2000 "clearline"]
 	Line[49500 53500 47000 51000 1000 2000 "clearline"]
 	Line[47000 51000 35500 51000 1000 2000 "clearline"]
 	Line[84000 14000 87000 17000 1000 2000 "clearline"]
 	Line[87000 17000 87000 24500 1000 2000 "clearline"]
-	Line[71400 60300 71400 49100 1000 2000 "clearline"]
 	Line[71400 49100 71500 49000 1000 2000 "clearline"]
-	Line[68900 60300 68900 51900 1000 2000 "clearline"]
 	Line[68900 51900 68000 51000 1000 2000 "clearline"]
 	Line[68000 51000 68000 47000 1000 2000 "clearline"]
 	Line[68000 47000 69500 45500 1000 2000 "clearline"]
 	Line[69500 45500 80500 45500 1000 2000 "clearline"]
 	Line[80500 45500 85000 50000 1000 2000 "clearline"]
-	Line[74000 60300 74000 51500 1000 2000 "clearline"]
 	Line[74000 51500 76500 49000 1000 2000 "clearline"]
-	Line[76500 60300 76500 53500 1000 2000 "clearline"]
-	Line[76500 53500 77500 52500 1000 2000 "clearline"]
 	Line[77500 52500 80000 52500 1000 2000 "clearline"]
 	Line[80000 52500 80500 52000 1000 2000 "clearline"]
-	Line[79100 60300 79100 57400 1000 2000 "clearline"]
 	Line[79100 57400 80500 56000 1000 2000 "clearline"]
 	Line[80500 56000 83500 56000 1000 2000 "clearline"]
 	Line[83500 56000 84000 55500 1000 2000 "clearline"]
@@ -1191,24 +1150,13 @@
 	Line[90500 58000 90500 49500 1000 2000 "clearline"]
 	Line[90500 49500 84000 43000 1000 2000 "clearline"]
 	Line[50000 38000 46000 38000 1000 2000 "clearline"]
-	Line[79000 32000 75000 32000 1000 2000 "clearline"]
-	Line[75000 32000 73000 30000 1000 2000 "clearline"]
-	Line[73000 30000 73000 27500 1000 2000 "clearline"]
-	Line[86800 37500 91000 37500 1000 2000 "clearline"]
-	Line[91000 37500 98000 30500 1000 2000 "clearline"]
 	Line[56000 61500 56000 65000 1000 2000 "clearline"]
 	Line[104000 34500 105500 34500 1000 2000 "clearline"]
 	Line[105500 34500 109000 38000 1000 2000 "clearline"]
 	Line[109000 38000 109000 64500 1000 2000 "clearline"]
 	Line[109000 64500 104000 69500 1000 2000 "clearline"]
-	Line[104000 69500 15000 69500 1000 2000 "clearline"]
-	Line[15000 69500 2500 57000 1000 2000 "clearline"]
 	Line[2500 57000 2500 39500 1000 2000 "clearline"]
 	Line[2500 39500 7500 34500 1000 2000 "clearline"]
-	Line[76500 37500 76500 35000 1000 2000 "clearline"]
-	Line[76500 35000 75500 34000 1000 2000 "clearline"]
-	Line[75500 34000 74000 34000 1000 2000 "clearline"]
-	Line[74000 34000 69500 29500 1000 2000 "clearline"]
 	Line[25000 2500 82500 2500 1000 2000 "clearline"]
 	Line[82500 2500 84000 4000 1000 2000 "clearline"]
 	Line[84000 4000 84000 9000 1000 2000 "clearline"]
@@ -1216,17 +1164,66 @@
 	Line[89500 14500 104000 14500 1000 2000 "clearline"]
 	Line[84000 14000 77500 14000 1000 2000 "clearline"]
 	Line[75500 5500 69500 11500 1000 2000 "clearline"]
-	Line[69500 29500 69500 11500 1000 2000 "clearline"]
 	Line[95000 11000 95000 7500 1000 2000 "clearline"]
 	Line[95000 7500 97000 5500 1000 2000 "clearline"]
 	Line[97000 5500 101169 5500 1000 2000 "clearline"]
-	Line[84200 37500 84200 27300 1000 2000 "clearline"]
 	Line[84200 27300 87000 24500 1000 2000 "clearline"]
+	Line[84200 27300 84200 33900 1000 2000 "clearline"]
+	Line[84200 33900 84100 34000 1000 2000 "clearline"]
+	Line[68700 34000 68700 31200 1000 2000 "clearline"]
+	Line[68700 31200 67500 30000 1000 2000 "clearline"]
+	Line[67500 30000 67500 28500 1000 2000 "clearline"]
+	Line[67500 28500 63000 24000 1000 2000 "clearline"]
+	Line[45000 24000 63000 24000 1000 2000 "clearline"]
+	Line[66200 34000 66200 31700 1000 2000 "clearline"]
+	Line[66200 31700 60500 26000 1000 2000 "clearline"]
+	Line[44000 26000 60500 26000 1000 2000 "clearline"]
+	Line[63600 34000 63600 33600 1000 2000 "clearline"]
+	Line[63600 33600 58000 28000 1000 2000 "clearline"]
+	Line[69500 11500 69500 28500 1000 2000 "clearline"]
+	Line[69500 28500 71500 30500 1000 2000 "clearline"]
+	Line[71500 30500 76500 30500 1000 2000 "clearline"]
+	Line[76500 30500 76500 33900 1000 2000 "clearline"]
+	Line[76500 33900 76400 34000 1000 2000 "clearline"]
+	Line[63600 62600 63600 57100 1000 2000 "clearline"]
+	Line[63600 57100 60500 54000 1000 2000 "clearline"]
+	Line[69000 52000 69000 62400 1000 2000 "clearline"]
+	Line[69000 62400 68800 62600 1000 2000 "clearline"]
+	Line[71500 49000 71500 62400 1000 2000 "clearline"]
+	Line[71500 62400 71300 62600 1000 2000 "clearline"]
+	Line[74000 51500 74000 62500 1000 2000 "clearline"]
+	Line[74000 62500 73900 62600 1000 2000 "clearline"]
+	Line[79000 62600 79000 57500 1000 2000 "clearline"]
+	Line[79000 57500 79250 57250 1000 2000 "clearline"]
+	Line[76400 62600 76400 53600 1000 2000 "clearline"]
+	Line[77500 52500 76400 53600 1000 2000 "clearline"]
+	Line[86700 34000 94500 34000 1000 2000 "clearline"]
+	Line[94500 34000 98000 30500 1000 2000 "clearline"]
+	Line[79500 21000 79500 27000 1000 2000 "clearline"]
+	Line[79500 27000 79000 27500 1000 2000 "clearline"]
+	Line[2500 57000 19000 73500 1000 2000 "clearline"]
+	Line[19000 73500 100000 73500 1000 2000 "clearline"]
+	Line[100000 73500 104250 69250 1000 2000 "clearline"]
+	Line[17000 62500 26000 71500 1000 2000 "clearline"]
+	Line[81600 62600 81600 71400 1000 2000 "clearline"]
+	Line[81600 71400 81500 71500 1000 2000 "clearline"]
+	Line[51000 65000 56500 65000 1000 2000 "clearline"]
+	Line[56500 65000 58500 67000 1000 2000 "clearline"]
+	Line[66200 62600 66200 65800 1000 2000 "clearline"]
+	Line[66200 65800 65000 67000 1000 2000 "clearline"]
+	Line[65000 67000 58500 67000 1000 2000 "clearline"]
+	Line[26000 71500 89500 71500 1000 2000 "clearline"]
+	Line[89500 71500 98500 62500 1000 2000 "clearline"]
+	Line[84100 62600 84100 66600 1000 2000 "clearline"]
+	Line[84100 66600 85000 67500 1000 2000 "clearline"]
+	Line[85000 67500 90500 67500 1000 2000 "clearline"]
+	Line[90500 67500 96500 61500 1000 2000 "clearline"]
+	Line[45500 58500 45500 71500 1000 2000 "clearline"]
 )
 Layer(7 "outline")
 (
 	Line[0 0 112000 0 1000 2000 "clearline"]
-	Line[112000 0 112000 126000 1000 2000 "clearline"]
+	Line[112000 0 112000 126000 1000 2000 "clearline,selected"]
 	Line[112000 126000 0 126000 1000 2000 "clearline"]
 	Line[0 126000 0 0 1000 2000 "clearline"]
 )

--- a/schem/Boards/Modules/MRF24J40MA_Radio_Module/MRF24J40MA_Radio_Module.sch
+++ b/schem/Boards/Modules/MRF24J40MA_Radio_Module/MRF24J40MA_Radio_Module.sch
@@ -361,7 +361,7 @@
 T 53400 52600 5 10 1 1 0 0 1
 refdes=U1
 T 53400 48300 5 10 1 1 0 0 1
-footprint=SSOP20
+footprint=SSOP20W
 T 62100 48300 5 10 1 1 0 6 1
 device=PIC24F04KA201
 }

--- /dev/null
+++ b/schem/Boards/Single/ESP8266/Dimmer/.gitignore
@@ -1,1 +1,2 @@
+gerb
 

--- /dev/null
+++ b/schem/Boards/Single/ESP8266/Dimmer/ESP8266_Dimmer.pcb
@@ -1,1 +1,2257 @@
-
+# release: pcb 20140316
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20091103]
+
+PCB["" 40.0000mm 58.0000mm]
+
+Grid[393.700787 0.0000 0.0000 0]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[6.00mil 6.00mil 6.00mil 6.00mil 13.00mil 7.00mil]
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+	Pad[-1.0000mm -0.2000mm -1.0000mm 0.2000mm 0.8000mm 0.8000mm 0.8000mm "2" "2" "square"]
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+	Pad[-135.00mil 150.00mil -70.00mil 150.00mil 20.00mil 10.00mil 30.00mil "VCC" "1" "onsolder,square"]
+	Pad[-135.00mil 100.00mil -70.00mil 100.00mil 20.00mil 10.00mil 30.00mil "RA5" "2" "onsolder,square"]
+	Pad[-135.00mil 50.00mil -70.00mil 50.00mil 20.00mil 10.00mil 30.00mil "RA4" "3" "onsolder,square"]
+	Pad[-135.00mil 0.0000 -70.00mil 0.0000 20.00mil 10.00mil 30.00mil "RA3" "4" "onsolder,square"]
+	Pad[-135.00mil -50.00mil -70.00mil -50.00mil 20.00mil 10.00mil 30.00mil "RC5" "5" "onsolder,square"]
+	Pad[-135.00mil -100.00mil -70.00mil -100.00mil 20.00mil 10.00mil 30.00mil "RC4" "6" "onsolder,square"]
+	Pad[-135.00mil -150.00mil -70.00mil -150.00mil 20.00mil 10.00mil 30.00mil "RC3" "7" "onsolder,square"]
+	Pad[70.00mil -150.00mil 135.00mil -150.00mil 20.00mil 10.00mil 30.00mil "RC2" "8" "onsolder,square,edge2"]
+	Pad[70.00mil -100.00mil 135.00mil -100.00mil 20.00mil 10.00mil 30.00mil "RC1" "9" "onsolder,square,edge2"]
+	Pad[70.00mil -50.00mil 135.00mil -50.00mil 20.00mil 10.00mil 30.00mil "RC0" "10" "onsolder,square,edge2"]
+	Pad[70.00mil 0.0000 135.00mil 0.0000 20.00mil 10.00mil 30.00mil "RA2" "11" "onsolder,square,edge2"]
+	Pad[70.00mil 50.00mil 135.00mil 50.00mil 20.00mil 10.00mil 30.00mil "RA1" "12" "onsolder,square,edge2"]
+	Pad[70.00mil 100.00mil 135.00mil 100.00mil 20.00mil 10.00mil 30.00mil "RA0" "13" "onsolder,square,edge2"]
+	Pad[70.00mil 150.00mil 135.00mil 150.00mil 20.00mil 10.00mil 30.00mil "VSS" "14" "onsolder,square,edge2"]
+	ElementLine [-155.00mil 170.00mil -155.00mil -170.00mil 10.00mil]
+	ElementLine [-155.00mil -170.00mil 155.00mil -170.00mil 10.00mil]
+	ElementLine [155.00mil -170.00mil 155.00mil 170.00mil 10.00mil]
+	ElementLine [-155.00mil 170.00mil -25.00mil 170.00mil 10.00mil]
+	ElementLine [155.00mil 170.00mil 25.00mil 170.00mil 10.00mil]
+	ElementArc [0.0000 170.00mil 25.00mil 25.00mil 180 180 10.00mil]
+
+	)
+
+Element["onsolder" "0805" "C8" "100nF" 17.6999mm 51.1000mm -0.8871mm 2.4748mm 0 100 "auto"]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+
+	)
+
+Element["onsolder" "SO8" "U8" "unknown" 23.9000mm 47.4000mm -3.8000mm 4.2000mm 0 100 "auto"]
+(
+	Attribute("device" "ATSHA204A")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-135.00mil 75.00mil -70.00mil 75.00mil 20.00mil 10.00mil 30.00mil "NC" "1" "onsolder,square"]
+	Pad[-135.00mil 25.00mil -70.00mil 25.00mil 20.00mil 10.00mil 30.00mil "NC" "2" "onsolder,square"]
+	Pad[-135.00mil -25.00mil -70.00mil -25.00mil 20.00mil 10.00mil 30.00mil "NC" "3" "onsolder,square"]
+	Pad[-135.00mil -75.00mil -70.00mil -75.00mil 20.00mil 10.00mil 30.00mil "GND" "4" "onsolder,square"]
+	Pad[70.00mil -75.00mil 135.00mil -75.00mil 20.00mil 10.00mil 30.00mil "SDA" "5" "onsolder,square,edge2"]
+	Pad[70.00mil -25.00mil 135.00mil -25.00mil 20.00mil 10.00mil 30.00mil "SCL" "6" "onsolder,square,edge2"]
+	Pad[70.00mil 25.00mil 135.00mil 25.00mil 20.00mil 10.00mil 30.00mil "NC" "7" "onsolder,square,edge2"]
+	Pad[70.00mil 75.00mil 135.00mil 75.00mil 20.00mil 10.00mil 30.00mil "VCC" "8" "onsolder,square,edge2"]
+	ElementLine [-155.00mil 95.00mil -155.00mil -95.00mil 10.00mil]
+	ElementLine [-155.00mil -95.00mil 155.00mil -95.00mil 10.00mil]
+	ElementLine [155.00mil -95.00mil 155.00mil 95.00mil 10.00mil]
+	ElementLine [-155.00mil 95.00mil -25.00mil 95.00mil 10.00mil]
+	ElementLine [155.00mil 95.00mil 25.00mil 95.00mil 10.00mil]
+	ElementArc [0.0000 95.00mil 25.00mil 25.00mil 180 180 10.00mil]
+
+	)
+
+Element["onsolder" "0805" "R17" "10k" 25.2000mm 41.3001mm -0.8000mm -2.6001mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3.93mil -35.43mil 3.93mil -35.43mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-3.93mil 35.43mil 3.93mil 35.43mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-27.55mil -3.93mil -27.55mil 3.93mil 8.00mil]
+	ElementLine [27.55mil -3.93mil 27.55mil 3.93mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "R15" "10k" 20.6000mm 41.2999mm -1.9000mm 122.05mil 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3.93mil -35.43mil 3.93mil -35.43mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-3.93mil 35.43mil 3.93mil 35.43mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-27.55mil -3.93mil -27.55mil 3.93mil 8.00mil]
+	ElementLine [27.55mil -3.93mil 27.55mil 3.93mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "R13" "10k" 22.7000mm 41.2999mm -0.8000mm -2.4999mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3.93mil -35.43mil 3.93mil -35.43mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-3.93mil 35.43mil 3.93mil 35.43mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-27.55mil -3.93mil -27.55mil 3.93mil 8.00mil]
+	ElementLine [27.55mil -3.93mil 27.55mil 3.93mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "R12" "2.2k" 28.6000mm 43.8000mm -0.2000mm 2.4000mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "R11" "2.2k" 27.9000mm 41.8000mm -1.2916mm -1.2932mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "C7" "100nF" 12.2999mm 50.1000mm 0.2001mm 2.2000mm 0 100 "auto"]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+
+	)
+
+Element["onsolder" "0805" "R8" "220" 14.4999mm 39.3000mm -11.81mil -0.9000mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+
+	)
+
+Element["" "ESP_12E" "U6" "unknown" 16.3084mm 44.8068mm -11.3154mm -9.8984mm 0 100 ""]
+(
+	Attribute("device" "ESP-12E")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-3.8000mm 6.9000mm -3.8000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "REST" "1" "square,edge2"]
+	Pad[-1.8000mm 6.9000mm -1.8000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "ADC" "2" "square,edge2"]
+	Pad[0.2000mm 6.9000mm 0.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "CH_PD" "3" "square,edge2"]
+	Pad[2.2000mm 6.9000mm 2.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "GPIO16" "4" "square,edge2"]
+	Pad[4.2000mm 6.9000mm 4.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "GPIO14" "5" "square,edge2"]
+	Pad[6.2000mm 6.9000mm 6.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "GPIO12" "6" "square,edge2"]
+	Pad[8.2000mm 6.9000mm 8.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "GPIO13" "7" "square,edge2"]
+	Pad[10.2000mm 6.9000mm 10.2000mm 8.1000mm 1.0000mm 1.0000mm 1.0000mm "VCC" "8" "square,edge2"]
+	Pad[11.5000mm 5.0000mm 12.5000mm 5.0000mm 1.0000mm 1.0000mm 1.0000mm "MTDO" "9" "square,edge2"]
+	Pad[11.5000mm 3.0000mm 12.5000mm 3.0000mm 1.0000mm 1.0000mm 1.0000mm "MTDI" "10" "square,edge2"]
+	Pad[11.5000mm 1.0000mm 12.5000mm 1.0000mm 1.0000mm 1.0000mm 1.0000mm "SD_3" "11" "square,edge2"]
+	Pad[11.5000mm -1.0000mm 12.5000mm -1.0000mm 1.0000mm 1.0000mm 1.0000mm "MTMS" "12" "square,edge2"]
+	Pad[11.5000mm -3.0000mm 12.5000mm -3.0000mm 1.0000mm 1.0000mm 1.0000mm "MTCK" "13" "square,edge2"]
+	Pad[11.5000mm -5.0000mm 12.5000mm -5.0000mm 1.0000mm 1.0000mm 1.0000mm "SD_2" "14" "square,edge2"]
+	Pad[-3.8000mm -8.1000mm -3.8000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "TXD" "22" "square"]
+	Pad[-1.8000mm -8.1000mm -1.8000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "RXD" "21" "square"]
+	Pad[0.2000mm -8.1000mm 0.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GPIO5" "20" "square"]
+	Pad[2.2000mm -8.1000mm 2.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GPIO4" "19" "square"]
+	Pad[4.2000mm -8.1000mm 4.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GPIO0" "18" "square"]
+	Pad[6.2000mm -8.1000mm 6.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GPIO2" "17" "square"]
+	Pad[8.2000mm -8.1000mm 8.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GPIO15" "16" "square"]
+	Pad[10.2000mm -8.1000mm 10.2000mm -6.9000mm 1.0000mm 1.0000mm 1.0000mm "GND" "15" "square"]
+	ElementLine [-12.0000mm -8.0000mm -12.0000mm 8.0000mm 10.00mil]
+	ElementLine [-12.0000mm 8.0000mm -5.0000mm 8.0000mm 10.00mil]
+	ElementLine [-12.0000mm -8.0000mm -5.0000mm -8.0000mm 10.00mil]
+	ElementLine [11.0000mm 8.0000mm 12.0000mm 8.0000mm 10.00mil]
+	ElementLine [11.0000mm -8.0000mm 12.0000mm -8.0000mm 10.00mil]
+	ElementLine [12.0000mm 6.0000mm 12.0000mm 8.0000mm 10.00mil]
+	ElementLine [12.0000mm -8.0000mm 12.0000mm -6.0000mm 10.00mil]
+
+	)
+
+Element["onsolder" "0805_fit" "R19" "220" 22.5000mm 32.1000mm 1.8733mm 0.8050mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[1.0000mm -0.2000mm 1.0000mm 0.2000mm 0.8000mm 0.8000mm 0.8000mm "1" "1" "onsolder,square"]
+	Pad[-1.0000mm -0.2000mm -1.0000mm 0.2000mm 0.8000mm 0.8000mm 0.8000mm "2" "2" "onsolder,square"]
+
+	)
+
+Element["onsolder" "0805_fit" "R18" "100k" 10.3000mm 12.8000mm -3.2000mm 0.9000mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-0.2000mm -1.0000mm 0.2000mm -1.0000mm 0.8000mm 0.8000mm 0.8000mm "1" "1" "onsolder,square"]
+	Pad[-0.2000mm 1.0000mm 0.2000mm 1.0000mm 0.8000mm 0.8000mm 0.8000mm "2" "2" "onsolder,square"]
+
+	)
+
+Element["onsolder" "0805_fit" "R10" "100k" 10.7000mm 28.6000mm -3.4000mm 0.9000mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[-0.2000mm -1.0000mm 0.2000mm -1.0000mm 0.8000mm 0.8000mm 0.8000mm "1" "1" "onsolder,square"]
+	Pad[-0.2000mm 1.0000mm 0.2000mm 1.0000mm 0.8000mm 0.8000mm 0.8000mm "2" "2" "onsolder,square"]
+
+	)
+
+Element["onsolder" "0805_fit" "R9" "220" 22.5000mm 29.7000mm 2.1733mm 1.1050mm 0 100 "auto"]
+(
+	Attribute("device" "RESISTOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[1.0000mm -0.2000mm 1.0000mm 0.2000mm 0.8000mm 0.8000mm 0.8000mm "1" "1" "onsolder,square"]
+	Pad[-1.0000mm -0.2000mm -1.0000mm 0.2000mm 0.8000mm 0.8000mm 0.8000mm "2" "2" "onsolder,square"]
+
+	)
+
+Element["onsolder" "TP_1MM" "" "" 9.8000mm 44.8000mm -146.72mil 169.49mil 0 100 "auto"]
+(
+	Pad[0.0000 0.0000 0.0000 0.0000 1.0000mm 1.0000mm 1.0000mm "" "1" "onsolder,warn,octagon"]
+
+	)
+
+Element["onsolder" "TP_1MM" "" "" 18.6000mm 47.2000mm -146.72mil 169.49mil 0 100 "auto"]
+(
+	Pad[0.0000 0.0000 0.0000 0.0000 1.0000mm 1.0000mm 1.0000mm "" "1" "onsolder,warn,octagon"]
+
+	)
+
+Element["onsolder" "TP_1MM" "" "" 18.6000mm 48.4000mm -146.72mil 169.49mil 0 100 "auto"]
+(
+	Pad[0.0000 0.0000 0.0000 0.0000 1.0000mm 1.0000mm 1.0000mm "" "1" "onsolder,warn,octagon"]
+
+	)
+
+Element["onsolder" "TP_1MM" "" "" 32.4000mm 1500.00mil -146.72mil 169.49mil 0 100 "auto"]
+(
+	Pad[0.0000 0.0000 0.0000 0.0000 1.0000mm 1.0000mm 1.0000mm "" "1" "onsolder,warn,octagon"]
+
+	)
+
+Element["onsolder" "TP_1MM" "" "" 29.4000mm 37.5000mm -146.72mil 169.49mil 0 100 "auto"]
+(
+	Pad[0.0000 0.0000 0.0000 0.0000 1.0000mm 1.0000mm 1.0000mm "" "1" "onsolder,warn,octagon"]
+
+	)
+
+Element["" "GSIP5_NS" "CHAIN" "unknown" 34.2700mm 53.1500mm -3.8700mm -8.1500mm 1 100 ""]
+(
+	Attribute("device" "CONNECTOR_5")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[-50.00mil -50.00mil 70.00mil 30.00mil 76.00mil 38.00mil "1" "1" "square"]
+	Pin[-50.00mil -150.00mil 70.00mil 30.00mil 76.00mil 38.00mil "2" "2" ""]
+	Pin[-50.00mil -250.00mil 70.00mil 30.00mil 76.00mil 38.00mil "3" "3" ""]
+	Pin[-50.00mil -350.00mil 70.00mil 30.00mil 76.00mil 38.00mil "4" "4" ""]
+	Pin[-50.00mil -450.00mil 70.00mil 30.00mil 76.00mil 38.00mil "5" "5" ""]
+
+	)
+
+Element["" "GSIP3_NS" "SW" "unknown" 31.9000mm 53.2000mm -3.6000mm -0.2000mm 1 100 ""]
+(
+	Attribute("device" "CONNECTOR_3")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[-50.00mil -50.00mil 70.00mil 30.00mil 76.00mil 38.00mil "1" "1" "square"]
+	Pin[-50.00mil -150.00mil 70.00mil 30.00mil 76.00mil 38.00mil "2" "2" ""]
+	Pin[-50.00mil -250.00mil 70.00mil 30.00mil 76.00mil 38.00mil "3" "3" ""]
+
+	)
+
+Element["onsolder" "0805" "C6" "100nF" 22.9999mm 2000.00mil -0.5000mm 2.2000mm 0 100 "auto"]
+(
+	Attribute("device" "CAPACITOR")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pad[35.43mil -3.93mil 35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "1" "1" "onsolder,square"]
+	Pad[-35.43mil -3.93mil -35.43mil 3.93mil 51.18mil 20.00mil 57.18mil "2" "2" "onsolder,square"]
+	ElementLine [-3.93mil -27.55mil 3.93mil -27.55mil 8.00mil]
+	ElementLine [-3.93mil 27.55mil 3.93mil 27.55mil 8.00mil]
+
+	)
+Layer(1 "top")
+(
+	Line[818.76mil 22.0650mm 19.7350mm 22.0650mm 10.00mil 20.00mil "clearline"]
+	Line[7.7000mm 7.3000mm 12.1000mm 7.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[12.1000mm 7.3000mm 12.5000mm 6.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[13.0000mm 9.1000mm 13.0000mm 8.2000mm 0.6000mm 20.00mil "clearline"]
+	Line[13.0000mm 8.2000mm 12.1000mm 7.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[17.0000mm 9.1000mm 17.0000mm 7.4800mm 0.6000mm 20.00mil "clearline"]
+	Line[17.0000mm 7.4800mm 17.5800mm 6.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[17.6000mm 6.8800mm 20.2200mm 6.8800mm 0.6000mm 20.00mil "clearline"]
+	Line[20.2200mm 6.8800mm 20.6000mm 6.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.1000mm 7.5000mm 27.4000mm 7.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[27.4000mm 7.5000mm 26.4000mm 6.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[17.4999mm 17.1000mm 17.4999mm 15.4998mm 0.6000mm 20.00mil "clearline"]
+	Line[17.4999mm 15.4998mm 17.0000mm 14.9999mm 0.6000mm 20.00mil "clearline"]
+	Line[22.6000mm 23.3000mm 20.8315mm 23.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[20.8315mm 23.3000mm 818.76mil 23.3350mm 0.6000mm 20.00mil "clearline"]
+	Line[26.0035mm 23.3350mm 28.1350mm 23.3350mm 10.00mil 20.00mil "clearline"]
+	Line[26.0035mm 22.0650mm 28.3352mm 22.0650mm 10.00mil 20.00mil "clearline"]
+	Line[28.3352mm 22.0650mm 28.5000mm 21.9002mm 10.00mil 20.00mil "clearline"]
+	Line[26.0035mm 24.6050mm 26.0035mm 1008.00mil 10.00mil 20.00mil "clearline"]
+	Line[26.0035mm 1008.00mil 26.8002mm 26.4000mm 10.00mil 20.00mil "clearline"]
+	Line[28.6000mm 26.4000mm 28.6000mm 23.8000mm 10.00mil 20.00mil "clearline"]
+	Line[28.1350mm 23.3350mm 28.6000mm 23.8000mm 10.00mil 20.00mil "clearline"]
+	Line[25.1998mm 26.4000mm 25.2035mm 26.4000mm 10.00mil 20.00mil "clearline"]
+	Line[25.2035mm 26.4000mm 26.0035mm 25.6000mm 10.00mil 20.00mil "clearline"]
+	Line[30.9000mm 38.4000mm 32.4000mm 38.4000mm 10.00mil 20.00mil "clearline"]
+	Line[32.4000mm 38.4000mm 33.3000mm 37.5000mm 10.00mil 20.00mil "clearline"]
+	Line[33.3000mm 37.5000mm 33.3000mm 23.9000mm 10.00mil 20.00mil "clearline"]
+	Line[27.8000mm 34.2000mm 31.1000mm 37.5000mm 10.00mil 20.00mil "clearline"]
+	Line[31.1000mm 37.5000mm 32.1000mm 37.5000mm 10.00mil 20.00mil "clearline"]
+	Line[32.1000mm 37.5000mm 32.6000mm 37.0000mm 10.00mil 20.00mil "clearline"]
+	Line[32.6000mm 37.0000mm 32.6000mm 30.4000mm 10.00mil 20.00mil "clearline"]
+	Line[17.5000mm 17.0000mm 23.7000mm 17.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.7000mm 17.0000mm 24.3000mm 17.6000mm 0.6000mm 20.00mil "clearline"]
+	Line[24.3000mm 17.6000mm 24.3000mm 22.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[24.3000mm 22.9000mm 23.9000mm 23.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.9000mm 23.3000mm 22.5000mm 23.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[12.5000mm 15.5000mm 13.0000mm 15.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[12.5000mm 17.0000mm 8.5000mm 17.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[8.5000mm 17.0000mm 8.0000mm 17.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[10.2860mm 23.0642mm 10.2860mm 24.5860mm 0.6000mm 20.00mil "clearline"]
+	Line[26.5084mm 37.3068mm 27.8068mm 37.3068mm 0.6000mm 20.00mil "clearline"]
+	Line[27.8068mm 37.3068mm 28.0000mm 37.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[28.6000mm 26.4000mm 32.3000mm 26.4000mm 10.00mil 20.00mil "clearline"]
+	Line[32.3000mm 26.4000mm 32.6000mm 26.7000mm 10.00mil 20.00mil "clearline"]
+	Line[32.6000mm 26.7000mm 32.6000mm 30.5000mm 10.00mil 20.00mil "clearline"]
+	Line[31.2000mm 35.6000mm 31.2000mm 34.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.2000mm 34.9000mm 31.8000mm 34.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.8000mm 34.3000mm 31.8000mm 28.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[1250.00mil 28.0500mm 31.8000mm 28.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.9000mm 31.1494mm 29.9988mm 31.1494mm 0.6000mm 20.00mil "clearline"]
+	Line[26.9000mm 29.6000mm 26.9000mm 28.0500mm 0.6000mm 20.00mil "clearline"]
+	Line[24.8000mm 31.8000mm 23.5000mm 31.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.5000mm 31.8000mm 23.0000mm 31.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.0000mm 31.3000mm 23.0000mm 28.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.5000mm 33.7000mm 25.9000mm 33.7000mm 0.6000mm 20.00mil "clearline"]
+	Line[25.9000mm 33.7000mm 26.9000mm 32.7000mm 0.6000mm 20.00mil "clearline"]
+	Line[27.8000mm 34.2000mm 27.8000mm 33.6000mm 10.00mil 20.00mil "clearline"]
+	Line[27.8000mm 33.6000mm 26.9000mm 32.7000mm 10.00mil 20.00mil "clearline"]
+	Line[24.8000mm 30.2000mm 1000.00mil 30.2000mm 0.6000mm 20.00mil "clearline"]
+	Line[1000.00mil 30.2000mm 26.2000mm 31.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.2000mm 31.0000mm 26.8000mm 31.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.8000mm 31.0000mm 26.9000mm 31.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[12.5000mm 15.5000mm 12.5000mm 17.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[14.5000mm 17.6000mm 15.5000mm 17.6000mm 10.00mil 20.00mil "clearline"]
+	Line[12.5000mm 17.7000mm 12.5000mm 16.9000mm 10.00mil 20.00mil "clearline"]
+	Line[12.5000mm 19.8000mm 12.5000mm 17.8000mm 10.00mil 20.00mil "clearline"]
+	Line[14.5000mm 19.7000mm 15.5000mm 19.7000mm 10.00mil 20.00mil "clearline"]
+	Line[17.5000mm 19.7000mm 19.9000mm 19.7000mm 10.00mil 20.00mil "clearline"]
+	Line[19.9000mm 19.7000mm 21.0000mm 20.8000mm 10.00mil 20.00mil "clearline"]
+	Line[12.6000mm 23.6000mm 10.3000mm 23.6000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.0000mm 20.8000mm 30.2000mm 20.8000mm 10.00mil 20.00mil "clearline"]
+	Line[30.2000mm 20.8000mm 33.3000mm 23.9000mm 10.00mil 20.00mil "clearline"]
+	Line[10.2860mm 24.6000mm 10.2860mm 25.9120mm 0.6000mm 20.00mil "clearline"]
+	Line[10.2860mm 25.9120mm 8.9000mm 27.2980mm 0.6000mm 20.00mil "clearline"]
+	Line[10.2860mm 25.9000mm 16.3020mm 25.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[16.3020mm 25.9000mm 17.7000mm 27.2980mm 0.6000mm 20.00mil "clearline"]
+	Line[19.7650mm 22.0650mm 17.2350mm 22.0650mm 10.00mil 20.00mil "clearline"]
+	Line[17.2350mm 22.0650mm 16.8000mm 22.5000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 22.5000mm 16.8000mm 23.4998mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 23.4998mm 16.8002mm 23.5000mm 10.00mil 20.00mil "clearline"]
+	Line[818.76mil 23.3350mm 18.7647mm 23.3350mm 0.6000mm 20.00mil "clearline"]
+	Line[18.7647mm 23.3350mm 18.5998mm 23.4998mm 0.6000mm 20.00mil "clearline"]
+	Line[14.3999mm 23.6000mm 14.3999mm 956.69mil 0.6000mm 20.00mil "clearline"]
+	Line[14.3999mm 956.69mil 14.9000mm 24.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[14.9000mm 24.8000mm 18.2000mm 24.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[18.2000mm 24.8000mm 18.6000mm 24.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[18.6000mm 24.4000mm 18.6000mm 23.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[1250.00mil 28.0500mm 23.1500mm 28.0500mm 0.6000mm 20.00mil "clearline"]
+	Line[23.1500mm 28.0500mm 23.0000mm 28.2000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.4000mm 26.4000mm 23.4000mm 28.0500mm 0.6000mm 20.00mil "clearline"]
+	Line[23.4000mm 28.0500mm 23.4000mm 28.0500mm 0.6000mm 20.00mil "clearline"]
+	Line[23.4000mm 23.3000mm 23.4000mm 26.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.4000mm 26.4000mm 23.4000mm 26.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[8.9000mm 33.9020mm 19.1020mm 33.9020mm 0.6000mm 20.00mil "clearline"]
+	Line[19.1020mm 33.9020mm 20.6000mm 35.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[20.6000mm 35.4000mm 26.1000mm 35.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.1000mm 35.4000mm 26.5000mm 35.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[26.5000mm 35.8000mm 26.5000mm 37.2984mm 0.6000mm 20.00mil "clearline"]
+	Line[26.5000mm 37.2984mm 26.5084mm 37.3068mm 0.6000mm 20.00mil "clearline"]
+	Line[17.7000mm 27.2980mm 19.9980mm 27.2980mm 0.6000mm 20.00mil "clearline"]
+	Line[19.9980mm 27.2980mm 21.6000mm 28.9000mm 0.6000mm 20.00mil "clearline"]
+	Line[21.6000mm 28.9000mm 21.6000mm 31.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.5000mm 33.7000mm 21.6000mm 31.8000mm 0.6000mm 20.00mil "clearline"]
+	Line[30.9000mm 38.4000mm 27.2000mm 34.7000mm 10.00mil 20.00mil "clearline"]
+	Line[27.2000mm 34.7000mm 23.0000mm 34.7000mm 10.00mil 20.00mil "clearline"]
+	Line[23.0000mm 34.7000mm 18.9000mm 30.6000mm 10.00mil 20.00mil "clearline"]
+	Line[18.9000mm 30.6000mm 6.7000mm 30.6000mm 10.00mil 20.00mil "clearline"]
+	Line[6.7000mm 30.6000mm 5.7000mm 29.6000mm 10.00mil 20.00mil "clearline"]
+	Line[5.7140mm 23.0642mm 5.7140mm 29.5860mm 10.00mil 20.00mil "clearline"]
+	Line[5.7140mm 29.5860mm 5.7000mm 29.6000mm 10.00mil 20.00mil "clearline"]
+	Line[29.8000mm 34.5000mm 29.8000mm 31.3482mm 0.6000mm 20.00mil "clearline"]
+	Line[29.8000mm 31.3482mm 29.9988mm 31.1494mm 0.6000mm 20.00mil "clearline"]
+	Line[20.5000mm 39.0000mm 20.5000mm 1469.10mil 10.00mil 20.00mil "clearline"]
+	Line[20.5000mm 1469.10mil 20.5084mm 37.3068mm 10.00mil 20.00mil "clearline"]
+	Line[22.5000mm 1469.10mil 22.5084mm 37.3068mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 42.9000mm 26.5000mm 37.4068mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 37.4068mm 26.4000mm 37.3068mm 10.00mil 20.00mil "clearline"]
+	Line[18.5000mm 52.2984mm 18.5084mm 52.3068mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 50.3000mm 26.0000mm 50.3000mm 10.00mil 20.00mil "clearline"]
+	Line[26.0000mm 50.3000mm 26.4000mm 50.7000mm 10.00mil 20.00mil "clearline"]
+	Line[26.4000mm 50.7000mm 26.4000mm 52.1984mm 10.00mil 20.00mil "clearline"]
+	Line[18.5084mm 37.3068mm 18.5084mm 38.6084mm 10.00mil 20.00mil "clearline"]
+	Line[18.5084mm 38.6084mm 18.9000mm 39.0000mm 10.00mil 20.00mil "clearline"]
+	Line[18.9000mm 39.0000mm 18.9000mm 42.6000mm 10.00mil 20.00mil "clearline"]
+	Line[22.5000mm 1469.10mil 22.5000mm 44.5000mm 10.00mil 20.00mil "clearline"]
+	Line[22.5000mm 44.5000mm 22.3000mm 44.7000mm 10.00mil 20.00mil "clearline"]
+	Line[22.3000mm 44.7000mm 19.8000mm 44.7000mm 10.00mil 20.00mil "clearline"]
+	Line[19.8000mm 44.7000mm 19.1000mm 45.4000mm 10.00mil 20.00mil "clearline"]
+	Line[23.3000mm 43.6000mm 23.3000mm 44.1000mm 10.00mil 20.00mil "clearline"]
+	Line[23.3000mm 44.1000mm 24.7000mm 45.5000mm 10.00mil 20.00mil "clearline"]
+	Line[21.6000mm 43.7000mm 20.1000mm 43.7000mm 10.00mil 20.00mil "clearline"]
+	Line[20.1000mm 43.7000mm 18.9000mm 42.5000mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 43.5000mm 25.9000mm 46.0000mm 10.00mil 20.00mil "clearline"]
+	Line[17.7000mm 33.9020mm 17.7000mm 35.6000mm 10.00mil 20.00mil "clearline"]
+	Line[17.7000mm 35.6000mm 17.5000mm 35.8000mm 10.00mil 20.00mil "clearline"]
+	Line[17.5000mm 35.8000mm 17.5000mm 39.0000mm 10.00mil 20.00mil "clearline"]
+	Line[17.5000mm 39.0000mm 17.3000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[15.5000mm 50.2000mm 15.5000mm 49.0000mm 10.00mil 20.00mil "clearline"]
+	Line[15.5000mm 49.0000mm 19.3000mm 45.2000mm 10.00mil 20.00mil "clearline"]
+	Line[16.5084mm 52.3068mm 16.5084mm 51.2084mm 10.00mil 20.00mil "clearline"]
+	Line[16.5084mm 51.2084mm 15.5000mm 50.2000mm 10.00mil 20.00mil "clearline"]
+	Line[15.5000mm 50.2000mm 13.1000mm 50.2000mm 10.00mil 20.00mil "clearline"]
+	Line[13.1000mm 50.2000mm 12.5000mm 2000.00mil 10.00mil 20.00mil "clearline"]
+	Line[12.5000mm 2000.00mil 12.5000mm 52.2984mm 10.00mil 20.00mil "clearline"]
+	Line[12.5000mm 52.2984mm 12.5084mm 52.3068mm 10.00mil 20.00mil "clearline"]
+	Line[18.5000mm 50.3000mm 18.5000mm 52.2984mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 49.6000mm 16.8000mm 48.7000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 48.7000mm 17.0000mm 48.5000mm 10.00mil 20.00mil "clearline"]
+	Line[17.0000mm 48.5000mm 23.4000mm 48.5000mm 10.00mil 20.00mil "clearline"]
+	Line[23.4000mm 48.5000mm 25.9000mm 46.0000mm 10.00mil 20.00mil "clearline"]
+	Line[18.5000mm 50.4000mm 18.5000mm 49.9000mm 10.00mil 20.00mil "clearline"]
+	Line[18.5000mm 49.9000mm 18.8000mm 49.6000mm 10.00mil 20.00mil "clearline"]
+	Line[24.6000mm 43.5000mm 25.9000mm 43.5000mm 10.00mil 20.00mil "clearline"]
+	Line[25.8000mm 43.5000mm 26.4000mm 43.5000mm 10.00mil 20.00mil "clearline"]
+	Line[26.4000mm 43.5000mm 26.5000mm 43.4000mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 43.4000mm 26.5000mm 42.8000mm 10.00mil 20.00mil "clearline"]
+	Line[24.5084mm 37.3068mm 24.5084mm 38.5084mm 10.00mil 20.00mil "clearline"]
+	Line[24.5084mm 38.5084mm 25.2000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[26.4000mm 52.1984mm 1078.80mil 53.2000mm 10.00mil 20.00mil "clearline"]
+	Line[1078.80mil 53.2000mm 32.7000mm 53.2000mm 10.00mil 20.00mil "clearline"]
+	Line[32.7000mm 53.2000mm 33.0000mm 52.9000mm 10.00mil 20.00mil "clearline"]
+	Line[33.0000mm 52.9000mm 33.0000mm 51.8800mm 10.00mil 20.00mil "clearline"]
+	Line[32.8800mm 41.6000mm 33.0000mm 41.7200mm 10.00mil 20.00mil "clearline"]
+	Line[30.6300mm 46.8500mm 26.7500mm 46.8500mm 10.00mil 20.00mil "clearline"]
+	Line[26.7500mm 46.8500mm 25.9000mm 46.0000mm 10.00mil 20.00mil "clearline"]
+	Line[32.2000mm 39.2000mm 31.7000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[31.7000mm 39.2000mm 31.4000mm 38.9000mm 10.00mil 20.00mil "clearline"]
+	Line[31.4000mm 38.9000mm 30.3000mm 38.9000mm 10.00mil 20.00mil "clearline"]
+	Line[30.3000mm 38.9000mm 29.9000mm 39.3000mm 10.00mil 20.00mil "clearline"]
+	Line[29.9000mm 39.3000mm 29.9000mm 43.2000mm 10.00mil 20.00mil "clearline"]
+	Line[29.9000mm 43.2000mm 31.8000mm 45.1000mm 10.00mil 20.00mil "clearline"]
+	Line[31.8000mm 45.1000mm 31.8000mm 47.8000mm 10.00mil 20.00mil "clearline"]
+	Line[31.8000mm 47.8000mm 31.5000mm 48.1000mm 10.00mil 20.00mil "clearline"]
+	Line[31.5000mm 48.1000mm 30.2000mm 48.1000mm 10.00mil 20.00mil "clearline"]
+	Line[30.2000mm 48.1000mm 29.5000mm 48.8000mm 10.00mil 20.00mil "clearline"]
+	Line[29.5000mm 48.8000mm 26.2000mm 48.8000mm 10.00mil 20.00mil "clearline"]
+	Line[26.2000mm 48.8000mm 25.9000mm 49.1000mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 49.1000mm 25.9000mm 50.2000mm 10.00mil 20.00mil "clearline"]
+	Line[30.8000mm 39.7000mm 30.9800mm 39.7000mm 10.00mil 20.00mil "clearline"]
+	Line[30.9800mm 39.7000mm 33.0000mm 41.7200mm 10.00mil 20.00mil "clearline"]
+	Line[16.5000mm 37.2000mm 16.5000mm 42.0000mm 10.00mil 20.00mil "clearline"]
+	Line[16.5000mm 42.0000mm 14.8000mm 43.7000mm 10.00mil 20.00mil "clearline"]
+	Line[30.7000mm 40.9000mm 30.7000mm 41.9600mm 10.00mil 20.00mil "clearline"]
+	Line[30.7000mm 41.9600mm 33.0000mm 44.2600mm 10.00mil 20.00mil "clearline"]
+	Line[10.8000mm 39.0000mm 11.1000mm 39.0000mm 10.00mil 20.00mil "clearline"]
+	Line[11.1000mm 39.0000mm 14.6000mm 42.5000mm 10.00mil 20.00mil "clearline"]
+)
+Layer(2 "ground")
+(
+)
+Layer(3 "signal2")
+(
+)
+Layer(4 "signal3")
+(
+)
+Layer(5 "power")
+(
+)
+Layer(6 "bottom")
+(
+	Line[31.1000mm 7.5000mm 28.4000mm 7.5000mm 1.2500mm 20.00mil "clearline"]
+	Line[31.1000mm 14.3000mm 31.1000mm 20.2000mm 1.2500mm 20.00mil "clearline"]
+	Line[31.1000mm 20.2000mm 25.5000mm 25.8000mm 1.2500mm 20.00mil "clearline"]
+	Line[10.2600mm 9.8600mm 7.7000mm 7.3000mm 10.00mil 20.00mil "clearline"]
+	Line[13.3000mm 31.5000mm 13.3000mm 22.6000mm 10.00mil 20.00mil "clearline"]
+	Line[20.7000mm 25.7999mm 20.7000mm 15.2000mm 1.2500mm 20.00mil "clearline"]
+	Line[16.7600mm 31.1000mm 16.7600mm 27.1897mm 10.00mil 20.00mil "clearline"]
+	Line[16.7600mm 27.1897mm 18.1498mm 25.7999mm 10.00mil 20.00mil "clearline"]
+	Line[25.5000mm 25.8000mm 23.2500mm 25.8000mm 1.2500mm 20.00mil "clearline"]
+	Line[23.2500mm 25.8000mm 915.35mil 25.7999mm 1.2500mm 20.00mil "clearline"]
+	Line[13.3000mm 22.6000mm 20.7000mm 15.2000mm 10.00mil 20.00mil "clearline"]
+	Line[28.4000mm 7.5000mm 20.7000mm 15.2000mm 1.2500mm 20.00mil "clearline"]
+	Line[32.1000mm 36.8000mm 32.6000mm 36.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[29.8000mm 34.5000mm 30.0000mm 34.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[30.0000mm 34.5000mm 30.5000mm 34.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[30.5000mm 34.0000mm 31.5000mm 34.0000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.5000mm 34.0000mm 32.6000mm 35.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[32.6000mm 35.1000mm 32.6000mm 36.3000mm 0.6000mm 20.00mil "clearline"]
+	Line[22.5000mm 39.0000mm 22.5000mm 40.2000mm 10.00mil 20.00mil "clearline"]
+	Line[22.5000mm 40.2000mm 22.7000mm 40.4000mm 10.00mil 20.00mil "clearline"]
+	Line[20.5000mm 39.0000mm 20.5000mm 40.3000mm 10.00mil 20.00mil "clearline"]
+	Line[20.5000mm 40.3000mm 20.6000mm 40.4000mm 10.00mil 20.00mil "clearline"]
+	Line[16.7600mm 37.6024mm 13.5024mm 37.6024mm 10.00mil 20.00mil "clearline"]
+	Line[13.5024mm 37.6024mm 13.3000mm 37.4000mm 10.00mil 20.00mil "clearline"]
+	Line[23.9650mm 46.7650mm 23.3000mm 46.1000mm 10.00mil 20.00mil "clearline"]
+	Line[23.3000mm 46.1000mm 19.6000mm 46.1000mm 10.00mil 20.00mil "clearline"]
+	Line[19.6000mm 46.1000mm 19.1000mm 45.6000mm 10.00mil 20.00mil "clearline"]
+	Line[21.2965mm 45.4950mm 22.6050mm 45.4950mm 10.00mil 20.00mil "clearline"]
+	Line[22.6050mm 45.4950mm 24.7000mm 43.4000mm 10.00mil 20.00mil "clearline"]
+	Line[24.7000mm 43.4000mm 24.7000mm 42.1998mm 10.00mil 20.00mil "clearline"]
+	Line[24.7000mm 45.5000mm 26.5000mm 45.5000mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 45.5000mm 26.5050mm 45.4950mm 10.00mil 20.00mil "clearline"]
+	Line[21.6000mm 43.7000mm 23.2000mm 43.7000mm 10.00mil 20.00mil "clearline"]
+	Line[23.2000mm 43.7000mm 23.3000mm 43.6000mm 10.00mil 20.00mil "clearline"]
+	Line[17.3000mm 39.2000mm 17.1000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[17.1000mm 39.2000mm 16.8000mm 38.9000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 38.9000mm 16.8000mm 37.6024mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 1964.90mil 26.5035mm 49.3050mm 10.00mil 20.00mil "clearline"]
+	Line[31.2000mm 35.6000mm 31.2000mm 39.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.2000mm 39.4000mm 30.9000mm 39.7000mm 0.6000mm 20.00mil "clearline"]
+	Line[15.5000mm 39.5000mm 15.7000mm 39.5000mm 10.00mil 20.00mil "clearline"]
+	Line[15.7000mm 39.5000mm 16.3000mm 40.1000mm 10.00mil 20.00mil "clearline"]
+	Line[11.4000mm 48.8200mm 11.6000mm 48.6200mm 10.00mil 20.00mil "clearline"]
+	Line[13.1998mm 50.1000mm 16.8000mm 50.1000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 51.1000mm 16.8000mm 48.6270mm 10.00mil 20.00mil "clearline"]
+	Line[16.8000mm 48.6270mm 16.8070mm 48.6200mm 10.00mil 20.00mil "clearline"]
+	Line[15.6000mm 52.3000mm 14.7000mm 51.4000mm 10.00mil 20.00mil "clearline"]
+	Line[14.7000mm 51.4000mm 11.7000mm 51.4000mm 10.00mil 20.00mil "clearline"]
+	Line[11.7000mm 51.4000mm 11.4000mm 51.1000mm 10.00mil 20.00mil "clearline"]
+	Line[11.4000mm 48.8200mm 11.4000mm 51.1000mm 10.00mil 20.00mil "clearline"]
+	Line[18.5998mm 51.1000mm 18.5998mm 52.2998mm 10.00mil 20.00mil "clearline"]
+	Line[18.5998mm 52.2998mm 18.6000mm 52.3000mm 10.00mil 20.00mil "clearline"]
+	Line[15.3000mm 52.8000mm 14.4000mm 51.9000mm 10.00mil 20.00mil "clearline"]
+	Line[14.4000mm 51.9000mm 10.8000mm 51.9000mm 10.00mil 20.00mil "clearline"]
+	Line[10.8000mm 51.9000mm 10.1000mm 51.2000mm 10.00mil 20.00mil "clearline"]
+	Line[10.1000mm 51.2000mm 10.1000mm 47.7000mm 10.00mil 20.00mil "clearline"]
+	Line[10.1000mm 47.7000mm 10.4000mm 47.4000mm 10.00mil 20.00mil "clearline"]
+	Line[10.4000mm 47.4000mm 11.5500mm 47.4000mm 10.00mil 20.00mil "clearline"]
+	Line[11.5500mm 47.4000mm 11.6000mm 47.3500mm 10.00mil 20.00mil "clearline"]
+	Line[15.0000mm 53.3000mm 14.1000mm 52.4000mm 10.00mil 20.00mil "clearline"]
+	Line[14.1000mm 52.4000mm 10.5000mm 52.4000mm 10.00mil 20.00mil "clearline"]
+	Line[10.5000mm 52.4000mm 9.6000mm 51.5000mm 10.00mil 20.00mil "clearline"]
+	Line[9.6000mm 51.5000mm 9.6000mm 46.4000mm 10.00mil 20.00mil "clearline"]
+	Line[9.6000mm 46.4000mm 9.9000mm 46.1000mm 10.00mil 20.00mil "clearline"]
+	Line[9.9000mm 46.1000mm 11.5800mm 46.1000mm 10.00mil 20.00mil "clearline"]
+	Line[11.5800mm 46.1000mm 11.6000mm 46.0800mm 10.00mil 20.00mil "clearline"]
+	Line[19.1000mm 45.6000mm 19.1000mm 44.1000mm 10.00mil 20.00mil "clearline"]
+	Line[19.1000mm 44.1000mm 18.6000mm 43.6000mm 10.00mil 20.00mil "clearline"]
+	Line[18.6000mm 43.6000mm 16.8670mm 43.6000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8670mm 43.6000mm 16.8070mm 43.5400mm 10.00mil 20.00mil "clearline"]
+	Line[16.8070mm 42.2700mm 18.5700mm 42.2700mm 10.00mil 20.00mil "clearline"]
+	Line[18.5700mm 42.2700mm 18.9000mm 42.6000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8070mm 43.5400mm 14.9600mm 43.5400mm 10.00mil 20.00mil "clearline"]
+	Line[14.9600mm 43.5400mm 14.8000mm 43.7000mm 10.00mil 20.00mil "clearline"]
+	Line[20.6000mm 42.1998mm 23.8002mm 42.1998mm 10.00mil 20.00mil "clearline"]
+	Line[23.8002mm 42.1998mm 24.0000mm 42.0000mm 10.00mil 20.00mil "clearline"]
+	Line[24.0000mm 42.0000mm 24.0000mm 38.3000mm 10.00mil 20.00mil "clearline"]
+	Line[24.0000mm 38.3000mm 24.4000mm 37.9000mm 10.00mil 20.00mil "clearline"]
+	Line[24.4000mm 37.9000mm 1000.00mil 37.9000mm 10.00mil 20.00mil "clearline"]
+	Line[1000.00mil 37.9000mm 26.7000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[26.7000mm 39.2000mm 28.0000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[25.2000mm 40.4002mm 25.2000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[10.2600mm 9.8600mm 10.2600mm 11.7600mm 10.00mil 20.00mil "clearline"]
+	Line[10.2600mm 11.7600mm 10.3000mm 11.8000mm 10.00mil 20.00mil "clearline"]
+	Line[10.3000mm 13.8000mm 10.3000mm 25.9000mm 10.00mil 20.00mil "clearline"]
+	Line[10.3000mm 25.9000mm 10.6000mm 26.2000mm 10.00mil 20.00mil "clearline"]
+	Line[10.6000mm 26.2000mm 10.6000mm 27.5000mm 10.00mil 20.00mil "clearline"]
+	Line[10.6000mm 27.5000mm 10.7000mm 27.6000mm 10.00mil 20.00mil "clearline"]
+	Line[10.7000mm 29.6000mm 10.7000mm 31.4400mm 10.00mil 20.00mil "clearline"]
+	Line[10.7000mm 31.4400mm 10.7600mm 31.5000mm 10.00mil 20.00mil "clearline"]
+	Line[20.7000mm 26.2000mm 20.7000mm 28.9000mm 10.00mil 20.00mil "clearline"]
+	Line[20.7000mm 28.9000mm 21.5000mm 29.7000mm 10.00mil 20.00mil "clearline"]
+	Line[23.5000mm 29.7000mm 23.5000mm 32.1000mm 10.00mil 20.00mil "clearline"]
+	Line[21.5000mm 32.1000mm 20.3000mm 32.1000mm 10.00mil 20.00mil "clearline"]
+	Line[20.3000mm 32.1000mm 19.3000mm 31.1000mm 10.00mil 20.00mil "clearline"]
+	Line[18.2000mm 45.5000mm 19.4000mm 46.7000mm 10.00mil 20.00mil "clearline"]
+	Line[19.4000mm 46.7000mm 19.4000mm 49.0000mm 10.00mil 20.00mil "clearline"]
+	Line[19.4000mm 49.0000mm 18.8000mm 49.6000mm 10.00mil 20.00mil "clearline"]
+	Line[18.8000mm 46.1000mm 19.4000mm 46.7000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8070mm 47.3500mm 17.5500mm 47.3500mm 10.00mil 20.00mil "clearline"]
+	Line[17.5500mm 47.3500mm 18.6000mm 48.4000mm 10.00mil 20.00mil "clearline"]
+	Line[16.8070mm 46.0800mm 17.4800mm 46.0800mm 10.00mil 20.00mil "clearline"]
+	Line[17.4800mm 46.0800mm 18.6000mm 47.2000mm 10.00mil 20.00mil "clearline"]
+	Line[11.6000mm 44.8100mm 9.8100mm 44.8100mm 10.00mil 20.00mil "clearline"]
+	Line[9.8100mm 44.8100mm 9.8000mm 44.8000mm 10.00mil 20.00mil "clearline"]
+	Line[29.5000mm 43.8000mm 29.5000mm 42.5000mm 10.00mil 20.00mil "clearline"]
+	Line[29.5000mm 42.5000mm 28.8000mm 41.8000mm 10.00mil 20.00mil "clearline"]
+	Line[28.8000mm 41.8000mm 28.8000mm 41.5000mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 45.5000mm 26.5000mm 44.9000mm 10.00mil 20.00mil "clearline"]
+	Line[26.5000mm 44.9000mm 27.7000mm 43.7000mm 10.00mil 20.00mil "clearline"]
+	Line[27.0000mm 41.7000mm 27.0000mm 42.4000mm 10.00mil 20.00mil "clearline"]
+	Line[27.0000mm 42.4000mm 25.0000mm 44.4000mm 10.00mil 20.00mil "clearline"]
+	Line[25.0000mm 44.4000mm 24.5000mm 44.4000mm 10.00mil 20.00mil "clearline"]
+	Line[24.5000mm 44.4000mm 23.3000mm 45.6000mm 10.00mil 20.00mil "clearline"]
+	Line[23.3000mm 45.6000mm 23.3000mm 46.1000mm 10.00mil 20.00mil "clearline"]
+	Line[23.9650mm 46.7650mm 23.9000mm 46.7000mm 10.00mil 20.00mil "clearline"]
+	Line[26.5650mm 46.7650mm 23.9650mm 46.7650mm 10.00mil 20.00mil "clearline"]
+	Line[23.9650mm 46.7650mm 23.8500mm 46.6500mm 10.00mil 20.00mil "clearline"]
+	Line[28.0000mm 37.5000mm 31.1000mm 37.5000mm 0.6000mm 20.00mil "clearline"]
+	Line[31.1000mm 37.5000mm 31.2000mm 37.4000mm 0.6000mm 20.00mil "clearline"]
+	Line[15.0000mm 53.3000mm 29.2600mm 53.3000mm 10.00mil 20.00mil "clearline"]
+	Line[29.2600mm 53.3000mm 30.6300mm 51.9300mm 10.00mil 20.00mil "clearline"]
+	Line[15.3000mm 52.8000mm 27.2200mm 52.8000mm 10.00mil 20.00mil "clearline"]
+	Line[27.2200mm 52.8000mm 30.6300mm 49.3900mm 10.00mil 20.00mil "clearline"]
+	Line[32.1000mm 36.8000mm 32.1000mm 39.1000mm 0.6000mm 20.00mil "clearline"]
+	Line[32.1000mm 39.1000mm 32.2000mm 39.2000mm 0.6000mm 20.00mil "clearline"]
+	Line[23.9650mm 46.7650mm 28.0650mm 46.7650mm 10.00mil 20.00mil "clearline"]
+	Line[28.0650mm 46.7650mm 29.4000mm 48.1000mm 10.00mil 20.00mil "clearline"]
+	Line[29.4000mm 48.1000mm 31.7600mm 48.1000mm 10.00mil 20.00mil "clearline"]
+	Line[31.7600mm 48.1000mm 33.0800mm 49.4200mm 10.00mil 20.00mil "clearline"]
+	Line[26.5050mm 45.4950mm 31.6950mm 45.4950mm 10.00mil 20.00mil "clearline"]
+	Line[31.6950mm 45.4950mm 33.0000mm 46.8000mm 10.00mil 20.00mil "clearline"]
+	Line[15.6000mm 52.3000mm 25.5000mm 52.3000mm 10.00mil 20.00mil "clearline"]
+	Line[25.5000mm 52.3000mm 25.9000mm 51.9000mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 51.9000mm 25.9000mm 50.2000mm 10.00mil 20.00mil "clearline"]
+	Line[22.1000mm 2000.00mil 22.1000mm 52.3000mm 10.00mil 20.00mil "clearline"]
+	Line[23.8998mm 2000.00mil 23.8998mm 48.9998mm 10.00mil 20.00mil "clearline"]
+	Line[23.8998mm 48.9998mm 23.4000mm 48.5000mm 10.00mil 20.00mil "clearline"]
+	Line[14.6000mm 42.7000mm 14.6000mm 42.1000mm 10.00mil 20.00mil "clearline"]
+	Line[14.6000mm 42.1000mm 15.0000mm 41.7000mm 10.00mil 20.00mil "clearline"]
+	Line[19.3000mm 37.6024mm 19.1976mm 37.6024mm 10.00mil 20.00mil "clearline"]
+	Line[19.1976mm 37.6024mm 18.3000mm 38.5000mm 10.00mil 20.00mil "clearline"]
+	Line[18.3000mm 38.5000mm 18.3000mm 39.6000mm 10.00mil 20.00mil "clearline"]
+	Line[18.3000mm 39.6000mm 17.8000mm 40.1000mm 10.00mil 20.00mil "clearline"]
+	Line[17.8000mm 40.1000mm 16.3000mm 40.1000mm 10.00mil 20.00mil "clearline"]
+	Line[15.0000mm 41.7000mm 18.3000mm 41.7000mm 10.00mil 20.00mil "clearline"]
+	Line[18.3000mm 41.7000mm 19.2000mm 40.8000mm 10.00mil 20.00mil "clearline"]
+	Line[19.2000mm 40.8000mm 19.2000mm 39.1000mm 10.00mil 20.00mil "clearline"]
+	Line[19.2000mm 39.1000mm 20.3000mm 38.0000mm 10.00mil 20.00mil "clearline"]
+	Line[20.3000mm 38.0000mm 23.2000mm 38.0000mm 10.00mil 20.00mil "clearline"]
+	Line[23.2000mm 38.0000mm 23.9000mm 37.3000mm 10.00mil 20.00mil "clearline"]
+	Line[23.9000mm 37.3000mm 25.9000mm 37.3000mm 10.00mil 20.00mil "clearline"]
+	Line[25.9000mm 37.3000mm 27.2000mm 38.6000mm 10.00mil 20.00mil "clearline"]
+	Line[27.2000mm 38.6000mm 28.6000mm 38.6000mm 10.00mil 20.00mil "clearline"]
+	Line[28.6000mm 38.6000mm 29.7000mm 39.7000mm 10.00mil 20.00mil "clearline"]
+	Line[28.8000mm 41.8000mm 28.8000mm 40.0000mm 10.00mil 20.00mil "clearline"]
+	Line[28.8000mm 40.0000mm 28.0000mm 39.2000mm 10.00mil 20.00mil "clearline"]
+	Line[32.2500mm 39.2500mm 32.2500mm 40.4500mm 10.00mil 20.00mil "clearline"]
+	Line[32.2500mm 40.4500mm 31.4000mm 41.3000mm 10.00mil 20.00mil "clearline"]
+	Line[31.4000mm 41.3000mm 31.4000mm 41.7000mm 10.00mil 20.00mil "clearline"]
+	Line[31.4000mm 41.7000mm 31.3000mm 41.8000mm 10.00mil 20.00mil "clearline"]
+	Line[31.3000mm 41.8000mm 28.7999mm 41.8000mm 10.00mil 20.00mil "clearline"]
+	Line[29.6500mm 39.6500mm 29.6500mm 40.6500mm 10.00mil 20.00mil "clearline"]
+	Line[29.6500mm 40.6500mm 29.9000mm 40.9000mm 10.00mil 20.00mil "clearline"]
+	Line[29.9000mm 40.9000mm 30.7000mm 40.9000mm 10.00mil 20.00mil "clearline"]
+	Line[10.7600mm 37.4000mm 10.7600mm 38.9600mm 10.00mil 20.00mil "clearline"]
+	Line[10.7600mm 38.9600mm 10.8000mm 39.0000mm 10.00mil 20.00mil "clearline"]
+	Line[14.6000mm 42.5000mm 14.5000mm 42.5000mm 10.00mil 20.00mil "clearline"]
+	Line[14.5000mm 42.5000mm 13.9000mm 43.1000mm 10.00mil 20.00mil "clearline"]
+	Line[13.9000mm 43.1000mm 13.9000mm 43.9000mm 10.00mil 20.00mil "clearline"]
+	Line[13.9000mm 43.9000mm 14.8000mm 44.8000mm 10.00mil 20.00mil "clearline"]
+	Line[14.8000mm 44.8000mm 16.7970mm 44.8000mm 10.00mil 20.00mil "clearline"]
+	Line[16.7970mm 44.8000mm 16.8070mm 44.8100mm 10.00mil 20.00mil "clearline"]
+	Line[18.2000mm 45.5000mm 14.7000mm 45.5000mm 10.00mil 20.00mil "clearline"]
+	Line[14.7000mm 45.5000mm 13.2000mm 44.0000mm 10.00mil 20.00mil "clearline"]
+	Line[13.2000mm 44.0000mm 13.2000mm 41.7000mm 10.00mil 20.00mil "clearline"]
+	Line[13.2000mm 41.7000mm 13.6000mm 41.3000mm 10.00mil 20.00mil "clearline"]
+	Line[13.6000mm 41.3000mm 13.6000mm 39.3000mm 10.00mil 20.00mil "clearline"]
+	Line[13.6000mm 39.3000mm 13.6000mm 39.3000mm 10.00mil 20.00mil "clearline"]
+	Line[11.6000mm 42.2700mm 13.1700mm 42.2700mm 10.00mil 20.00mil "clearline"]
+	Line[13.1700mm 42.2700mm 13.2000mm 42.3000mm 10.00mil 20.00mil "clearline"]
+)
+Layer(7 "outline")
+(
+	Line[4.3000mm 4.0000mm 34.3000mm 4.0000mm 10.00mil 20.00mil "clearline"]
+	Line[34.3000mm 4.0000mm 34.3000mm 54.0000mm 10.00mil 20.00mil "clearline"]
+	Line[34.3000mm 54.0000mm 4.3000mm 54.0000mm 10.00mil 20.00mil "clearline"]
+	Line[4.3000mm 54.0000mm 4.3000mm 4.0000mm 10.00mil 20.00mil "clearline"]
+)
+Layer(8 "spare")
+(
+)
+Layer(9 "silk")
+(
+	Text[6.2000mm 22.3000mm 0 122 "Dr" "clearline,onsolder"]
+	Text[4.8000mm 53.8000mm 0 122 "ESP8266" "clearline,onsolder"]
+	Text[4.8000mm 52.0000mm 0 122 "Switch" "clearline,onsolder"]
+	Text[4.8000mm 50.3000mm 0 122 "r1" "clearline,onsolder"]
+	Text[9.9000mm 21.9000mm 0 122 "erzinia" "clearline,onsolder"]
+	Polygon("clearpoly")
+	(
+		[7.5432mm 24.4677mm] [7.5183mm 24.4618mm] [7.5011mm 24.4479mm] [7.5092mm 24.4131mm] [7.5377mm 24.3211mm] 
+		[7.5841mm 24.1779mm] [7.6464mm 23.9899mm] [7.7693mm 24.0430mm] [7.7403mm 24.1372mm] [7.7563mm 24.1703mm] 
+		[7.7965mm 24.1951mm] [7.8483mm 24.2106mm] [7.8991mm 24.2160mm] [7.9519mm 24.2005mm] [8.0932mm 24.1570mm] 
+		[8.3096mm 24.0897mm] [8.5890mm 24.0024mm] [8.9187mm 23.8990mm] [9.2862mm 23.7834mm] [9.6789mm 23.6597mm] 
+		[397.02mil 23.5319mm] [10.4894mm 23.4039mm] [10.8823mm 23.2795mm] [11.2504mm 23.1626mm] [11.5806mm 23.0575mm] 
+		[11.8605mm 22.9678mm] [12.0779mm 22.8975mm] [12.2199mm 22.8507mm] [12.2742mm 22.8312mm] [12.3078mm 22.7867mm] 
+		[12.3151mm 22.7397mm] [12.2966mm 22.6912mm] [12.2529mm 22.6435mm] [12.2135mm 22.6257mm] [12.1429mm 22.5942mm] 
+		[12.0517mm 22.5538mm] [11.9496mm 22.5093mm] [11.8470mm 22.4659mm] [462.76mil 22.4286mm] [11.6806mm 22.4016mm] 
+		[11.6372mm 22.3905mm] [11.5468mm 22.3872mm] [451.63mil 22.3851mm] [11.3769mm 22.3989mm] [11.2290mm 22.4431mm] 
+		[11.1127mm 22.4819mm] [11.0111mm 22.5139mm] [10.9349mm 22.5358mm] [10.8955mm 22.5436mm] [10.8511mm 22.5180mm] 
+		[10.8023mm 22.4344mm] [10.7452mm 22.3356mm] [10.6761mm 22.2622mm] [10.5920mm 22.2109mm] [10.4889mm 22.1791mm] 
+		[408.63mil 22.1520mm] [405.13mil 22.1228mm] [10.2237mm 22.0880mm] [10.1678mm 22.0476mm] [10.1203mm 22.0024mm] 
+		[394.15mil 22.1207mm] [9.9316mm 22.1997mm] [9.8656mm 22.2437mm] [9.8049mm 22.2561mm] [9.7406mm 22.2414mm] 
+		[9.6740mm 22.2170mm] [9.6187mm 22.2017mm] [9.5724mm 22.1967mm] [9.5328mm 22.2025mm] [9.4978mm 22.2195mm] 
+		[9.4653mm 22.2490mm] [9.4327mm 22.2909mm] [9.3982mm 22.3463mm] [9.3616mm 22.4001mm] [9.3060mm 22.4718mm] 
+		[9.2387mm 22.5520mm] [9.1671mm 22.6315mm] [9.0779mm 22.7316mm] [9.0081mm 22.8233mm] [8.9474mm 22.9206mm] 
+		[8.8861mm 23.0377mm] [8.8071mm 23.1875mm] [8.7449mm 23.2825mm] [8.6969mm 23.3249mm] [8.6611mm 23.3181mm] 
+		[8.6504mm 23.2914mm] [8.6387mm 23.2363mm] [8.6278mm 23.1609mm] [8.6189mm 23.0732mm] [8.5940mm 22.8909mm] 
+		[8.5529mm 22.7542mm] [8.4919mm 22.6556mm] [8.4084mm 22.5886mm] [8.3581mm 22.5586mm] [8.3245mm 22.5446mm] 
+		[8.2989mm 22.5571mm] [8.2732mm 22.6061mm] [8.2395mm 22.7021mm] [8.1889mm 22.8558mm] [8.1135mm 23.0773mm] 
+		[8.0053mm 23.3770mm] [7.8963mm 23.6737mm] [7.8193mm 23.8921mm] [7.7693mm 24.0430mm] [7.6464mm 23.9899mm] 
+		[7.7226mm 23.7636mm] [307.50mil 23.5050mm] [7.9077mm 23.2203mm] [8.0129mm 22.9160mm] [8.5374mm 21.4027mm] 
+		[8.0771mm 19.8284mm] [8.2679mm 19.7943mm] [8.2717mm 19.8624mm] [8.3040mm 20.0036mm] [8.3624mm 20.2109mm] 
+		[8.4434mm 20.4768mm] [8.4825mm 20.3463mm] [8.5189mm 20.2607mm] [8.5491mm 20.1931mm] [8.5704mm 20.1182mm] 
+		[8.5623mm 20.0278mm] [8.5232mm 19.9368mm] [8.4777mm 19.8479mm] [8.4503mm 19.7641mm] [8.4239mm 19.7634mm] 
+		[8.3649mm 19.7646mm] [8.3030mm 19.7733mm] [8.2679mm 19.7943mm] [8.0771mm 19.8284mm] [8.0055mm 19.8375mm] 
+		[7.9514mm 19.8474mm] [7.8991mm 19.8520mm] [7.8536mm 19.8362mm] [7.8204mm 19.7849mm] [7.8168mm 19.7242mm] 
+		[7.8458mm 19.6854mm] [7.8920mm 19.6615mm] [7.9395mm 19.6463mm] [8.1696mm 19.5952mm] [8.3969mm 19.5368mm] 
+		[8.3847mm 19.5030mm] [8.3738mm 19.4756mm] [8.3657mm 19.4509mm] [8.3616mm 19.4263mm] [8.3629mm 19.3986mm] 
+		[8.3710mm 19.3643mm] [8.3875mm 19.3209mm] [8.4140mm 19.2647mm] [8.4975mm 19.0410mm] [8.5250mm 18.8578mm] 
+		[8.5222mm 18.7217mm] [8.5156mm 18.6389mm] [8.5046mm 18.6351mm] [8.4731mm 18.6513mm] [8.4261mm 18.5322mm] 
+		[8.4617mm 18.5094mm] [8.5021mm 18.4697mm] [8.5206mm 18.4431mm] [8.5402mm 18.4034mm] [8.5636mm 18.3432mm] 
+		[8.5938mm 18.2546mm] [8.6466mm 18.1223mm] [8.6812mm 17.9927mm] [8.6832mm 17.8782mm] [8.6659mm 17.7882mm] 
+		[8.6199mm 17.6966mm] [8.5364mm 17.5774mm] [8.5034mm 17.5292mm] [8.4724mm 17.4766mm] [8.4465mm 17.4266mm] 
+		[8.4300mm 17.3849mm] [8.3967mm 17.2932mm] [8.3576mm 17.2160mm] [8.3047mm 17.1421mm] [8.2316mm 17.0595mm] 
+		[8.1678mm 16.9912mm] [8.1229mm 16.9417mm] [8.0886mm 16.9061mm] [8.0571mm 16.8792mm] [8.0210mm 16.8550mm] 
+		[7.9725mm 16.8291mm] [7.9037mm 16.7956mm] [7.8069mm 16.7491mm] [7.7025mm 16.7049mm] [7.6324mm 16.6846mm] 
+		[7.5887mm 16.6785mm] [7.5636mm 16.6770mm] [7.5488mm 16.6694mm] [7.5364mm 16.6465mm] [7.5183mm 16.5983mm] 
+		[7.4866mm 16.5144mm] [7.3245mm 16.1837mm] [7.1031mm 15.8807mm] [7.0464mm 15.8164mm] [6.9969mm 15.7636mm] 
+		[6.9601mm 15.7278mm] [6.9410mm 15.7146mm] [6.9291mm 15.7212mm] [6.9151mm 15.7456mm] [6.9032mm 15.7959mm] 
+		[6.8983mm 15.8794mm] [6.8933mm 16.0405mm] [6.8780mm 16.1479mm] [6.8519mm 16.2040mm] [6.8143mm 16.2101mm] 
+		[6.7241mm 16.1830mm] [6.6553mm 16.1685mm] [6.6034mm 16.1677mm] [6.5638mm 16.1802mm] [6.5316mm 16.2071mm] 
+		[6.5021mm 16.2482mm] [6.4711mm 16.3039mm] [6.4335mm 16.3747mm] [6.4627mm 16.4034mm] [6.5295mm 16.4748mm] 
+		[6.6281mm 16.5830mm] [6.7533mm 16.7217mm] [6.8999mm 16.8853mm] [7.0622mm 17.0671mm] [7.2349mm 17.2615mm] 
+		[7.4127mm 17.4621mm] [7.5905mm 17.6628mm] [7.7624mm 17.8576mm] [7.9235mm 18.0405mm] [8.0680mm 18.2051mm] 
+		[8.1907mm 18.3455mm] [8.2864mm 18.4558mm] [8.3499mm 18.5297mm] [8.3753mm 18.5607mm] [8.3969mm 18.5467mm] 
+		[8.4261mm 18.5322mm] [8.4731mm 18.6513mm] [8.4246mm 18.6854mm] [8.3616mm 18.7362mm] [8.2997mm 18.7865mm] 
+		[8.2450mm 18.8276mm] [8.2034mm 18.8556mm] [8.1810mm 18.8657mm] [8.1536mm 18.8581mm] [8.1394mm 18.8370mm] 
+		[8.1389mm 18.8055mm] [8.1531mm 18.7672mm] [8.1683mm 18.7166mm] [8.1373mm 18.6681mm] [8.0957mm 18.6206mm] 
+		[8.0223mm 18.5353mm] [7.9212mm 18.4172mm] [7.7970mm 18.2721mm] [7.6545mm 18.1050mm] [7.4978mm 17.9211mm] 
+		[7.3317mm 17.7260mm] [7.1602mm 17.5251mm] [6.9888mm 17.3234mm] [6.8209mm 17.1263mm] [6.6616mm 16.9391mm] 
+		[6.5156mm 16.7674mm] [6.3868mm 16.6163mm] [6.2801mm 16.4911mm] [6.1998mm 16.3971mm] [6.1511mm 16.3397mm] 
+		[6.0548mm 16.2300mm] [5.9420mm 16.1045mm] [5.8272mm 15.9790mm] [5.7236mm 15.8688mm] [5.5115mm 15.6257mm] 
+		[5.3726mm 15.4118mm] [5.2966mm 15.2081mm] [5.2738mm 14.9950mm] [5.3009mm 14.8076mm] [5.3774mm 14.6493mm] 
+		[5.4965mm 14.5297mm] [5.6522mm 14.4573mm] [5.8199mm 14.4403mm] [5.9971mm 14.4741mm] [6.1813mm 14.5579mm] 
+		[6.3687mm 14.6900mm] [6.4274mm 14.7453mm] [6.5135mm 14.8342mm] [6.6151mm 14.9445mm] [6.7210mm 15.0636mm] 
+		[6.8376mm 15.1962mm] [6.9679mm 15.3415mm] [7.0962mm 15.4827mm] [7.2067mm 15.6016mm] [7.3030mm 15.7057mm] 
+		[7.3880mm 15.8025mm] [7.4709mm 15.9003mm] [7.5595mm 16.0075mm] [7.6626mm 16.1319mm] [7.7884mm 16.2825mm] 
+		[7.9451mm 16.4672mm] [8.1412mm 16.6943mm] [8.4693mm 17.0702mm] [8.7248mm 17.3610mm] [8.9141mm 17.5744mm] 
+		[9.0441mm 17.7174mm] [9.0982mm 17.7740mm] [9.1325mm 17.8009mm] [9.1584mm 17.8037mm] [9.1876mm 17.7882mm] 
+		[9.2311mm 17.7689mm] [9.2610mm 17.7811mm] [9.2821mm 17.8167mm] [9.2743mm 17.8599mm] [9.2344mm 17.9178mm] 
+		[9.1587mm 17.9981mm] [9.0881mm 18.0704mm] [9.0484mm 18.1238mm] [9.0284mm 18.1779mm] [9.0169mm 18.2526mm] 
+		[9.0015mm 18.5038mm] [9.0175mm 18.7209mm] [9.0657mm 18.9074mm] [9.1467mm 19.0669mm] [9.1902mm 19.1317mm] 
+		[9.2250mm 19.1812mm] [9.2537mm 19.2165mm] [9.2781mm 19.2401mm] [9.3007mm 19.2531mm] [9.3238mm 19.2579mm] 
+		[9.3497mm 19.2556mm] [9.3802mm 19.2482mm] [9.4538mm 19.2373mm] [9.5112mm 19.2599mm] [9.5554mm 19.3112mm] 
+		[9.5537mm 19.3676mm] [9.5100mm 19.4189mm] [9.4292mm 19.4545mm] [9.3878mm 19.4687mm] [9.3708mm 19.4822mm] 
+		[9.3913mm 19.5627mm] [9.4449mm 19.7514mm] [9.5211mm 20.0118mm] [9.6090mm 20.3074mm] [9.6977mm 20.6021mm] 
+		[9.7762mm 20.8594mm] [9.8336mm 21.0430mm] [9.8592mm 21.1159mm] [9.8907mm 21.1355mm] [9.9745mm 21.1837mm] 
+		[10.1043mm 21.2576mm] [404.52mil 21.3539mm] [10.4802mm 21.4695mm] [10.7149mm 21.6010mm] [10.9730mm 21.7453mm] 
+		[11.2488mm 21.8992mm] [453.76mil 22.0539mm] [11.7853mm 22.1997mm] [12.0233mm 22.3338mm] [12.2328mm 22.4527mm] 
+		[12.4086mm 22.5533mm] [12.5445mm 22.6318mm] [12.6349mm 22.6854mm] [12.6738mm 22.7103mm] [12.7116mm 22.7527mm] 
+		[12.7279mm 22.7890mm] [12.7147mm 22.8169mm] [12.6644mm 22.8515mm] [12.5605mm 22.8980mm] [12.3865mm 22.9622mm] 
+		[12.1264mm 23.0501mm] [463.13mil 23.1675mm] [444.15mil 23.3199mm] [10.6641mm 23.5132mm] [10.1086mm 23.6864mm] 
+		[9.5600mm 23.8563mm] [9.0383mm 24.0173mm] [8.5636mm 24.1629mm] [8.1567mm 24.2871mm] [7.8374mm 24.3834mm] 
+		[7.6260mm 24.4456mm] 
+	)
+	Polygon("clearpoly")
+	(
+		[8.5064mm 23.7813mm] [8.4891mm 935.52mil] [8.4703mm 23.7389mm] [8.4556mm 23.7084mm] [8.4495mm 23.6675mm] 
+		[8.4533mm 930.72mil] [8.4637mm 23.6076mm] [8.4782mm 23.5728mm] [8.4955mm 23.5390mm] [8.5130mm 23.5095mm] 
+		[8.5290mm 23.4877mm] [8.5417mm 23.4765mm] [8.5491mm 924.39mil] [8.5613mm 23.5250mm] [8.5824mm 23.6030mm] 
+		[8.6100mm 23.6860mm] [8.6428mm 23.7478mm] [8.6784mm 23.7991mm] [8.6862mm 23.8306mm] [8.6723mm 23.8456mm] 
+		[8.6436mm 23.8471mm] [8.6062mm 23.8382mm] [8.5663mm 23.8222mm] [8.5310mm 23.8024mm] 
+	)
+)
+Layer(10 "silk")
+(
+)
+NetList()
+(
+	Net("+3.3V" "(unknown)")
+	(
+		Connect("C5-2")
+		Connect("C6-2")
+		Connect("C7-2")
+		Connect("C8-2")
+		Connect("CHAIN-1")
+		Connect("Prog-1")
+		Connect("R11-1")
+		Connect("R12-1")
+		Connect("R13-2")
+		Connect("R15-2")
+		Connect("U1-1")
+		Connect("U4-2")
+		Connect("U4-4")
+		Connect("U6-8")
+		Connect("U8-8")
+	)
+	Net("DetectLV" "(unknown)")
+	(
+		Connect("CHAIN-4")
+		Connect("U1-11")
+		Connect("U7-4")
+	)
+	Net("ESP_EN" "(unknown)")
+	(
+		Connect("R13-1")
+		Connect("U6-1")
+		Connect("U6-3")
+		Connect("U6-17")
+	)
+	Net("ESP_GPIO0" "(unknown)")
+	(
+		Connect("Prog-7")
+		Connect("R15-1")
+		Connect("U6-18")
+	)
+	Net("ESP_GPIO15" "(unknown)")
+	(
+		Connect("R17-1")
+		Connect("U6-16")
+	)
+	Net("GND" "(unknown)")
+	(
+		Connect("C2-1")
+		Connect("C3-2")
+		Connect("C4-1")
+		Connect("C5-1")
+		Connect("C6-1")
+		Connect("C7-1")
+		Connect("C8-1")
+		Connect("C9-2")
+		Connect("CHAIN-5")
+		Connect("Prog-8")
+		Connect("R2-1")
+		Connect("R6-1")
+		Connect("R7-1")
+		Connect("R17-2")
+		Connect("SW-3")
+		Connect("U1-14")
+		Connect("U2-2")
+		Connect("U3-4")
+		Connect("U4-1")
+		Connect("U5-3")
+		Connect("U6-15")
+		Connect("U7-3")
+		Connect("U8-4")
+	)
+	Net("HotIn" "(unknown)")
+	(
+		Connect("F1-1")
+		Connect("HI-1")
+		Connect("R9-2")
+		Connect("SCR1-1")
+		Connect("U7-2")
+	)
+	Net("HotOut" "(unknown)")
+	(
+		Connect("HO-1")
+		Connect("SCR1-2")
+	)
+	Net("ICPC" "(unknown)")
+	(
+		Connect("Prog-4")
+		Connect("U1-12")
+	)
+	Net("ICPD" "(unknown)")
+	(
+		Connect("Prog-3")
+		Connect("U1-13")
+	)
+	Net("Neutral" "(unknown)")
+	(
+		Connect("N-1")
+		Connect("R18-1")
+		Connect("U3-2")
+		Connect("V1-1")
+	)
+	Net("RX" "(unknown)")
+	(
+		Connect("Prog-6")
+		Connect("U6-21")
+	)
+	Net("s1" "(unknown)")
+	(
+		Connect("SW-1")
+		Connect("U1-3")
+	)
+	Net("s2" "(unknown)")
+	(
+		Connect("SW-2")
+		Connect("U1-2")
+	)
+	Net("SCL" "(unknown)")
+	(
+		Connect("CHAIN-2")
+		Connect("R11-2")
+		Connect("U1-10")
+		Connect("U6-20")
+		Connect("U8-6")
+	)
+	Net("SCRCntl" "(unknown)")
+	(
+		Connect("R8-2")
+		Connect("U1-6")
+		Connect("U6-4")
+	)
+	Net("SDA" "(unknown)")
+	(
+		Connect("CHAIN-3")
+		Connect("R12-2")
+		Connect("U1-9")
+		Connect("U6-19")
+		Connect("U8-5")
+	)
+	Net("TX" "(unknown)")
+	(
+		Connect("Prog-5")
+		Connect("U6-22")
+	)
+	Net("unnamed_net1" "(unknown)")
+	(
+		Connect("C1-1")
+		Connect("U5-7")
+	)
+	Net("unnamed_net2" "(unknown)")
+	(
+		Connect("Q1-4")
+		Connect("R1-2")
+		Connect("R3-2")
+		Connect("U3-3")
+	)
+	Net("unnamed_net3" "(unknown)")
+	(
+		Connect("R1-1")
+		Connect("R2-2")
+	)
+	Net("unnamed_net4" "(unknown)")
+	(
+		Connect("R3-1")
+		Connect("R4-2")
+	)
+	Net("unnamed_net5" "(unknown)")
+	(
+		Connect("R4-1")
+		Connect("U5-1")
+	)
+	Net("unnamed_net6" "(unknown)")
+	(
+		Connect("R7-2")
+		Connect("U5-2")
+	)
+	Net("unnamed_net7" "(unknown)")
+	(
+		Connect("R5-1")
+		Connect("R6-2")
+		Connect("U5-5")
+	)
+	Net("unnamed_net8" "(unknown)")
+	(
+		Connect("Q1-1")
+		Connect("U5-8")
+	)
+	Net("unnamed_net9" "(unknown)")
+	(
+		Connect("F1-2")
+		Connect("U3-1")
+		Connect("V1-2")
+	)
+	Net("unnamed_net10" "(unknown)")
+	(
+		Connect("SCR1-3")
+		Connect("U2-3")
+	)
+	Net("unnamed_net11" "(unknown)")
+	(
+		Connect("R19-2")
+		Connect("U2-4")
+	)
+	Net("unnamed_net12" "(unknown)")
+	(
+		Connect("R8-1")
+		Connect("U2-1")
+	)
+	Net("unnamed_net13" "(unknown)")
+	(
+		Connect("R9-1")
+		Connect("R19-1")
+	)
+	Net("unnamed_net14" "(unknown)")
+	(
+		Connect("R10-2")
+		Connect("U7-1")
+	)
+	Net("unnamed_net15" "(unknown)")
+	(
+		Connect("R10-1")
+		Connect("R18-2")
+	)
+	Net("VPP" "(unknown)")
+	(
+		Connect("Prog-2")
+		Connect("U1-4")
+	)
+	Net("VUreg" "(unknown)")
+	(
+		Connect("C1-2")
+		Connect("C2-2")
+		Connect("C3-1")
+		Connect("C4-2")
+		Connect("C9-1")
+		Connect("Q1-3")
+		Connect("R5-2")
+		Connect("U4-3")
+		Connect("U5-6")
+	)
+)
+

--- /dev/null
+++ b/schem/Boards/Single/ESP8266/Dimmer/ESP8266_Dimmer.sch
@@ -1,1 +1,1162 @@
+v 20130925 2
+C 54800 39800 1 90 0 capacitor-1.sym
+{
+T 54100 40000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 53900 40000 5 10 0 0 90 0 1
+symversion=0.1
+T 53900 40300 5 10 1 1 0 0 1
+refdes=C2
+T 53900 40100 5 10 1 1 0 0 1
+value=1uF
+T 53900 39900 5 10 1 1 0 0 1
+footprint=0805
+}
+C 52700 39300 1 0 0 capacitor-1.sym
+{
+T 52900 40000 5 10 0 0 0 0 1
+device=CAPACITOR
+T 52900 40200 5 10 0 0 0 0 1
+symversion=0.1
+T 52800 39600 5 10 1 1 0 0 1
+refdes=C1
+T 53300 39600 5 10 1 1 0 0 1
+value=100nF
+T 53300 39200 5 10 1 1 0 0 1
+footprint=0805
+}
+C 55700 40700 1 270 0 capacitor-2.sym
+{
+T 56400 40500 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 56600 40500 5 10 0 0 270 0 1
+symversion=0.1
+T 55000 40300 5 10 1 1 0 0 1
+refdes=C3
+T 55000 40100 5 10 1 1 0 0 1
+value=470uF
+T 55000 39900 5 10 1 1 0 0 1
+footprint=FCAPEL
+}
+C 50600 39800 1 90 0 resistor-1.sym
+{
+T 50200 40100 5 10 0 0 90 0 1
+device=RESISTOR
+T 49900 40400 5 10 1 1 0 0 1
+refdes=R1
+T 49900 40200 5 10 1 1 0 0 1
+value=200k
+T 49900 40000 5 10 1 1 0 0 1
+footprint=0805_fit
+}
+C 50600 38700 1 90 0 resistor-1.sym
+{
+T 50200 39000 5 10 0 0 90 0 1
+device=RESISTOR
+T 49900 39400 5 10 1 1 0 0 1
+refdes=R2
+T 49900 39200 5 10 1 1 0 0 1
+value=200k
+T 49900 39000 5 10 1 1 0 0 1
+footprint=0805_fit
+}
+C 51600 38700 1 90 0 resistor-1.sym
+{
+T 51200 39000 5 10 0 0 90 0 1
+device=RESISTOR
+T 50900 39300 5 10 1 1 0 0 1
+refdes=R4
+T 50900 39100 5 10 1 1 0 0 1
+value=510k
+T 50900 38900 5 10 1 1 0 0 1
+footprint=0805_fit
+}
+C 51600 39800 1 90 0 resistor-1.sym
+{
+T 51200 40100 5 10 0 0 90 0 1
+device=RESISTOR
+T 50900 40400 5 10 1 1 0 0 1
+refdes=R3
+T 50900 40200 5 10 1 1 0 0 1
+value=510k
+T 50900 40000 5 10 1 1 0 0 1
+footprint=0805_fit
+}
+C 50500 36000 1 90 0 resistor-1.sym
+{
+T 50100 36300 5 10 0 0 90 0 1
+device=RESISTOR
+T 49800 36700 5 10 1 1 0 0 1
+refdes=R7
+T 49800 36500 5 10 1 1 0 0 1
+value=100k
+T 49800 36300 5 10 1 1 0 0 1
+footprint=0805
+}
+C 56400 37800 1 90 0 resistor-1.sym
+{
+T 56000 38100 5 10 0 0 90 0 1
+device=RESISTOR
+T 55700 38500 5 10 1 1 0 0 1
+refdes=R5
+T 55700 38100 5 10 1 1 0 0 1
+footprint=0805
+T 55700 38300 5 10 1 1 0 0 1
+value=68k
+}
+C 56400 36500 1 90 0 resistor-1.sym
+{
+T 56000 36800 5 10 0 0 90 0 1
+device=RESISTOR
+T 55700 37200 5 10 1 1 0 0 1
+refdes=R6
+T 55700 37000 5 10 1 1 0 0 1
+value=10k
+T 55700 36800 5 10 1 1 0 0 1
+footprint=0805
+}
+N 51500 38500 51500 38700 4
+N 51500 39600 51500 39800 4
+N 49800 40900 51700 40900 4
+N 50500 40900 50500 40700 4
+N 51500 40900 51500 40700 4
+N 50400 36900 50400 37100 4
+N 50400 37100 50600 37100 4
+C 50400 38200 1 0 0 gnd-1.sym
+N 50500 38500 50500 38700 4
+N 50500 39600 50500 39800 4
+C 50300 35500 1 0 0 gnd-1.sym
+N 50400 35800 50400 36000 4
+N 52000 38500 52000 39700 4
+N 52000 39700 52200 39700 4
+N 52200 39700 52200 40300 4
+N 52500 38500 52500 39500 4
+N 52500 39500 52700 39500 4
+N 52700 40900 56300 40900 4
+N 53800 39000 53800 40900 4
+N 53800 39500 53600 39500 4
+N 53000 38500 53000 39000 4
+N 53000 39000 53800 39000 4
+N 54600 40900 54600 40700 4
+N 55900 40900 55900 40700 4
+C 54500 39300 1 0 0 gnd-1.sym
+C 55800 39300 1 0 0 gnd-1.sym
+N 54600 39600 54600 39800 4
+N 55900 39600 55900 39800 4
+N 56300 40900 56300 38700 4
+N 53900 37600 56300 37600 4
+N 56300 37400 56300 37800 4
+C 56200 36000 1 0 0 gnd-1.sym
+N 56300 36300 56300 36500 4
+C 50600 36500 1 0 0 SR086.sym
+{
+T 51000 38200 5 10 1 1 0 0 1
+refdes=U5
+T 53100 36700 5 10 1 1 0 0 1
+footprint=SO8
+T 51000 36700 5 10 1 1 0 0 1
+device=SR086
+}
+C 52700 40300 1 90 0 IGBT_DPAK.sym
+{
+T 52200 41200 5 10 0 0 90 0 1
+device=NPN_TRANSISTOR
+T 49900 41800 5 10 0 0 90 0 1
+device=NPN_TRANSISTOR_IGBT
+T 51600 41000 5 10 1 1 0 0 1
+refdes=Q1
+T 52400 41000 5 10 1 1 0 0 1
+device=STGD5NB120SZ
+T 52600 40500 5 10 1 1 0 0 1
+footprint=DPAK
+}
+C 52200 36000 1 0 0 gnd-1.sym
+N 52300 36300 52300 36500 4
+C 46400 40300 1 0 0 fuse-1.sym
+{
+T 46600 40700 5 10 0 0 0 0 1
+device=FUSE
+T 46600 40900 5 10 0 0 0 0 1
+symversion=0.1
+T 46400 40400 5 10 1 1 0 0 1
+refdes=F1
+T 47200 40400 5 10 1 1 0 0 1
+value=1A
+T 46400 40000 5 10 1 1 0 0 1
+footprint=2410
+}
+C 47700 39200 1 90 0 varistor-1.sym
+{
+T 46900 39300 5 10 0 0 90 0 1
+device=MOV
+T 46050 39500 5 10 0 0 90 0 1
+device=VARISTOR
+T 46600 39500 5 10 1 1 0 0 1
+refdes=V1
+T 46600 39300 5 10 1 1 0 0 1
+footprint=ACY200
+}
+N 47500 40300 47500 40100 4
+N 47300 40300 48000 40300 4
+C 48000 39600 1 0 0 bridge-2.sym
+{
+T 48200 40800 5 10 0 0 0 0 1
+device=BRIDGE
+T 48200 41000 5 10 0 0 0 0 1
+symversion=0.1
+T 48200 40600 5 10 1 1 0 0 1
+refdes=U3
+T 48600 40600 5 10 1 1 0 0 1
+footprint=MICRODIP4
+T 48200 39400 5 10 1 1 0 0 1
+device=MDB8SFSCT
+}
+N 49200 40300 49400 40300 4
+C 49700 40200 1 90 0 gnd-1.sym
+N 46200 40300 46400 40300 4
+{
+T 45900 40200 5 10 1 1 180 2 1
+netname=HotIn
+}
+N 47500 39200 47500 39000 4
+N 47300 39000 47800 39000 4
+{
+T 47000 38900 5 10 1 1 0 6 1
+netname=Neutral
+}
+N 48000 39800 47800 39800 4
+N 47800 39800 47800 39000 4
+N 49200 39800 49800 39800 4
+N 49800 39800 49800 40900 4
+C 46200 40300 1 90 0 busripper-2.sym
+{
+T 45800 40300 5 8 0 0 90 0 1
+device=none
+}
+C 47300 39000 1 90 0 busripper-2.sym
+{
+T 46900 39000 5 8 0 0 90 0 1
+device=none
+}
+T 45400 35400 9 10 1 0 0 0 1
+3.3V Regulation
+C 51700 48700 1 90 1 triac-1.sym
+{
+T 50800 48400 5 10 0 0 270 2 1
+device=TRIAC
+T 51500 48500 5 10 1 1 0 0 1
+refdes=SCR1
+T 51500 47800 5 10 1 1 0 0 1
+footprint=D2PAK
+}
+C 47000 48100 1 0 0 FODM3053V.sym
+{
+T 47795 49200 5 10 1 1 0 0 1
+device=FODM3053V
+T 47395 49200 5 10 1 1 0 0 1
+refdes=U2
+T 47395 48100 5 10 1 1 0 0 1
+footprint=MFP4
+}
+C 50300 48800 1 0 0 resistor-1.sym
+{
+T 50600 49200 5 10 0 0 0 0 1
+device=RESISTOR
+T 50200 49000 5 10 1 1 0 0 1
+refdes=R9
+T 50600 49100 5 10 1 1 0 0 1
+footprint=0805_fit
+T 50600 48600 5 10 1 1 0 0 1
+value=220
+}
+N 50200 48900 50300 48900 4
+N 51400 48700 51400 49500 4
+N 51400 48900 51200 48900 4
+N 51000 48000 50600 48000 4
+N 50600 48000 50600 48500 4
+N 50600 48500 49200 48500 4
+C 46700 48000 1 0 0 gnd-1.sym
+N 46800 48500 47000 48500 4
+N 51400 47600 51500 47600 4
+{
+T 51800 47500 5 10 1 1 0 0 1
+netname=HotOut
+}
+N 51400 47600 51400 47800 4
+N 51200 49500 51400 49500 4
+{
+T 50900 49400 5 10 1 1 0 6 1
+netname=HotIn
+}
+N 45800 48900 45900 48900 4
+{
+T 45500 48800 5 10 1 1 0 6 1
+netname=SCRCntl
+}
+N 46800 48300 46800 48500 4
+C 46800 48800 1 0 1 resistor-1.sym
+{
+T 46500 49200 5 10 0 0 0 6 1
+device=RESISTOR
+T 46100 49000 5 10 1 1 0 6 1
+refdes=R8
+T 46200 49100 5 10 1 1 0 0 1
+footprint=0805
+T 46200 48600 5 10 1 1 0 0 1
+value=220
+}
+N 46800 48900 47000 48900 4
+C 51200 49500 1 90 0 busripper-2.sym
+{
+T 50800 49500 5 8 0 0 90 0 1
+device=none
+}
+C 51500 47600 1 270 1 busripper-2.sym
+{
+T 51900 47600 5 8 0 0 90 2 1
+device=none
+}
+C 45800 48900 1 90 0 busripper-2.sym
+{
+T 45400 48900 5 8 0 0 90 0 1
+device=none
+}
+B 44600 47300 8000 2600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+B 45300 41800 5600 5500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54900 49200 1 180 1 resistor-1.sym
+{
+T 55200 48800 5 10 0 0 180 6 1
+device=RESISTOR
+T 54600 49400 5 10 1 1 180 6 1
+refdes=R10
+T 55100 49400 5 10 1 1 180 6 1
+footprint=0805_fit
+T 55100 48800 5 10 1 1 0 0 1
+value=100k
+}
+N 55800 49100 55900 49100 4
+N 53800 49100 53900 49100 4
+{
+T 53500 49200 5 10 1 1 180 0 1
+netname=Neutral
+}
+C 58100 48500 1 90 0 gnd-1.sym
+N 57700 48600 57800 48600 4
+C 57800 49100 1 270 1 busripper-2.sym
+{
+T 58200 49100 5 8 0 0 90 2 1
+device=none
+}
+N 57800 49100 57700 49100 4
+{
+T 58100 49000 5 10 1 1 0 0 1
+netname=DetectLV
+}
+B 52600 47300 6400 2600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 49500 44000 1 270 1 busripper-2.sym
+{
+T 49900 44000 5 8 0 0 90 2 1
+device=none
+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+{
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+}
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+T 57600 44400 5 8 0 0 90 2 1
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+}
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+}
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+T 57600 44000 5 8 0 0 90 2 1
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+}
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+}
+C 52600 46400 1 90 0 busripper-2.sym
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+T 52200 46400 5 8 0 0 90 0 1
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+}
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+T 52300 46300 5 10 1 1 0 6 1
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+}
+C 52600 45600 1 90 0 busripper-2.sym
+{
+T 52200 45600 5 8 0 0 90 0 1
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+}
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+{
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+}
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+}
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+}
+C 60500 44600 1 90 0 busripper-2.sym
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+}
+C 60500 44100 1 90 0 busripper-2.sym
+{
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+}
+C 58100 40400 1 0 0 connector1-2.sym
+{
+T 58700 41300 5 10 1 1 0 6 1
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+T 58400 41250 5 10 0 0 0 0 1
+device=CONNECTOR_1
+T 58100 40100 5 10 1 1 0 0 1
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+}
+C 58100 38900 1 0 0 connector1-2.sym
+{
+T 58800 39800 5 10 1 1 0 6 1
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+device=CONNECTOR_1
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+}
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+}
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+}
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+}
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+}
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+{
+T 57600 39300 5 8 0 0 90 0 1
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+}
+N 58000 37800 58100 37800 4
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+T 60700 38100 5 10 1 1 0 6 1
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+}
+N 60600 44100 60500 44100 4
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+T 60200 44000 5 10 1 1 0 6 1
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+}
+N 60700 44600 60500 44600 4
+{
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+}
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+}
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+}
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+}
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+}
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+}
+N 60600 43600 60600 44600 4
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+}
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+N 58000 35200 57900 35200 4
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+}
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+}
+N 57900 36000 58000 36000 4
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+}
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+}
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+}
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+}
+C 47300 43200 1 0 0 PIC16F1613.sym
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+device=PIC16F1503
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+}
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+{
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+refdes=R18
+T 53800 49600 5 10 1 1 180 6 1
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+value=100k
+}
+N 54800 49100 54900 49100 4
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+refdes=R19
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+}
+N 49200 48900 49300 48900 4
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+refdes=CHAIN
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+device=CONNECTOR_5
+T 62200 33850 5 10 1 1 0 0 1
+footprint=GSIP5_NS
+}
+C 62000 35400 1 90 0 busripper-2.sym
+{
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+}
+N 62100 35400 62000 35400 4
+{
+T 61700 35300 5 10 1 1 0 6 1
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+}
+C 62000 35800 1 90 0 busripper-2.sym
+{
+T 61600 35800 5 8 0 0 90 0 1
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+}
+N 62100 35800 62000 35800 4
+{
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+}
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+N 62000 34600 62100 34600 4
+C 62000 35000 1 90 0 busripper-2.sym
+{
+T 61600 35000 5 8 0 0 90 0 1
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+}
+N 62000 35000 62100 35000 4
+{
+T 61700 34800 5 10 1 1 0 6 1
+netname=DetectLV
+}
+C 62100 36000 1 90 0 3.3V-plus-1.sym
 

--- /dev/null
+++ b/schem/fp/0805_fit.fp
@@ -1,1 +1,6 @@
+Element[0x0 "0805_fit" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[ 1mm 0.2mm  1mm -0.2mm 0.8mm 0.8mm 0.8mm "" "1" 0x0100]
+   Pad[-1mm 0.2mm -1mm -0.2mm 0.8mm 0.8mm 0.8mm "" "2" 0x0100]
+)
 

file:b/schem/fp/2410.fp (new)
--- /dev/null
+++ b/schem/fp/2410.fp
@@ -1,1 +1,6 @@
+Element[0x0 "2410" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[ 2.9mm 0  2.9mm 0 2.8mm 2.8mm 2.8mm "" "1" 0x0100]
+   Pad[-2.9mm 0 -2.9mm 0 2.8mm 2.8mm 2.8mm "" "2" 0x0100]
+)
 

--- /dev/null
+++ b/schem/fp/2500AT44M0400.fp
@@ -1,1 +1,6 @@
+Element[0x0 "FUSE_SST" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[ 4mm 0.25mm  4mm -0.25mm 1mm 20mil 1mm "" "1" 0x0100]
+   Pad[-4mm 0.25mm -4mm -0.25mm 1mm 2mil 1mm "" "2" 0x0100]
+)
 

--- /dev/null
+++ b/schem/fp/4_MINIFLAT_1.fp
@@ -1,1 +1,13 @@
+Element[0x0 "2220" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[-1.27mm 2.4mm -1.27mm 3.5mm 0.5mm 0.5mm 0.5mm "" "1" 0x0100]
+   Pad[ 1.27mm 2.4mm  1.27mm 3.5mm 0.5mm 0.5mm 0.5mm "" "2" 0x0100]
+   Pad[-1.27mm -2.4mm -1.27mm -3.5mm 0.5mm 0.5mm 0.5mm "" "4" 0x0100]
+   Pad[ 1.27mm -2.4mm  1.27mm -3.5mm 0.5mm 0.5mm 0.5mm "" "3" 0x0100]
 
+
+   ElementLine[-1.8mm 1.8mm -1.8mm -1.8mm 1000]
+   ElementLine[ 1.8mm 1.8mm  1.8mm -1.8mm 1000]
+
+)
+

--- /dev/null
+++ b/schem/fp/CC3000.fp
@@ -1,1 +1,64 @@
+Element["" "CC3000" "" "" 0 0 0 0 0 100 ""]
+(
 
+	# Center
+	Pad[ 1.9mm     0mm  2.4mm     0mm 1.9mm 20mil 1.9mm "41" "41" "square"]
+	Pad[-1.9mm     0mm -2.4mm     0mm 1.9mm 20mil 1.9mm "38" "38" "square"]
+	Pad[ 1.9mm  2.65mm  2.4mm  2.65mm 1.9mm 20mil 1.9mm "42" "42" "square"]
+	Pad[-1.9mm  2.65mm -2.4mm  2.65mm 1.9mm 20mil 1.9mm "39" "39" "square"]
+	Pad[ 1.9mm -2.65mm  2.4mm -2.65mm 1.9mm 20mil 1.9mm "40" "40" "square"]
+	Pad[-1.9mm -2.65mm -2.4mm -2.65mm 1.9mm 20mil 1.9mm "37" "37" "square"]
+
+	# Corner
+	Pad[ 5.85mm  7.25mm  5.85mm  7.25mm 1.2mm 20mil 1.2mm "45" "45" "square"]
+	Pad[-5.85mm  7.25mm -5.85mm  7.25mm 1.2mm 20mil 1.2mm "44" "44" "square"]
+	Pad[ 5.85mm -7.25mm  5.85mm -7.25mm 1.2mm 20mil 1.2mm "46" "46" "square"]
+	Pad[-5.85mm -7.25mm -5.85mm -7.25mm 1.2mm 20mil 1.2mm "43" "43" "square"]
+
+	# Sides
+	# Left
+	Pad[-5.6mm -5.4mm -6.1mm -5.4mm 0.7mm 20mil 0.7mm  "1"  "1" "square"]
+	Pad[-5.6mm -4.2mm -6.1mm -4.2mm 0.7mm 20mil 0.7mm  "2"  "2" "square"]
+	Pad[-5.6mm -3.0mm -6.1mm -3.0mm 0.7mm 20mil 0.7mm  "3"  "3" "square"]
+	Pad[-5.6mm -1.8mm -6.1mm -1.8mm 0.7mm 20mil 0.7mm  "4"  "4" "square"]
+	Pad[-5.6mm -0.6mm -6.1mm -0.6mm 0.7mm 20mil 0.7mm  "5"  "5" "square"]
+	Pad[-5.6mm  0.6mm -6.1mm  0.6mm 0.7mm 20mil 0.7mm  "6"  "6" "square"]
+	Pad[-5.6mm  1.8mm -6.1mm  1.8mm 0.7mm 20mil 0.7mm  "7"  "7" "square"]
+	Pad[-5.6mm  3.0mm -6.1mm  3.0mm 0.7mm 20mil 0.7mm  "8"  "8" "square"]
+	Pad[-5.6mm  4.2mm -6.1mm  4.2mm 0.7mm 20mil 0.7mm  "9"  "9" "square"]
+	Pad[-5.6mm  5.4mm -6.1mm  5.4mm 0.7mm 20mil 0.7mm "10" "10" "square"]
+
+	# Bottom
+	Pad[-4.2mm  7.0mm -4.2mm  7.5mm 0.7mm 20mil 0.7mm "11" "11" "square"]
+	Pad[-3.0mm  7.0mm -3.0mm  7.5mm 0.7mm 20mil 0.7mm "12" "12" "square"]
+	Pad[-1.8mm  7.0mm -1.8mm  7.5mm 0.7mm 20mil 0.7mm "13" "13" "square"]
+	Pad[-0.6mm  7.0mm -0.6mm  7.5mm 0.7mm 20mil 0.7mm "14" "14" "square"]
+	Pad[ 0.6mm  7.0mm  0.6mm  7.5mm 0.7mm 20mil 0.7mm "15" "15" "square"]
+	Pad[ 1.8mm  7.0mm  1.8mm  7.5mm 0.7mm 20mil 0.7mm "16" "16" "square"]
+	Pad[ 3.0mm  7.0mm  3.0mm  7.5mm 0.7mm 20mil 0.7mm "17" "17" "square"]
+	Pad[ 4.2mm  7.0mm  4.2mm  7.5mm 0.7mm 20mil 0.7mm "18" "18" "square"]
+
+	# Right
+	Pad[ 5.6mm -5.4mm  6.1mm -5.4mm 0.7mm 20mil 0.7mm "28" "28" "square"]
+	Pad[ 5.6mm -4.2mm  6.1mm -4.2mm 0.7mm 20mil 0.7mm "27" "27" "square"]
+	Pad[ 5.6mm -3.0mm  6.1mm -3.0mm 0.7mm 20mil 0.7mm "26" "26" "square"]
+	Pad[ 5.6mm -1.8mm  6.1mm -1.8mm 0.7mm 20mil 0.7mm "25" "25" "square"]
+	Pad[ 5.6mm -0.6mm  6.1mm -0.6mm 0.7mm 20mil 0.7mm "24" "24" "square"]
+	Pad[ 5.6mm  0.6mm  6.1mm  0.6mm 0.7mm 20mil 0.7mm "23" "23" "square"]
+	Pad[ 5.6mm  1.8mm  6.1mm  1.8mm 0.7mm 20mil 0.7mm "22" "22" "square"]
+	Pad[ 5.6mm  3.0mm  6.1mm  3.0mm 0.7mm 20mil 0.7mm "21" "21" "square"]
+	Pad[ 5.6mm  4.2mm  6.1mm  4.2mm 0.7mm 20mil 0.7mm "20" "20" "square"]
+	Pad[ 5.6mm  5.4mm  6.1mm  5.4mm 0.7mm 20mil 0.7mm "19" "19" "square"]
+
+	# Top
+	Pad[-4.2mm -7.0mm -4.2mm -7.5mm 0.7mm 20mil 0.7mm "36" "36" "square"]
+	Pad[-3.0mm -7.0mm -3.0mm -7.5mm 0.7mm 20mil 0.7mm "35" "35" "square"]
+	Pad[-1.8mm -7.0mm -1.8mm -7.5mm 0.7mm 20mil 0.7mm "34" "34" "square"]
+	Pad[-0.6mm -7.0mm -0.6mm -7.5mm 0.7mm 20mil 0.7mm "33" "33" "square"]
+	Pad[ 0.6mm -7.0mm  0.6mm -7.5mm 0.7mm 20mil 0.7mm "32" "32" "square"]
+	Pad[ 1.8mm -7.0mm  1.8mm -7.5mm 0.7mm 20mil 0.7mm "31" "31" "square"]
+	Pad[ 3.0mm -7.0mm  3.0mm -7.5mm 0.7mm 20mil 0.7mm "30" "30" "square"]
+	Pad[ 4.2mm -7.0mm  4.2mm -7.5mm 0.7mm 20mil 0.7mm "29" "29" "square"]
+
+)
+

--- /dev/null
+++ b/schem/fp/CON_TP__Vector_K24.fp
@@ -1,1 +1,7 @@
+Element[0x0 "con-testpoint" "" "" 0 0 -7000 -11000 0 100 0x0]
+(
+   Pin[0 0 7500 2000 9500 4600 "" "1" 0x01]
+   ElementArc[0 0 4750 4750 0 360 1000]
+   
+)
 

file:b/schem/fp/DFN8.fp (new)
--- /dev/null
+++ b/schem/fp/DFN8.fp
@@ -1,1 +1,17 @@
+# DFN with center exposed thermal pad
+Element[0x00000000 "DFN with center pad" "" "" 0 0 -8389 -13185 0 100 0x00000000]
+(
+	Pad[-1.675mm -0.75mm -1.225mm -0.75mm 0.30mm 0.30mm 0.30mm "1" "1" 0x00000100]
+	Pad[-1.675mm -0.25mm -1.225mm -0.25mm 0.30mm 0.30mm 0.30mm "2" "2" 0x00000100]
+	Pad[-1.675mm  0.25mm -1.225mm  0.25mm 0.30mm 0.30mm 0.30mm "3" "3" 0x00000100]
+	Pad[-1.675mm  0.75mm -1.225mm  0.75mm 0.30mm 0.30mm 0.30mm "4" "4" 0x00000100]
+	Pad[ 1.675mm  0.75mm  1.225mm  0.75mm 0.30mm 0.30mm 0.30mm "5" "5" 0x00000100]
+	Pad[ 1.675mm  0.25mm  1.225mm  0.25mm 0.30mm 0.30mm 0.30mm "6" "6" 0x00000100]
+	Pad[ 1.675mm -0.25mm  1.225mm -0.25mm 0.30mm 0.30mm 0.30mm "7" "7" 0x00000100]
+	Pad[ 1.675mm -0.75mm  1.225mm -0.75mm 0.30mm 0.30mm 0.30mm "8" "8" 0x00000100]
+	Pad[-0.15mm  0.00mm  0.15mm  0.00mm 1.45mm 1.45mm 1.45mm "9" "9" 0x00000100]
+	ElementLine [ 1.5mm -1.0mm -1.5mm -1.0mm 600]
+	ElementLine [ 1.5mm  1.0mm -1.5mm  1.0mm 600]
+)
 
+

--- /dev/null
+++ b/schem/fp/ESP_12E.fp
@@ -1,1 +1,38 @@
+Element["" "ESP_12E" "" "" 1000 1000 0nm -1000000nm 0 100 ""]
+(
+	Pad[-6.9mm -3.8mm -8.1mm -3.8mm 1mm 1mm 1mm "1" "1" "square"]
+	Pad[-6.9mm -1.8mm -8.1mm -1.8mm 1mm 1mm 1mm "2" "2" "square"]
+	Pad[-6.9mm  0.2mm -8.1mm  0.2mm 1mm 1mm 1mm "3" "3" "square"]
+	Pad[-6.9mm  2.2mm -8.1mm  2.2mm 1mm 1mm 1mm "4" "4" "square"]
+	Pad[-6.9mm  4.2mm -8.1mm  4.2mm 1mm 1mm 1mm "5" "5" "square"]
+	Pad[-6.9mm  6.2mm -8.1mm  6.2mm 1mm 1mm 1mm "6" "6" "square"]
+	Pad[-6.9mm  8.2mm -8.1mm  8.2mm 1mm 1mm 1mm "7" "7" "square"]
+	Pad[-6.9mm 10.2mm -8.1mm 10.2mm 1mm 1mm 1mm "8" "8" "square"]
 
+	Pad[-5mm 11.5mm -5mm 12.5mm 1mm 1mm 1mm  "9"  "9" "square"]
+	Pad[-3mm 11.5mm -3mm 12.5mm 1mm 1mm 1mm "10" "10" "square"]
+	Pad[-1mm 11.5mm -1mm 12.5mm 1mm 1mm 1mm "11" "11" "square"]
+	Pad[ 1mm 11.5mm  1mm 12.5mm 1mm 1mm 1mm "12" "12" "square"]
+	Pad[ 3mm 11.5mm  3mm 12.5mm 1mm 1mm 1mm "13" "13" "square"]
+	Pad[ 5mm 11.5mm  5mm 12.5mm 1mm 1mm 1mm "14" "14" "square"]
+
+	Pad[ 6.9mm -3.8mm  8.1mm -3.8mm 1mm 1mm 1mm "22" "22" "square"]
+	Pad[ 6.9mm -1.8mm  8.1mm -1.8mm 1mm 1mm 1mm "21" "21" "square"]
+	Pad[ 6.9mm  0.2mm  8.1mm  0.2mm 1mm 1mm 1mm "20" "20" "square"]
+	Pad[ 6.9mm  2.2mm  8.1mm  2.2mm 1mm 1mm 1mm "19" "19" "square"]
+	Pad[ 6.9mm  4.2mm  8.1mm  4.2mm 1mm 1mm 1mm "18" "18" "square"]
+	Pad[ 6.9mm  6.2mm  8.1mm  6.2mm 1mm 1mm 1mm "17" "17" "square"]
+	Pad[ 6.9mm  8.2mm  8.1mm  8.2mm 1mm 1mm 1mm "16" "16" "square"]
+	Pad[ 6.9mm 10.2mm  8.1mm 10.2mm 1mm 1mm 1mm "15" "15" "square"]
+
+	ElementLine[-8mm -12mm  8mm -12mm 1000]
+	ElementLine[-8mm -12mm -8mm  -5mm 1000]
+	ElementLine[ 8mm -12mm  8mm  -5mm 1000]
+	ElementLine[-8mm 12mm  -8mm   11mm 1000]
+	ElementLine[ 8mm 12mm   8mm   11mm 1000]
+	ElementLine[-8mm 12mm  -6mm   12mm 1000]
+	ElementLine[ 8mm 12mm   6mm   12mm 1000]
+
+)
+
+

--- /dev/null
+++ b/schem/fp/GSIP3_NS.fp
@@ -1,1 +1,7 @@
+Element(0x00 "Single in line package" "" "SIP5" 160 10 3 100 0x00)
+(
+	Pin(50 50 70 38 "1" 0x101)
+	Pin(50 150 70 38 "2" 0x01)
+	Pin(50 250 70 38 "3" 0x01)
+)
 

--- /dev/null
+++ b/schem/fp/GSIP5_NS.fp
@@ -1,1 +1,9 @@
+Element(0x00 "Single in line package" "" "SIP5" 160 10 3 100 0x00)
+(
+	Pin(50 50 70 38 "1" 0x101)
+	Pin(50 150 70 38 "2" 0x01)
+	Pin(50 250 70 38 "3" 0x01)
+	Pin(50 350 70 38 "4" 0x01)
+	Pin(50 450 70 38 "5" 0x01)
+)
 

--- /dev/null
+++ b/schem/fp/SSOP20W.fp
@@ -1,1 +1,32 @@
 
+Element["" "Shrink small outline package, .65mm, wide" "" "SSOP20" 6707 2710 13000 3800 3 100 ""]
+(
+	Pad[-4400 0 -2200 0 1600 3000 2200 "1" "1" ""]
+	Pad[-4400 2600 -2200 2600 1600 3000 2200 "2" "2" "square"]
+	Pad[-4400 5100 -2200 5100 1600 3000 2200 "3" "3" "square"]
+	Pad[-4400 7700 -2200 7700 1600 3000 2200 "4" "4" "square"]
+	Pad[-4400 10300 -2200 10300 1600 3000 2200 "5" "5" "square"]
+	Pad[-4400 12800 -2200 12800 1600 3000 2200 "6" "6" "square"]
+	Pad[-4400 15400 -2200 15400 1600 3000 2200 "7" "7" "square"]
+	Pad[-4400 17900 -2200 17900 1600 3000 2200 "8" "8" "square"]
+	Pad[-4400 20500 -2200 20500 1600 3000 2200 "9" "9" "square"]
+	Pad[-4400 23100 -2200 23100 1600 3000 2200 "10" "10" "square"]
+	Pad[24200 23100 26400 23100 1600 3000 2200 "11" "11" "square,edge2"]
+	Pad[24200 20500 26400 20500 1600 3000 2200 "12" "12" "square,edge2"]
+	Pad[24200 18000 26400 18000 1600 3000 2200 "13" "13" "square,edge2"]
+	Pad[24200 15400 26400 15400 1600 3000 2200 "14" "14" "square,edge2"]
+	Pad[24200 12800 26400 12800 1600 3000 2200 "15" "15" "square,edge2"]
+	Pad[24200 10300 26400 10300 1600 3000 2200 "16" "16" "square,edge2"]
+	Pad[24200 7700 26400 7700 1600 3000 2200 "17" "17" "square,edge2"]
+	Pad[24200 5200 26400 5200 1600 3000 2200 "18" "18" "square,edge2"]
+	Pad[24200 2600 26400 2600 1600 3000 2200 "19" "19" "square,edge2"]
+	Pad[24200 0 26400 0 1600 3000 2200 "20" "20" "square,edge2"]
+	ElementLine [-6200 -2200 8500 -2200 1000]
+	ElementLine [13500 -2200 28200 -2200 1000]
+	ElementLine [28200 -2200 28200 25300 1000]
+	ElementLine [28200 25300 -6200 25300 1000]
+	ElementLine [-6200 25300 -6200 -2200 1000]
+	ElementArc [11000 -2200 2500 2500 0 180 1000]
+
+	)
+

--- /dev/null
+++ b/schem/fp/TERM_3MM.fp
@@ -1,1 +1,7 @@
 
+Element["" "TERM_3MM" "" "TERM_3MM" 10342 16888 1000 1000 0 100 ""]
+(
+	Pin[0mm 0mm 5mm 5mm 5mm 3mm "" "1" ""]
+
+	)
+

--- /dev/null
+++ b/schem/fp/TP_1MM.fp
@@ -1,1 +1,5 @@
+Element[0x0 "TP_1MM" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[ 0 0  0 0 1mm 1mm 1mm "" "1" 0x0800]
+)
 

--- /dev/null
+++ b/schem/sym/ATSHA204A.sym
@@ -1,1 +1,97 @@
+v 20130925 2
+P 0 1300 400 1300 1 0 0
+{
+T 0 1300 5 10 0 0 180 0 1
+pintype=unknown
+T 455 1295 5 10 1 1 0 0 1
+pinlabel=NC
+T 305 1345 5 10 1 1 0 6 1
+pinnumber=1
+T 0 1300 5 10 0 0 180 0 1
+pinseq=0
+}
+P 0 1000 400 1000 1 0 0
+{
+T 0 1000 5 10 0 0 180 0 1
+pintype=unknown
+T 455 995 5 10 1 1 0 0 1
+pinlabel=NC
+T 305 1045 5 10 1 1 0 6 1
+pinnumber=2
+T 0 1000 5 10 0 0 180 0 1
+pinseq=0
+}
+P 0 700 400 700 1 0 0
+{
+T 0 700 5 10 0 0 180 0 1
+pintype=unknown
+T 455 695 5 10 1 1 0 0 1
+pinlabel=NC
+T 305 745 5 10 1 1 0 6 1
+pinnumber=3
+T 0 700 5 10 0 0 180 0 1
+pinseq=0
+}
+P 0 400 400 400 1 0 0
+{
+T 0 400 5 10 0 0 180 0 1
+pintype=unknown
+T 455 395 5 10 1 1 0 0 1
+pinlabel=GND
+T 305 445 5 10 1 1 0 6 1
+pinnumber=4
+T 0 400 5 10 0 0 180 0 1
+pinseq=0
+}
+P 1800 1300 1400 1300 1 0 0
+{
+T 1800 1300 5 10 0 0 0 0 1
+pintype=unknown
+T 1345 1295 5 10 1 1 0 6 1
+pinlabel=VCC
+T 1495 1345 5 10 1 1 0 0 1
+pinnumber=8
+T 1800 1300 5 10 0 0 0 0 1
+pinseq=0
+}
+P 1800 1000 1400 1000 1 0 0
+{
+T 1800 1000 5 10 0 0 0 0 1
+pintype=unknown
+T 1345 995 5 10 1 1 0 6 1
+pinlabel=NC
+T 1495 1045 5 10 1 1 0 0 1
+pinnumber=7
+T 1800 1000 5 10 0 0 0 0 1
+pinseq=0
+}
+P 1800 700 1400 700 1 0 0
+{
+T 1800 700 5 10 0 0 0 0 1
+pintype=unknown
+T 1345 695 5 10 1 1 0 6 1
+pinlabel=SCL
+T 1495 745 5 10 1 1 0 0 1
+pinnumber=6
+T 1800 700 5 10 0 0 0 0 1
+pinseq=0
+}
+P 1800 400 1400 400 1 0 0
+{
+T 1800 400 5 10 0 0 0 0 1
+pintype=unknown
+T 1345 395 5 10 1 1 0 6 1
+pinlabel=SDA
+T 1495 445 5 10 1 1 0 0 1
+pinnumber=5
+T 1800 400 5 10 0 0 0 0 1
+pinseq=0
+}
+B 400 200 1000 1300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1600 8 10 1 1 0 0 1
+refdes=U?
+T 400 0 8 10 1 1 0 0 1
+device=ATSHA204A
+T 1400 1600 8 10 1 1 0 6 1
+footprint=UDFN8
 

--- /dev/null
+++ b/schem/sym/AZ1117CR.sym
@@ -1,1 +1,51 @@
+v 20130925 2
+P 200 0 200 200 1 0 0
+{
+T 200 0 5 10 0 0 180 0 1
+pintype=unknown
+T 200 255 5 10 1 1 90 0 1
+pinlabel=GND
+T 150 105 5 10 1 1 90 6 1
+pinnumber=1
+T 200 0 5 10 0 0 180 0 1
+pinseq=0
+}
+P 500 0 500 200 1 0 0
+{
+T 500 0 5 10 0 0 180 0 1
+pintype=unknown
+T 500 255 5 10 1 1 90 0 1
+pinlabel=OUT
+T 450 105 5 10 1 1 90 6 1
+pinnumber=2
+T 500 0 5 10 0 0 180 0 1
+pinseq=0
+}
+P 800 0 800 200 1 0 0
+{
+T 800 0 5 10 0 0 180 0 1
+pintype=unknown
+T 800 255 5 10 1 1 90 0 1
+pinlabel=IN
+T 750 105 5 10 1 1 90 6 1
+pinnumber=3
+T 800 0 5 10 0 0 180 0 1
+pinseq=0
+}
+P 500 1000 500 800 1 0 0
+{
+T 500 1000 5 10 0 0 0 0 1
+pintype=unknown
+T 450 895 5 10 1 1 90 0 1
+pinnumber=4
+T 500 1000 5 10 0 0 0 0 1
+pinseq=0
+}
+B 0 200 1000 600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 0 900 8 10 1 1 0 0 1
+refdes=U?
+T 1100 600 8 10 1 1 0 0 1
+device=AZ1117CR
+T 1100 400 8 10 1 1 0 0 1
+footprint=SOT89
 

--- /dev/null
+++ b/schem/sym/CC3000.sym
@@ -1,1 +1,526 @@
+v 20130925 2
+P 0 9600 400 9600 1 0 0
+{
+T 0 9600 5 10 0 0 0 6 1
+pintype=unknown
+T 455 9595 5 10 1 1 0 0 1
+pinlabel=GND
+T 305 9645 5 10 1 1 0 6 1
+pinnumber=1
+T 0 9600 5 10 0 0 0 6 1
+pinseq=0
+}
+P 3000 8800 2600 8800 1 0 0
+{
+T 3000 8800 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 8795 5 10 1 1 0 6 1
+pinlabel=Res_1
+T 2695 8845 5 10 1 1 0 0 1
+pinnumber=2
+T 3000 8800 5 10 0 0 0 0 1
+pinseq=0
+}
+P 3000 9600 2600 9600 1 0 0
+{
+T 3000 9600 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 9595 5 10 1 1 0 6 1
+pinlabel=NC
+T 2695 9645 5 10 1 1 0 0 1
+pinnumber=3
+T 3000 9600 5 10 0 0 0 0 1
+pinseq=0
+}
+P 3000 8400 2600 8400 1 0 0
+{
+T 3000 8400 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 8395 5 10 1 1 0 6 1
+pinlabel=Res_2
+T 2695 8445 5 10 1 1 0 0 1
+pinnumber=4
+T 3000 8400 5 10 0 0 0 0 1
+pinseq=0
+}
+P 3000 7200 2600 7200 1 0 0
+{
+T 3000 7200 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 7195 5 10 1 1 0 6 1
+pinlabel=WL_EN2
+T 2695 7245 5 10 1 1 0 0 1
+pinnumber=5
+T 3000 7200 5 10 0 0 0 0 1
+pinseq=0
+}
+P 3000 6800 2600 6800 1 0 0
+{
+T 3000 6800 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 6795 5 10 1 1 0 6 1
+pinlabel=WL_RS232_TX
+T 2695 6845 5 10 1 1 0 0 1
+pinnumber=6
+T 3000 6800 5 10 0 0 0 0 1
+pinseq=0
+}
+P 3000 7600 2600 7600 1 0 0
+{
+T 3000 7600 5 10 0 0 0 0 1
+pintype=unknown
+T 2545 7595 5 10 1 1 0 6 1
+pinlabel=WL_EN1
+T 2695 7645 5 10 1 1 0 0 1
+pinnumber=7
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+}
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+}
+P 0 9200 400 9200 1 0 0
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+}
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+}
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+}
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+}
+P 3000 4000 2600 4000 1 0 0
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+}
+P 3000 3600 2600 3600 1 0 0
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+}
+P 3000 3200 2600 3200 1 0 0
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+}
+P 0 8000 400 8000 1 0 0
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+}
+P 3000 2800 2600 2800 1 0 0
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+}
+P 0 7600 400 7600 1 0 0
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+}
+P 3000 2400 2600 2400 1 0 0
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+}
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+}
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+}
+P 3000 9200 2600 9200 1 0 0
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+}
+P 0 6400 400 6400 1 0 0
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+}
+P 3000 2000 2600 2000 1 0 0
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+}
+P 3000 8000 2600 8000 1 0 0
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+}
+P 0 6000 400 6000 1 0 0
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+}
+P 3000 1600 2600 1600 1 0 0
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+}
+P 3000 6000 2600 6000 1 0 0
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+}
+P 3000 5600 2600 5600 1 0 0
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+}
+P 3000 5200 2600 5200 1 0 0
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+}
+P 3000 4800 2600 4800 1 0 0
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+}
+P 0 5600 400 5600 1 0 0
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+}
+P 0 5200 400 5200 1 0 0
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+}
+P 0 4800 400 4800 1 0 0
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+}
+P 0 4400 400 4400 1 0 0
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+}
+P 3000 1200 2600 1200 1 0 0
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+}
+P 0 4000 400 4000 1 0 0
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+}
+P 0 3600 400 3600 1 0 0
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+}
+P 0 3200 400 3200 1 0 0
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+}
+P 0 2800 400 2800 1 0 0
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+}
+P 0 2400 400 2400 1 0 0
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+}
+P 0 2000 400 2000 1 0 0
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+}
+P 0 1600 400 1600 1 0 0
+{
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+pinlabel=GND
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+}
+P 0 1200 400 1200 1 0 0
+{
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+pinnumber=43
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+}
+P 0 800 400 800 1 0 0
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+pintype=unknown
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+pinlabel=GND
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+pinnumber=44
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+pinseq=0
+}
+P 0 400 400 400 1 0 0
+{
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+pintype=unknown
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+pinlabel=GND
+T 305 445 5 10 1 1 0 6 1
+pinnumber=45
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+pinseq=0
+}
+P 3000 800 2600 800 1 0 0
+{
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+pintype=unknown
+T 2545 795 5 10 1 1 0 6 1
+pinlabel=GND
+T 2695 845 5 10 1 1 0 0 1
+pinnumber=46
+T 3000 800 5 10 0 0 0 0 1
+pinseq=0
+}
+B 400 200 2200 9600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 9900 8 10 1 1 0 0 1
+refdes=U?
+T 2600 9900 8 10 1 1 0 6 1
+device=CC3000
+T 400 100 8 10 1 1 0 2 1
+footprint=CC3000
 

--- /dev/null
+++ b/schem/sym/ESP_12E.sym
@@ -1,1 +1,251 @@
+v 20130925 2
+P 0 4000 400 4000 1 0 0
+{
+T 0 4000 5 10 0 0 0 0 1
+pintype=unknown
+T 455 3995 5 10 1 1 0 0 1
+pinlabel=REST
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+pinnumber=1
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+}
+P 0 3600 400 3600 1 0 0
+{
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+}
+P 0 3200 400 3200 1 0 0
+{
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+pinnumber=3
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+}
+P 0 2800 400 2800 1 0 0
+{
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+pinlabel=GPIO16
+T 305 2845 5 10 1 1 0 6 1
+pinnumber=4
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+pinseq=0
+}
+P 0 2400 400 2400 1 0 0
+{
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+T 455 2395 5 10 1 1 0 0 1
+pinlabel=GPIO14
+T 305 2445 5 10 1 1 0 6 1
+pinnumber=5
+}
+P 0 2000 400 2000 1 0 0
+{
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+T 455 1995 5 10 1 1 0 0 1
+pinlabel=GPIO12
+T 305 2045 5 10 1 1 0 6 1
+pinnumber=6
+}
+P 0 1600 400 1600 1 0 0
+{
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+pinlabel=GPIO13
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+pinnumber=7
+}
+P 0 1200 400 1200 1 0 0
+{
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+pinnumber=8
+}
+P 1200 0 1200 400 1 0 0
+{
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+pinnumber=9
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+}
+P 1600 0 1600 400 1 0 0
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+}
+P 2000 0 2000 400 1 0 0
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+}
+P 2400 0 2400 400 1 0 0
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+}
+P 2800 0 2800 400 1 0 0
+{
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+pinseq=0
+}
+P 3200 0 3200 400 1 0 0
+{
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+pintype=unknown
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+pinlabel=SD_2
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+pinnumber=14
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+pinseq=0
+}
+P 4400 4000 4000 4000 1 0 0
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+pinnumber=22
+}
+P 4400 3600 4000 3600 1 0 0
+{
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+pintype=unknown
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+pinseq=0
+T 3945 3595 5 10 1 1 0 6 1
+pinlabel=RXD
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+pinnumber=21
+}
+P 4400 3200 4000 3200 1 0 0
+{
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+pintype=unknown
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+pinseq=0
+T 3945 3195 5 10 1 1 0 6 1
+pinlabel=GPIO5
+T 4095 3245 5 10 1 1 0 0 1
+pinnumber=20
+}
+P 4400 2800 4000 2800 1 0 0
+{
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+pintype=unknown
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+pinseq=0
+T 3945 2795 5 10 1 1 0 6 1
+pinlabel=GPIO4
+T 4095 2845 5 10 1 1 0 0 1
+pinnumber=19
+}
+P 4400 2400 4000 2400 1 0 0
+{
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+pintype=unknown
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+pinseq=0
+T 3945 2395 5 10 1 1 0 6 1
+pinlabel=GPIO0
+T 4095 2445 5 10 1 1 0 0 1
+pinnumber=18
+}
+P 4400 2000 4000 2000 1 0 0
+{
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+pintype=unknown
+T 4400 2000 5 10 0 0 0 6 1
+pinseq=0
+T 3945 1995 5 10 1 1 0 6 1
+pinlabel=GPIO2
+T 4095 2045 5 10 1 1 0 0 1
+pinnumber=17
+}
+P 4400 1600 4000 1600 1 0 0
+{
+T 4400 1600 5 10 0 0 0 6 1
+pintype=unknown
+T 4400 1600 5 10 0 0 0 6 1
+pinseq=0
+T 3945 1595 5 10 1 1 0 6 1
+pinlabel=GPIO15
+T 4095 1645 5 10 1 1 0 0 1
+pinnumber=16
+}
+P 4400 1200 4000 1200 1 0 0
+{
+T 4400 1200 5 10 0 0 0 6 1
+pintype=unknown
+T 4400 1200 5 10 0 0 0 6 1
+pinseq=0
+T 3945 1195 5 10 1 1 0 6 1
+pinlabel=GND
+T 4095 1245 5 10 1 1 0 0 1
+pinnumber=15
+}
+B 400 400 3600 4000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 4500 8 10 1 1 0 0 1
+refdes=U?
+T 1800 2400 8 10 1 1 0 0 1
+device=ESP-12E
+T 4000 4500 8 10 1 1 0 6 1
+footprint=ESP_12E
 

--- /dev/null
+++ b/schem/sym/HCPL-354.sym
@@ -1,1 +1,96 @@
+v 20130925 2
+T 1600 1200 5 10 0 0 0 0 1
+device=DIODE
+T 1800 600 5 10 0 0 0 0 1
+device=DIODE
+L 850 600 750 600 3 0 0 0 -1 -1
+L 800 700 800 900 3 0 0 0 -1 -1
+L 800 600 800 400 3 0 0 0 -1 -1
+H 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1 5
+M 750,700
+L 801,600
+L 850,700
+L 800,700
+z
+T 1100 700 5 10 0 0 0 0 1
+device=NPN_TRANSISTOR
+L 600 700 700 700 3 0 0 0 -1 -1
+L 650 600 650 400 3 0 0 0 -1 -1
+L 650 700 650 900 3 0 0 0 -1 -1
+H 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1 5
+M 700,600
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+z
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+L 1050 600 1200 450 3 0 0 0 -1 -1
+H 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1 5
+M 1110,490
+L 1201,450
+L 1155,545
+L 1135,515
+z
+T 1925 650 5 10 0 0 0 0 1
+device=NPN_TRANSISTOR
+L 1200 850 1050 700 3 0 0 0 -1 -1
+L 1200 900 1200 850 3 0 0 0 -1 -1
+L 1200 450 1200 400 3 0 0 0 -1 -1
+B 400 200 1000 900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 1200 900 1400 900 3 0 0 0 -1 -1
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+L 800 400 400 400 3 0 0 0 -1 -1
+L 800 900 400 900 3 0 0 0 -1 -1
+V 650 900 25 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1
+V 650 400 25 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1
+P 0 900 400 900 1 0 0
+{
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+pintype=unknown
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+pinlabel=AK1
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+pinnumber=1
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+pinseq=0
+}
+P 0 400 400 400 1 0 0
+{
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+pintype=unknown
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+pinlabel=AK2
+T 105 445 5 10 1 1 0 6 1
+pinnumber=2
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+pinseq=0
+}
+P 1800 400 1400 400 1 0 0
+{
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+pintype=unknown
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+pinlabel=E
+T 1495 445 5 10 1 1 0 0 1
+pinnumber=3
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+pinseq=0
+}
+P 1800 900 1400 900 1 0 0
+{
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+pintype=unknown
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+pinlabel=C
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+pinnumber=4
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+pinseq=0
+}
+T 1600 1200 8 10 1 1 0 6 1
+device=HCPL-354
+T 400 1200 8 10 1 1 0 0 1
+refdes=U?
+T 400 0 8 10 1 1 0 0 1
+footprint=4_MINIFLAT_1
 

--- /dev/null
+++ b/schem/sym/PIC16LF1554_IML.sym
@@ -1,1 +1,185 @@
+v 20130925 2
+P 0 2200 400 2200 1 0 0
+{
+T 0 2200 5 10 0 0 180 0 1
+pintype=unknown
+T 455 2195 5 10 1 1 0 0 1
+pinlabel=RA5
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+pinnumber=1
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+pinseq=0
+}
+P 0 1800 400 1800 1 0 0
+{
+T 0 1800 5 10 0 0 180 0 1
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--- /dev/null
+++ b/schem/sym/antenna.sym
@@ -1,1 +1,17 @@
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