Inital commit of BLE AC Controller repo. Prototype PCB designed.
Inital commit of BLE AC Controller repo. Prototype PCB designed.

--- /dev/null
+++ b/schem/BLE_AC_Controller.net
@@ -1,1 +1,29 @@
+unnamed_net27	R8-2 Q2-1 
+unnamed_net26	Q2-3 U5-2 
+unnamed_net25	R9-1 U5-4 
+unnamed_net24	U5-3 D1-3 
+unnamed_net23	ACOUT-1 D1-2 
+unnamed_net22	C5-2 PROG-4 U5-1 U6-8 U3-2 U4-13 
+unnamed_net21	PROG-3 U4-14 
+unnamed_net20	PROG-2 U4-16 
+unnamed_net19	PROG-1 U4-17 
+unnamed_net18	U6-5 U4-7 
+unnamed_net17	U6-6 U4-6 
+unnamed_net16	U6-7 U4-5 
+unnamed_net15	SWITCH-1 U4-4 
+unnamed_net14	R8-1 U4-3 
+unnamed_net13	Q1-1 U2-8 
+unnamed_net12	U2-5 R6-2 R5-1 
+unnamed_net11	U2-2 R7-2 
+unnamed_net10	U2-1 R4-1 
+unnamed_net9	R3-1 R4-2 
+unnamed_net8	R2-2 R1-1 
+unnamed_net7	U2-7 C1-1 
+unnamed_net6	U3-3 Q1-3 R5-2 C3-1 U2-6 C1-2 C2-2 
+unnamed_net5	U2-4 C4-2 
+unnamed_net4	R9-2 D1-1 F1-1 ACIN-1 
+unnamed_net3	Q1-4 R3-2 R1-2 U1-3 
+GND	C5-1 U6-3 U6-2 U6-4 U6-1 SWITCH-2 PROG-5 U3-1 Q2-2 U4-9 U4-10 U4-12 U4-18 U4-19 U4-8 U4-2 U4-1 R6-1 R7-1 R2-1 C3-2 C2-1 C4-1 U1-4 
+unnamed_net2	ACOUT-2 V1-1 ACIN-2 U1-2 
+unnamed_net1	V1-2 F1-2 U1-1 
 

--- /dev/null
+++ b/schem/BLE_AC_Controller.pcb
@@ -1,1 +1,1595 @@
-
+# release: pcb 20110918
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["" 133000 162000]
+
+Grid[500.0 0 0 0]
+Cursor[0 6500 0.000000]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[1000 1000 1000 800 1500 1000]
+Flags("nameonpcb,uniquename,clearnew,snappin")
+Groups("1,c:2:3:4:5:6,s:7:8")
+Styles["Signal,1000,4000,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
+
+Symbol[' ' 1800]
+(
+)
+Symbol['!' 1200]
+(
+	SymbolLine[0 4500 0 5000 800]
+	SymbolLine[0 1000 0 3500 800]
+)
+Symbol['"' 1200]
+(
+	SymbolLine[0 1000 0 2000 800]
+	SymbolLine[1000 1000 1000 2000 800]
+)
+Symbol['#' 1200]
+(
+	SymbolLine[0 3500 2000 3500 800]
+	SymbolLine[0 2500 2000 2500 800]
+	SymbolLine[1500 2000 1500 4000 800]
+	SymbolLine[500 2000 500 4000 800]
+)
+Symbol['$' 1200]
+(
+	SymbolLine[1500 1500 2000 2000 800]
+	SymbolLine[500 1500 1500 1500 800]
+	SymbolLine[0 2000 500 1500 800]
+	SymbolLine[0 2000 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 4000 800]
+	SymbolLine[1500 4500 2000 4000 800]
+	SymbolLine[500 4500 1500 4500 800]
+	SymbolLine[0 4000 500 4500 800]
+	SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['%' 1200]
+(
+	SymbolLine[0 1500 0 2000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1000 1000 800]
+	SymbolLine[1000 1000 1500 1500 800]
+	SymbolLine[1500 1500 1500 2000 800]
+	SymbolLine[1000 2500 1500 2000 800]
+	SymbolLine[500 2500 1000 2500 800]
+	SymbolLine[0 2000 500 2500 800]
+	SymbolLine[0 5000 4000 1000 800]
+	SymbolLine[3500 5000 4000 4500 800]
+	SymbolLine[4000 4000 4000 4500 800]
+	SymbolLine[3500 3500 4000 4000 800]
+	SymbolLine[3000 3500 3500 3500 800]
+	SymbolLine[2500 4000 3000 3500 800]
+	SymbolLine[2500 4000 2500 4500 800]
+	SymbolLine[2500 4500 3000 5000 800]
+	SymbolLine[3000 5000 3500 5000 800]
+)
+Symbol['&' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 3500 1500 2000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[1000 5000 2000 4000 800]
+	SymbolLine[0 2500 2500 5000 800]
+	SymbolLine[500 1000 1000 1000 800]
+	SymbolLine[1000 1000 1500 1500 800]
+	SymbolLine[1500 1500 1500 2000 800]
+	SymbolLine[0 3500 0 4500 800]
+)
+Symbol[''' 1200]
+(
+	SymbolLine[0 2000 1000 1000 800]
+)
+Symbol['(' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
+)
+Symbol[')' 1200]
+(
+	SymbolLine[0 1000 500 1500 800]
+	SymbolLine[500 1500 500 4500 800]
+	SymbolLine[0 5000 500 4500 800]
+)
+Symbol['*' 1200]
+(
+	SymbolLine[0 2000 2000 4000 800]
+	SymbolLine[0 4000 2000 2000 800]
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol['+' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol[',' 1200]
+(
+	SymbolLine[0 6000 1000 5000 800]
+)
+Symbol['-' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+)
+Symbol['.' 1200]
+(
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['/' 1200]
+(
+	SymbolLine[0 4500 3000 1500 800]
+)
+Symbol['0' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4000 2000 2000 800]
+)
+Symbol['1' 1200]
+(
+	SymbolLine[0 1800 800 1000 800]
+	SymbolLine[800 1000 800 5000 800]
+	SymbolLine[0 5000 1500 5000 800]
+)
+Symbol['2' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[0 5000 2500 2500 800]
+	SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['3' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 2800 1500 2800 800]
+	SymbolLine[2000 1500 2000 2300 800]
+	SymbolLine[2000 3300 2000 4500 800]
+	SymbolLine[2000 3300 1500 2800 800]
+	SymbolLine[2000 2300 1500 2800 800]
+)
+Symbol['4' 1200]
+(
+	SymbolLine[0 3500 2000 1000 800]
+	SymbolLine[0 3500 2500 3500 800]
+	SymbolLine[2000 1000 2000 5000 800]
+)
+Symbol['5' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[0 1000 0 3000 800]
+	SymbolLine[0 3000 500 2500 800]
+	SymbolLine[500 2500 1500 2500 800]
+	SymbolLine[1500 2500 2000 3000 800]
+	SymbolLine[2000 3000 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['6' 1200]
+(
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[1500 2800 2000 3300 800]
+	SymbolLine[0 2800 1500 2800 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3300 2000 4500 800]
+)
+Symbol['7' 1200]
+(
+	SymbolLine[500 5000 2500 1000 800]
+	SymbolLine[0 1000 2500 1000 800]
+)
+Symbol['8' 1200]
+(
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3700 0 4500 800]
+	SymbolLine[0 3700 700 3000 800]
+	SymbolLine[700 3000 1300 3000 800]
+	SymbolLine[1300 3000 2000 3700 800]
+	SymbolLine[2000 3700 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 2300 700 3000 800]
+	SymbolLine[0 1500 0 2300 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 2300 800]
+	SymbolLine[1300 3000 2000 2300 800]
+)
+Symbol['9' 1200]
+(
+	SymbolLine[500 5000 2000 3000 800]
+	SymbolLine[2000 1500 2000 3000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+)
+Symbol[':' 1200]
+(
+	SymbolLine[0 2500 500 2500 800]
+	SymbolLine[0 3500 500 3500 800]
+)
+Symbol[';' 1200]
+(
+	SymbolLine[0 5000 1000 4000 800]
+	SymbolLine[1000 2500 1000 3000 800]
+)
+Symbol['<' 1200]
+(
+	SymbolLine[0 3000 1000 2000 800]
+	SymbolLine[0 3000 1000 4000 800]
+)
+Symbol['=' 1200]
+(
+	SymbolLine[0 2500 2000 2500 800]
+	SymbolLine[0 3500 2000 3500 800]
+)
+Symbol['>' 1200]
+(
+	SymbolLine[0 2000 1000 3000 800]
+	SymbolLine[0 4000 1000 3000 800]
+)
+Symbol['?' 1200]
+(
+	SymbolLine[1000 3000 1000 3500 800]
+	SymbolLine[1000 4500 1000 5000 800]
+	SymbolLine[0 1500 0 2000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 2000 800]
+	SymbolLine[1000 3000 2000 2000 800]
+)
+Symbol['@' 1200]
+(
+	SymbolLine[0 1000 0 4000 800]
+	SymbolLine[0 4000 1000 5000 800]
+	SymbolLine[1000 5000 4000 5000 800]
+	SymbolLine[5000 3500 5000 1000 800]
+	SymbolLine[5000 1000 4000 0 800]
+	SymbolLine[4000 0 1000 0 800]
+	SymbolLine[1000 0 0 1000 800]
+	SymbolLine[1500 2000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 3000 3500 800]
+	SymbolLine[3000 3500 3500 3000 800]
+	SymbolLine[3500 3000 4000 3500 800]
+	SymbolLine[3500 3000 3500 1500 800]
+	SymbolLine[3500 2000 3000 1500 800]
+	SymbolLine[2000 1500 3000 1500 800]
+	SymbolLine[2000 1500 1500 2000 800]
+	SymbolLine[4000 3500 5000 3500 800]
+)
+Symbol['A' 1200]
+(
+	SymbolLine[0 2000 0 5000 800]
+	SymbolLine[0 2000 700 1000 800]
+	SymbolLine[700 1000 1800 1000 800]
+	SymbolLine[1800 1000 2500 2000 800]
+	SymbolLine[2500 2000 2500 5000 800]
+	SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['B' 1200]
+(
+	SymbolLine[0 5000 2000 5000 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2500 3300 2500 4500 800]
+	SymbolLine[2000 2800 2500 3300 800]
+	SymbolLine[500 2800 2000 2800 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2300 800]
+	SymbolLine[2000 2800 2500 2300 800]
+)
+Symbol['C' 1200]
+(
+	SymbolLine[700 5000 2000 5000 800]
+	SymbolLine[0 4300 700 5000 800]
+	SymbolLine[0 1700 0 4300 800]
+	SymbolLine[0 1700 700 1000 800]
+	SymbolLine[700 1000 2000 1000 800]
+)
+Symbol['D' 1200]
+(
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[1800 1000 2500 1700 800]
+	SymbolLine[2500 1700 2500 4300 800]
+	SymbolLine[1800 5000 2500 4300 800]
+	SymbolLine[0 5000 1800 5000 800]
+	SymbolLine[0 1000 1800 1000 800]
+)
+Symbol['E' 1200]
+(
+	SymbolLine[0 2800 1500 2800 800]
+	SymbolLine[0 5000 2000 5000 800]
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+)
+Symbol['F' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[0 2800 1500 2800 800]
+)
+Symbol['G' 1200]
+(
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[1000 3000 2000 3000 800]
+)
+Symbol['H' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[2500 1000 2500 5000 800]
+	SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['I' 1200]
+(
+	SymbolLine[0 1000 1000 1000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 5000 1000 5000 800]
+)
+Symbol['J' 1200]
+(
+	SymbolLine[700 1000 1500 1000 800]
+	SymbolLine[1500 1000 1500 4500 800]
+	SymbolLine[1000 5000 1500 4500 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 4500 0 4000 800]
+)
+Symbol['K' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3000 2000 1000 800]
+	SymbolLine[0 3000 2000 5000 800]
+)
+Symbol['L' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['M' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 1500 3000 800]
+	SymbolLine[1500 3000 3000 1000 800]
+	SymbolLine[3000 1000 3000 5000 800]
+)
+Symbol['N' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 1000 2500 5000 800]
+	SymbolLine[2500 1000 2500 5000 800]
+)
+Symbol['O' 1200]
+(
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['P' 1200]
+(
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[2000 3000 2500 2500 800]
+	SymbolLine[500 3000 2000 3000 800]
+)
+Symbol['Q' 1200]
+(
+	SymbolLine[0 1500 0 4500 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1500 1000 800]
+	SymbolLine[1500 1000 2000 1500 800]
+	SymbolLine[2000 1500 2000 4000 800]
+	SymbolLine[1000 5000 2000 4000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[1000 3500 2000 5000 800]
+)
+Symbol['R' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[2500 1500 2500 2500 800]
+	SymbolLine[2000 3000 2500 2500 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[1300 3000 2500 5000 800]
+)
+Symbol['S' 1200]
+(
+	SymbolLine[2000 1000 2500 1500 800]
+	SymbolLine[500 1000 2000 1000 800]
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[0 1500 0 2500 800]
+	SymbolLine[0 2500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['T' 1200]
+(
+	SymbolLine[0 1000 2000 1000 800]
+	SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['U' 1200]
+(
+	SymbolLine[0 1000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 1000 2000 4500 800]
+)
+Symbol['V' 1200]
+(
+	SymbolLine[0 1000 1000 5000 800]
+	SymbolLine[1000 5000 2000 1000 800]
+)
+Symbol['W' 1200]
+(
+	SymbolLine[0 1000 0 3000 800]
+	SymbolLine[0 3000 500 5000 800]
+	SymbolLine[500 5000 1500 3000 800]
+	SymbolLine[1500 3000 2500 5000 800]
+	SymbolLine[2500 5000 3000 3000 800]
+	SymbolLine[3000 3000 3000 1000 800]
+)
+Symbol['X' 1200]
+(
+	SymbolLine[0 5000 2500 1000 800]
+	SymbolLine[0 1000 2500 5000 800]
+)
+Symbol['Y' 1200]
+(
+	SymbolLine[0 1000 1000 3000 800]
+	SymbolLine[1000 3000 2000 1000 800]
+	SymbolLine[1000 3000 1000 5000 800]
+)
+Symbol['Z' 1200]
+(
+	SymbolLine[0 1000 2500 1000 800]
+	SymbolLine[0 5000 2500 1000 800]
+	SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['[' 1200]
+(
+	SymbolLine[0 1000 500 1000 800]
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['\' 1200]
+(
+	SymbolLine[0 1500 3000 4500 800]
+)
+Symbol[']' 1200]
+(
+	SymbolLine[0 1000 500 1000 800]
+	SymbolLine[500 1000 500 5000 800]
+	SymbolLine[0 5000 500 5000 800]
+)
+Symbol['^' 1200]
+(
+	SymbolLine[0 1500 500 1000 800]
+	SymbolLine[500 1000 1000 1500 800]
+)
+Symbol['_' 1200]
+(
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['a' 1200]
+(
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[2000 3000 2000 4500 800]
+	SymbolLine[2000 4500 2500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['b' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3500 2000 4500 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+)
+Symbol['c' 1200]
+(
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 2000 5000 800]
+)
+Symbol['d' 1200]
+(
+	SymbolLine[2000 1000 2000 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+)
+Symbol['e' 1200]
+(
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[0 4000 2000 4000 800]
+	SymbolLine[2000 4000 2000 3500 800]
+)
+Symbol['f' 1000]
+(
+	SymbolLine[500 1500 500 5000 800]
+	SymbolLine[500 1500 1000 1000 800]
+	SymbolLine[1000 1000 1500 1000 800]
+	SymbolLine[0 3000 1000 3000 800]
+)
+Symbol['g' 1200]
+(
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[0 6000 500 6500 800]
+	SymbolLine[500 6500 1500 6500 800]
+	SymbolLine[1500 6500 2000 6000 800]
+	SymbolLine[2000 3000 2000 6000 800]
+)
+Symbol['h' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+)
+Symbol['i' 1000]
+(
+	SymbolLine[0 2000 0 2100 1000]
+	SymbolLine[0 3500 0 5000 800]
+)
+Symbol['j' 1000]
+(
+	SymbolLine[500 2000 500 2100 1000]
+	SymbolLine[500 3500 500 6000 800]
+	SymbolLine[0 6500 500 6000 800]
+)
+Symbol['k' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+	SymbolLine[0 3500 1500 5000 800]
+	SymbolLine[0 3500 1000 2500 800]
+)
+Symbol['l' 1000]
+(
+	SymbolLine[0 1000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['m' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+	SymbolLine[2000 3500 2500 3000 800]
+	SymbolLine[2500 3000 3000 3000 800]
+	SymbolLine[3000 3000 3500 3500 800]
+	SymbolLine[3500 3500 3500 5000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['n' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 5000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['o' 1200]
+(
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[2000 3500 2000 4500 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['p' 1200]
+(
+	SymbolLine[500 3500 500 6500 800]
+	SymbolLine[0 3000 500 3500 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[2500 3500 2500 4500 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[1000 5000 2000 5000 800]
+	SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['q' 1200]
+(
+	SymbolLine[2000 3500 2000 6500 800]
+	SymbolLine[1500 3000 2000 3500 800]
+	SymbolLine[500 3000 1500 3000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[0 3500 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['r' 1200]
+(
+	SymbolLine[500 3500 500 5000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[1000 3000 2000 3000 800]
+	SymbolLine[0 3000 500 3500 800]
+)
+Symbol['s' 1200]
+(
+	SymbolLine[500 5000 2000 5000 800]
+	SymbolLine[2000 5000 2500 4500 800]
+	SymbolLine[2000 4000 2500 4500 800]
+	SymbolLine[500 4000 2000 4000 800]
+	SymbolLine[0 3500 500 4000 800]
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 2000 3000 800]
+	SymbolLine[2000 3000 2500 3500 800]
+	SymbolLine[0 4500 500 5000 800]
+)
+Symbol['t' 1000]
+(
+	SymbolLine[500 1000 500 4500 800]
+	SymbolLine[500 4500 1000 5000 800]
+	SymbolLine[0 2500 1000 2500 800]
+)
+Symbol['u' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+	SymbolLine[2000 3000 2000 4500 800]
+)
+Symbol['v' 1200]
+(
+	SymbolLine[0 3000 1000 5000 800]
+	SymbolLine[2000 3000 1000 5000 800]
+)
+Symbol['w' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[500 5000 1000 5000 800]
+	SymbolLine[1000 5000 1500 4500 800]
+	SymbolLine[1500 3000 1500 4500 800]
+	SymbolLine[1500 4500 2000 5000 800]
+	SymbolLine[2000 5000 2500 5000 800]
+	SymbolLine[2500 5000 3000 4500 800]
+	SymbolLine[3000 3000 3000 4500 800]
+)
+Symbol['x' 1200]
+(
+	SymbolLine[0 3000 2000 5000 800]
+	SymbolLine[0 5000 2000 3000 800]
+)
+Symbol['y' 1200]
+(
+	SymbolLine[0 3000 0 4500 800]
+	SymbolLine[0 4500 500 5000 800]
+	SymbolLine[2000 3000 2000 6000 800]
+	SymbolLine[1500 6500 2000 6000 800]
+	SymbolLine[500 6500 1500 6500 800]
+	SymbolLine[0 6000 500 6500 800]
+	SymbolLine[500 5000 1500 5000 800]
+	SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['z' 1200]
+(
+	SymbolLine[0 3000 2000 3000 800]
+	SymbolLine[0 5000 2000 3000 800]
+	SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['{' 1200]
+(
+	SymbolLine[500 1500 1000 1000 800]
+	SymbolLine[500 1500 500 2500 800]
+	SymbolLine[0 3000 500 2500 800]
+	SymbolLine[0 3000 500 3500 800]
+	SymbolLine[500 3500 500 4500 800]
+	SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['|' 1200]
+(
+	SymbolLine[0 1000 0 5000 800]
+)
+Symbol['}' 1200]
+(
+	SymbolLine[0 1000 500 1500 800]
+	SymbolLine[500 1500 500 2500 800]
+	SymbolLine[500 2500 1000 3000 800]
+	SymbolLine[500 3500 1000 3000 800]
+	SymbolLine[500 3500 500 4500 800]
+	SymbolLine[0 5000 500 4500 800]
+)
+Symbol['~' 1200]
+(
+	SymbolLine[0 3500 500 3000 800]
+	SymbolLine[500 3000 1000 3000 800]
+	SymbolLine[1000 3000 1500 3500 800]
+	SymbolLine[1500 3500 2000 3500 800]
+	SymbolLine[2000 3500 2500 3000 800]
+)
+Attribute("PCB::grid::unit" "mm")
+Via[79000 55500 6000 2000 0 3500 "" ""]
+Via[47000 45500 6000 2000 0 3500 "" ""]
+Via[91000 73500 6000 2000 0 3500 "" ""]
+Via[82500 38000 6000 2000 0 3500 "" ""]
+Via[9500 127500 4000 2000 0 2000 "" ""]
+Via[11000 117500 4000 2000 0 2000 "" ""]
+Via[10000 132500 4000 2000 0 2000 "" ""]
+Via[10000 138000 4000 2000 0 2000 "" ""]
+Via[9500 143500 4000 2000 0 2000 "" ""]
+Via[62500 137500 4000 2000 0 2000 "" ""]
+Via[72000 101000 4000 2000 0 2000 "" ""]
+Via[125500 91500 4000 2000 0 2000 "" ""]
+Via[125000 102500 4000 2000 0 2000 "" ""]
+Via[112500 94500 6000 2000 0 3500 "" ""]
+Via[11000 107500 4000 2000 0 2000 "" ""]
+Via[103500 148500 4000 2000 0 2000 "" ""]
+Via[59000 131000 4000 2000 0 2000 "" ""]
+
+Element["" "TERM_2_5MM" "SWITCH" "unknown" 20000 77500 -14000 13500 0 100 ""]
+(
+	Pin[0 0 12000 3000 12000 5700 "" "1" "square"]
+	Pin[0 -19685 12000 3000 12000 5700 "" "2" ""]
+	ElementLine [-16388 -29527 16388 -29527 1000]
+	ElementLine [-16388 9842 16388 9842 1000]
+	ElementLine [16388 -29527 16388 9842 1000]
+	ElementLine [-16388 -29527 -16388 9842 1000]
+
+	)
+
+Element["onsolder" "SOT23" "U3" "unknown" 54000 95000 -2500 9500 0 100 "auto"]
+(
+	Pad[-300 0 300 0 3400 3000 4000 "1" "1" "onsolder,square"]
+	Pad[-300 -7800 300 -7800 3400 3000 4000 "2" "2" "onsolder,square"]
+	Pad[7900 -3900 8500 -3900 3400 3000 4000 "3" "3" "onsolder,square,edge2"]
+	ElementLine [-2900 2500 11000 2500 1000]
+	ElementLine [-2900 -10300 -2900 2500 1000]
+	ElementLine [-2900 -10300 11000 -10300 1000]
+	ElementLine [11000 -10300 11000 2500 1000]
+
+	)
+
+Element["onsolder" "SOT23" "Q2" "unknown" 35500 93000 -1500 9500 0 100 "auto"]
+(
+	Pad[-300 0 300 0 3400 3000 4000 "1" "1" "onsolder,square"]
+	Pad[-300 -7800 300 -7800 3400 3000 4000 "2" "2" "onsolder,square"]
+	Pad[7900 -3900 8500 -3900 3400 3000 4000 "3" "3" "onsolder,square,edge2"]
+	ElementLine [-2900 2500 11000 2500 1000]
+	ElementLine [-2900 -10300 -2900 2500 1000]
+	ElementLine [-2900 -10300 11000 -10300 1000]
+	ElementLine [11000 -10300 11000 2500 1000]
+
+	)
+
+Element["onsolder" "0805" "R9" "unknown" 67500 55000 -5193 9650 0 100 "auto"]
+(
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[3543 -393 3543 393 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-393 2755 393 2755 800]
+	ElementLine [-393 -2755 393 -2755 800]
+
+	)
+
+Element["onsolder" "MFP4" "U5" "unknown" 50000 65000 -14500 -10000 0 100 "auto"]
+(
+	Pad[5000 12400 5000 13200 3200 3200 3200 "" "1" "onsolder,square,edge2"]
+	Pad[-5000 12400 -5000 13200 3200 3200 3200 "" "2" "onsolder,square,edge2"]
+	Pad[-5000 -13200 -5000 -12400 3200 3200 3200 "" "3" "onsolder,square"]
+	Pad[5000 -13200 5000 -12400 3200 3200 3200 "" "4" "onsolder,square"]
+
+	)
+
+Element["" "D2PAK" "D1" "unknown" 65197 59981 -21178 37216 0 100 ""]
+(
+	Attribute("author" "DJ Delorie")
+	Attribute("copyright" "2006 DJ Delorie")
+	Attribute("use-license" "Unlimited")
+	Attribute("dist-license" "GPL")
+	Pad[-2953 17519 2559 17519 35039 2000 37039 "" "1" "square,edge2"]
+	Pad[9842 -28937 9842 -19489 5118 2000 7118 "" "2" "square"]
+	Pad[-197 -28937 -197 -19489 5118 2000 7118 "" "1" "square"]
+	Pad[-10237 -28937 -10237 -19489 5118 2000 7118 "" "3" "square"]
+	ElementLine [-22048 -33071 -22048 36614 1000]
+	ElementLine [-22048 36614 21653 36614 1000]
+	ElementLine [21653 -33071 21653 36614 1000]
+	ElementLine [-22048 -33071 21653 -33071 1000]
+
+	)
+
+Element["" "FCAPEL" "C3" "470uF" 112500 70000 -15500 -23000 0 100 ""]
+(
+	Pad[0 8000 0 18000 4200 2000 4200 "" "1" "square,edge2"]
+	Pad[0 -18000 0 -8000 4200 2000 4200 "" "2" "square"]
+	ElementLine [3500 -16338 16338 -16338 1000]
+	ElementLine [-16338 -16338 -3500 -16338 1000]
+	ElementLine [3500 16338 8000 16338 1000]
+	ElementLine [-8000 16338 -3500 16338 1000]
+	ElementLine [8000 16338 16338 8000 1000]
+	ElementLine [-8000 16338 -16338 8000 1000]
+	ElementLine [16338 -16338 16338 8000 1000]
+	ElementLine [-16338 -16338 -16338 8000 1000]
+
+	)
+
+Element["" "0805" "C5" "100nF" 89000 146586 3914 -3586 0 100 ""]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["" "ACY200" "V1" "unknown" 42500 17500 17874 -9986 0 100 ""]
+(
+	Pin[0 0 5500 3000 6100 3000 "1" "1" "square,edge2"]
+	Pin[20000 0 5500 3000 6100 3000 "2" "2" "edge2"]
+	ElementLine [0 0 5000 0 1000]
+	ElementLine [15000 0 20000 0 1000]
+	ElementLine [5000 -1600 15000 -1600 1000]
+	ElementLine [15000 -1600 15000 1600 1000]
+	ElementLine [15000 1600 5000 1600 1000]
+	ElementLine [5000 1600 5000 -1600 1000]
+
+	)
+
+Element["onsolder" "FUSE_SST" "F1" "1A" 52500 32500 -21672 8949 0 100 "auto"]
+(
+	Pad[-10000 -2250 -10000 2250 8000 2000 8000 "" "1" "onsolder,square"]
+	Pad[10000 -2250 10000 2250 8000 2000 8000 "" "2" "onsolder,square"]
+
+	)
+
+Element["onsolder" "MICRODIP4" "U1" "unknown" 82500 32500 -17172 14949 0 100 "auto"]
+(
+	Pad[-7874 -12992 -7874 -10236 3346 2000 3346 "" "1" "onsolder,square"]
+	Pad[7874 -12992 7874 -10236 3346 2000 3346 "" "2" "onsolder,square"]
+	Pad[-7874 10236 -7874 12992 3346 2000 3346 "" "4" "onsolder,square,edge2"]
+	Pad[7874 10236 7874 12992 3346 1000 3346 "" "3" "onsolder,square,edge2"]
+	ElementLine [-10137 -8050 -10137 8050 1000]
+	ElementLine [10137 -8050 10137 8050 1000]
+
+	)
+
+Element["onsolder" "DPAK" "Q1" "unknown" 116500 61000 -16100 -14000 0 100 "auto"]
+(
+	Pad[9000 19550 9000 25050 6300 2000 8300 "" "1" "onsolder,square,edge2"]
+	Pad[-9000 19550 -9000 25050 6300 2000 8300 "" "3" "onsolder,square,edge2"]
+	Pad[0 -800 0 800 22800 2000 24800 "" "4" "onsolder,square"]
+	ElementLine [-12900 13700 12900 13700 1000]
+	ElementLine [-12900 -13700 -12900 13700 1000]
+	ElementLine [-12900 -13700 -10400 -13700 1000]
+	ElementLine [-10400 -13700 -8400 -15700 1000]
+	ElementLine [-8400 -15700 8400 -15700 1000]
+	ElementLine [8400 -15700 10400 -13700 1000]
+	ElementLine [10400 -13700 12900 -13700 1000]
+	ElementLine [12900 -13700 12900 13700 1000]
+	ElementLine [1000 14200 1000 19200 2000]
+	ElementLine [500 19200 1000 19200 2000]
+	ElementLine [500 14200 500 19200 2000]
+	ElementLine [0 14200 500 14200 2000]
+	ElementLine [0 14200 0 19200 2000]
+	ElementLine [-500 19200 0 19200 2000]
+	ElementLine [-500 14200 -500 19200 2000]
+	ElementLine [-1000 14200 -500 14200 2000]
+	ElementLine [-1000 14200 -1000 19200 2000]
+
+	)
+
+Element["onsolder" "0805" "R7" "100k" 97000 84500 -10500 6000 0 100 "auto"]
+(
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 3543 393 3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["onsolder" "SO8" "U2" "unknown" 98500 107500 -17000 16000 0 100 "auto"]
+(
+	Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "1" "1" "onsolder,square"]
+	Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "2" "2" "onsolder,square"]
+	Pad[2500 -13500 2500 -7000 2000 1000 3000 "3" "3" "onsolder,square"]
+	Pad[7500 -13500 7500 -7000 2000 1000 3000 "4" "4" "onsolder,square"]
+	Pad[7500 7000 7500 13500 2000 1000 3000 "5" "5" "onsolder,square,edge2"]
+	Pad[2500 7000 2500 13500 2000 1000 3000 "6" "6" "onsolder,square,edge2"]
+	Pad[-2500 7000 -2500 13500 2000 1000 3000 "7" "7" "onsolder,square,edge2"]
+	Pad[-7500 7000 -7500 13500 2000 1000 3000 "8" "8" "onsolder,square,edge2"]
+	ElementLine [-9500 -15500 9500 -15500 1000]
+	ElementLine [9500 -15500 9500 15500 1000]
+	ElementLine [-9500 15500 9500 15500 1000]
+	ElementLine [-9500 -15500 -9500 -2500 1000]
+	ElementLine [-9500 2500 -9500 15500 1000]
+	ElementArc [-9500 0 2500 2500 90 180 1000]
+
+	)
+
+Element["onsolder" "0805" "R3" "510k" 90000 56043 -10000 -3043 0 100 "auto"]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["onsolder" "0805" "R4" "510k" 82500 69000 -10543 6500 0 100 "auto"]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["onsolder" "0805" "R2" "200k" 97500 70000 -9957 -500 0 100 "auto"]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["onsolder" "0805" "R1" "200k" 97500 56000 -4107 -6850 0 100 "auto"]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["" "GSIP5" "PROG" "unknown" 122000 113500 -14500 -12500 0 100 ""]
+(
+	Pin[0 0 7000 3000 7600 3800 "1" "1" "square"]
+	Pin[0 10000 7000 3000 7600 3800 "2" "2" ""]
+	Pin[0 20000 7000 3000 7600 3800 "3" "3" ""]
+	Pin[0 30000 7000 3000 7600 3800 "4" "4" ""]
+	Pin[0 40000 7000 3000 7600 3800 "5" "5" ""]
+	ElementLine [-5000 0 -5000 40000 2000]
+	ElementLine [5000 0 5000 40000 2000]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementArc [0 0 5000 5000 180 180 2000]
+	ElementArc [0 40000 5000 5000 0 180 2000]
+
+	)
+
+Element["onsolder" "SO8" "U6" "unknown" 34000 130500 -13500 17000 0 100 "auto"]
+(
+	Pad[7000 -7500 13500 -7500 2000 1000 3000 "1" "1" "onsolder,square,edge2"]
+	Pad[7000 -2500 13500 -2500 2000 1000 3000 "2" "2" "onsolder,square,edge2"]
+	Pad[7000 2500 13500 2500 2000 1000 3000 "3" "3" "onsolder,square,edge2"]
+	Pad[7000 7500 13500 7500 2000 1000 3000 "4" "4" "onsolder,square,edge2"]
+	Pad[-13500 7500 -7000 7500 2000 1000 3000 "5" "5" "onsolder,square"]
+	Pad[-13500 2500 -7000 2500 2000 1000 3000 "6" "6" "onsolder,square"]
+	Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "7" "7" "onsolder,square"]
+	Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "8" "8" "onsolder,square"]
+	ElementLine [15500 -9500 15500 9500 1000]
+	ElementLine [-15500 9500 15500 9500 1000]
+	ElementLine [-15500 -9500 -15500 9500 1000]
+	ElementLine [2500 -9500 15500 -9500 1000]
+	ElementLine [-15500 -9500 -2500 -9500 1000]
+	ElementArc [0 -9500 2500 2500 0 180 1000]
+
+	)
+
+Element["onsolder" "0805" "R8" "unknown" 19500 115500 -5500 -4000 0 100 "auto"]
+(
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[3543 -393 3543 393 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-393 2755 393 2755 800]
+	ElementLine [-393 -2755 393 -2755 800]
+
+	)
+
+Element["onsolder" "0805" "C1" "100nF" 98500 128000 -13500 3500 0 100 "auto"]
+(
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[3543 -393 3543 393 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-393 2755 393 2755 800]
+	ElementLine [-393 -2755 393 -2755 800]
+
+	)
+
+Element["onsolder" "0805" "C2" "1uF" 89000 139500 -3000 12500 0 100 "auto"]
+(
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 3543 393 3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["onsolder" "0805" "R6" "12.4k" 105000 140000 3000 12500 0 100 "auto"]
+(
+	Pad[-393 3543 393 3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [2755 -393 2755 393 800]
+	ElementLine [-2755 -393 -2755 393 800]
+
+	)
+
+Element["onsolder" "0805" "R5" "unknown" 96500 139500 -2500 12500 0 100 "auto"]
+(
+	Pad[-393 -3543 393 -3543 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-393 3543 393 3543 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-2755 -393 -2755 393 800]
+	ElementLine [2755 -393 2755 393 800]
+
+	)
+
+Element["" "TERM_2_5MM" "ACOUT" "unknown" 112500 34685 -36185 -28685 0 100 ""]
+(
+	Pin[0 0 12000 3000 12000 5700 "" "1" "square"]
+	Pin[0 -19685 12000 3000 12000 5700 "" "2" ""]
+	ElementLine [-16388 -29527 16388 -29527 1000]
+	ElementLine [-16388 9842 16388 9842 1000]
+	ElementLine [16388 -29527 16388 9842 1000]
+	ElementLine [-16388 -29527 -16388 9842 1000]
+
+	)
+
+Element["" "TERM_2_5MM" "ACIN" "unknown" 20000 34685 18815 -28685 0 100 ""]
+(
+	Pin[0 0 12000 3000 12000 5700 "" "1" "square"]
+	Pin[0 -19685 12000 3000 12000 5700 "" "2" ""]
+	ElementLine [-16388 -29527 16388 -29527 1000]
+	ElementLine [-16388 9842 16388 9842 1000]
+	ElementLine [16388 -29527 16388 9842 1000]
+	ElementLine [-16388 -29527 -16388 9842 1000]
+
+	)
+
+Element["onsolder" "0805" "C4" "100nF" 116043 102500 1414 -3000 0 100 "auto"]
+(
+	Pad[3543 -393 3543 393 5118 2000 5718 "1" "1" "onsolder,square"]
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "2" "2" "onsolder,square"]
+	ElementLine [-393 -2755 393 -2755 800]
+	ElementLine [-393 2755 393 2755 800]
+
+	)
+
+Element["" "RFD22301" "U4" "unknown" 47000 102500 -40500 -4000 0 100 ""]
+(
+	Pad[-31400 5000 -21400 5000 3200 3200 3200 "" "1" "square"]
+	Pad[-31400 10000 -21400 10000 3200 3200 3200 "" "2" "square"]
+	Pad[-31400 15000 -21400 15000 3200 3200 3200 "" "3" "square"]
+	Pad[-31400 20000 -21400 20000 3200 3200 3200 "" "4" "square"]
+	Pad[-31400 25000 -21400 25000 3200 3200 3200 "" "5" "square"]
+	Pad[-31400 30000 -21400 30000 3200 3200 3200 "" "6" "square"]
+	Pad[-31400 35000 -21400 35000 3200 3200 3200 "" "7" "square"]
+	Pad[-31400 40000 -21400 40000 3200 3200 3200 "" "8" "square"]
+	Pad[21400 5000 31400 5000 3200 3200 3200 "" "19" "square,edge2"]
+	Pad[21400 10000 31400 10000 3200 3200 3200 "" "18" "square,edge2"]
+	Pad[21400 15000 31400 15000 3200 3200 3200 "" "17" "square,edge2"]
+	Pad[21400 20000 31400 20000 3200 3200 3200 "" "16" "square,edge2"]
+	Pad[21400 25000 31400 25000 3200 3200 3200 "" "15" "square,edge2"]
+	Pad[21400 30000 31400 30000 3200 3200 3200 "" "14" "square,edge2"]
+	Pad[21400 35000 31400 35000 3200 3200 3200 "" "13" "square,edge2"]
+	Pad[21400 40000 31400 40000 3200 3200 3200 "" "12" "square,edge2"]
+	Pad[21400 45000 31400 45000 3200 3200 3200 "" "11" "square,edge2"]
+	Pad[21400 50000 31400 50000 3200 3200 3200 "" "10" "square,edge2"]
+	Pad[21400 55000 31400 55000 3200 3200 3200 "" "9" "square,edge2"]
+
+	)
+Layer(1 "top")
+(
+	Line[25500 138000 10500 138000 1000 2000 "clearline"]
+	Line[10500 138000 10000 137500 1000 2000 "clearline"]
+	Line[23000 133000 10500 133000 1000 2000 "clearline"]
+	Line[10500 133000 10000 132500 1000 2000 "clearline"]
+	Line[23000 128000 10500 128000 1000 2000 "clearline"]
+	Line[10500 128000 10000 127500 1000 2000 "clearline"]
+	Line[112500 15000 112500 12500 2500 2000 "clearline"]
+	Line[122000 113500 103000 113500 1000 2000 "clearline"]
+	Line[103000 113500 99000 117500 1000 2000 "clearline"]
+	Line[99000 117500 73400 117500 1000 2000 "clearline"]
+	Line[73400 122500 100500 122500 1000 2000 "clearline"]
+	Line[100500 122500 101500 123500 1000 2000 "clearline"]
+	Line[101500 123500 122000 123500 1000 2000 "clearline"]
+	Line[73400 132500 101000 132500 1000 2000 "clearline"]
+	Line[101000 132500 102000 133500 1000 2000 "clearline"]
+	Line[102000 133500 122000 133500 1000 2000 "clearline"]
+	Line[73400 137500 94000 137500 1000 2000 "clearline"]
+	Line[94000 137500 100000 143500 1000 2000 "clearline"]
+	Line[100000 143500 122000 143500 1000 2000 "clearline"]
+	Line[20000 77500 5500 77500 1000 2000 "clearline"]
+	Line[5500 77500 3000 80000 1000 2000 "clearline"]
+	Line[3000 80000 3000 119500 1000 2000 "clearline"]
+	Line[3000 119500 6500 123000 1000 2000 "clearline"]
+	Line[6500 123000 20100 123000 1000 2000 "clearline"]
+	Line[20100 123000 20600 122500 1000 2000 "clearline"]
+	Line[20600 117500 10500 117500 1000 2000 "clearline"]
+	Line[74000 137500 63000 137500 1000 2000 "clearline"]
+	Line[65000 35768 65000 77500 2500 2000 "clearline"]
+	Line[79000 55500 65000 55500 2500 2000 "clearline"]
+	Line[20000 34685 29185 34685 2500 2000 "clearline"]
+	Line[29185 34685 39000 44500 2500 2000 "clearline"]
+	Line[39000 44500 39000 61000 2500 2000 "clearline"]
+	Line[39000 61000 41500 63500 2500 2000 "clearline"]
+	Line[41500 63500 51000 63500 2500 2000 "clearline"]
+	Line[51000 63500 65000 77500 2500 2000 "clearline"]
+	Line[54960 35768 54960 37540 2500 2000 "clearline"]
+	Line[54960 37540 47000 45500 2500 2000 "clearline"]
+	Line[72000 101000 82000 101000 1000 2000 "clearline"]
+	Line[82000 101000 86500 105500 1000 2000 "clearline"]
+	Line[89000 143043 89000 137500 1000 2000 "clearline"]
+	Line[112500 94000 112500 83000 2500 2000 "clearline"]
+	Line[125000 92000 125500 91500 1000 2000 "clearline"]
+	Line[91000 73500 96000 73500 2500 2000 "clearline"]
+	Line[96000 73500 112500 57000 2500 2000 "clearline"]
+	Line[11500 107500 20600 107500 1000 2000 "clearline"]
+	Line[20600 107500 20600 112500 1000 2000 "clearline"]
+	Line[10000 143000 20100 143000 1000 2000 "clearline"]
+	Line[20100 143000 20600 142500 1000 2000 "clearline"]
+	Line[73000 157500 73000 152900 1000 2000 "clearline"]
+	Line[73000 152900 73400 152500 1000 2000 "clearline"]
+	Line[73400 152500 86629 152500 1000 2000 "clearline"]
+	Line[86629 152500 89000 150129 1000 2000 "clearline"]
+	Line[122000 153500 92371 153500 1000 2000 "clearline"]
+	Line[92371 153500 89000 150129 1000 2000 "clearline"]
+	Line[75039 35768 75039 33961 2500 2000 "clearline"]
+	Line[75039 33961 79000 30000 2500 2000 "clearline"]
+	Line[79000 30000 92000 30000 2500 2000 "clearline"]
+	Line[92000 30000 98000 24000 2500 2000 "clearline"]
+	Line[98000 24000 101815 24000 2500 2000 "clearline"]
+	Line[101815 24000 112500 34685 2500 2000 "clearline"]
+	Line[82500 38000 82500 45500 2500 2000 "clearline"]
+	Line[82500 45500 90500 53500 2500 2000 "clearline"]
+	Line[90500 53500 90500 73000 2500 2000 "clearline"]
+	Line[90500 73000 91000 73500 2500 2000 "clearline"]
+	Line[73400 112500 73400 107500 1000 2000 "clearline"]
+	Line[59000 114000 71900 114000 1000 2000 "clearline"]
+	Line[71900 114000 73400 112500 1000 2000 "clearline"]
+	Line[103500 148500 103500 153500 1000 2000 "clearline"]
+	Line[125000 91500 123000 91500 1000 2000 "clearline"]
+	Line[123000 91500 117000 97500 1000 2000 "clearline"]
+	Line[117000 97500 117000 102000 1000 2000 "clearline"]
+	Line[117000 102000 113500 105500 1000 2000 "clearline"]
+	Line[113500 105500 86500 105500 1000 2000 "clearline"]
+	Line[125000 102500 128000 105500 1000 2000 "clearline"]
+	Line[128000 105500 128000 147500 1000 2000 "clearline"]
+	Line[128000 147500 122000 153500 1000 2000 "clearline"]
+	Line[66500 152000 72900 152000 1000 2000 "clearline"]
+	Line[72900 152000 73400 152500 1000 2000 "clearline"]
+	Line[73400 142500 57000 142500 1000 2000 "clearline"]
+	Line[52500 120500 59000 114000 1000 2000 "clearline"]
+	Line[20600 142500 57000 142500 1000 2000 "clearline"]
+	Line[52500 120500 52500 142500 1000 2000 "clearline"]
+	Line[63000 142500 63000 148500 1000 2000 "clearline"]
+	Line[63000 148500 66500 152000 1000 2000 "clearline"]
+	Line[52500 131000 59000 131000 1000 2000 "clearline"]
+)
+Layer(2 "ground")
+(
+)
+Layer(3 "signal2")
+(
+)
+Layer(4 "signal3")
+(
+)
+Layer(5 "power")
+(
+)
+Layer(6 "bottom")
+(
+	Line[23750 138000 10500 138000 1000 2000 "clearline"]
+	Line[10500 138000 10000 137500 1000 2000 "clearline"]
+	Line[23750 133000 10500 133000 1000 2000 "clearline"]
+	Line[10500 133000 10000 132500 1000 2000 "clearline"]
+	Line[23750 128000 10500 128000 1000 2000 "clearline"]
+	Line[10500 128000 10000 127500 1000 2000 "clearline"]
+	Line[20000 15000 20000 12500 2500 2000 "clearline"]
+	Line[20000 12500 27000 5500 2500 2000 "clearline"]
+	Line[27000 5500 103000 5500 2500 2000 "clearline"]
+	Line[103000 5500 112500 15000 2500 2000 "clearline"]
+	Line[42500 17500 42500 5500 2500 2000 "clearline"]
+	Line[90374 20886 90374 5874 2500 2000 "clearline"]
+	Line[90374 5874 90000 5500 2500 2000 "clearline"]
+	Line[62500 17500 71240 17500 2500 2000 "clearline"]
+	Line[71240 17500 74626 20886 2500 2000 "clearline"]
+	Line[42500 32500 22185 32500 2500 2000 "clearline"]
+	Line[22185 32500 20000 34685 2500 2000 "clearline"]
+	Line[89000 143043 96500 143043 1000 2000 "clearline"]
+	Line[96500 135957 104500 135957 1000 2000 "clearline"]
+	Line[104500 135957 105000 136457 1000 2000 "clearline"]
+	Line[96000 117750 96000 126957 1000 2000 "clearline"]
+	Line[96000 126957 94957 128000 1000 2000 "clearline"]
+	Line[101000 126957 102043 128000 1000 2000 "clearline"]
+	Line[106000 117750 106000 121500 1000 2000 "clearline"]
+	Line[106000 121500 108000 123500 1000 2000 "clearline"]
+	Line[108000 123500 108000 133457 1000 2000 "clearline"]
+	Line[108000 133457 105000 136457 1000 2000 "clearline"]
+	Line[122000 143500 123500 143500 1000 2000 "clearline"]
+	Line[96000 97250 96000 89043 1000 2000 "clearline"]
+	Line[96000 89043 97000 88043 1000 2000 "clearline"]
+	Line[91000 97250 91000 81043 1000 2000 "clearline"]
+	Line[91000 81043 82500 72543 1000 2000 "clearline"]
+	Line[43700 89100 43700 79100 1000 2000 "clearline"]
+	Line[43700 79100 45000 77800 1000 2000 "clearline"]
+	Line[55000 77800 55000 86200 1000 2000 "clearline"]
+	Line[55000 86200 54000 87200 1000 2000 "clearline"]
+	Line[15957 115500 12500 115500 1000 2000 "clearline"]
+	Line[12500 115500 10500 117500 1000 2000 "clearline"]
+	Line[35500 93000 29500 93000 1000 2000 "clearline"]
+	Line[29500 93000 23000 99500 1000 2000 "clearline"]
+	Line[23000 99500 23000 115457 1000 2000 "clearline"]
+	Line[23000 115457 23043 115500 1000 2000 "clearline"]
+	Line[23750 123000 28500 123000 1000 2000 "clearline"]
+	Line[28500 123000 32000 119500 1000 2000 "clearline"]
+	Line[32000 119500 32000 113000 1000 2000 "clearline"]
+	Line[48500 96500 48500 88500 1000 2000 "clearline"]
+	Line[48500 88500 50000 87000 1000 2000 "clearline"]
+	Line[50000 87000 54000 87000 1000 2000 "clearline"]
+	Line[54000 87000 54100 87100 1000 2000 "clearline"]
+	Line[32000 113000 48500 96500 1000 2000 "clearline"]
+	Line[32000 118000 50500 118000 1000 2000 "clearline"]
+	Line[50500 118000 52500 120000 1000 2000 "clearline"]
+	Line[52500 120000 52500 133500 1000 2000 "clearline"]
+	Line[52500 133500 56500 137500 1000 2000 "clearline"]
+	Line[63000 137500 56500 137500 1000 2000 "clearline"]
+	Line[63000 91900 62200 91100 1000 2000 "clearline"]
+	Line[107500 83300 109300 83300 2500 2000 "clearline"]
+	Line[109300 83300 112500 86500 2500 2000 "clearline"]
+	Line[112500 86500 112500 94000 2500 2000 "clearline"]
+	Line[90374 44114 90374 52126 2500 2000 "clearline"]
+	Line[90374 52126 90000 52500 2500 2000 "clearline"]
+	Line[90000 52500 97457 52500 2500 2000 "clearline"]
+	Line[97457 52500 97500 52457 2500 2000 "clearline"]
+	Line[97500 52457 107957 52457 2500 2000 "clearline"]
+	Line[107957 52457 116500 61000 2500 2000 "clearline"]
+	Line[82500 65457 84129 65457 2500 2000 "clearline"]
+	Line[84129 65457 90000 59586 2500 2000 "clearline"]
+	Line[97500 59543 97500 66457 2500 2000 "clearline"]
+	Line[55000 52200 61157 52200 2500 2000 "clearline"]
+	Line[61157 52200 63957 55000 2500 2000 "clearline"]
+	Line[62500 17500 62500 32500 2500 2000 "clearline"]
+	Line[71043 55000 78500 55000 2500 2000 "clearline"]
+	Line[78500 55000 79000 55500 2500 2000 "clearline"]
+	Line[45000 52200 45000 47500 2500 2000 "clearline"]
+	Line[45000 47500 47000 45500 2500 2000 "clearline"]
+	Line[101000 126957 101000 109500 1000 2000 "clearline"]
+	Line[88000 109500 70000 91500 1000 2000 "clearline"]
+	Line[70000 91500 62600 91500 1000 2000 "clearline"]
+	Line[62600 91500 62200 91100 1000 2000 "clearline"]
+	Line[91000 117750 88750 117750 1000 2000 "clearline"]
+	Line[88750 117750 72000 101000 1000 2000 "clearline"]
+	Line[88000 109500 110500 109500 1000 2000 "clearline"]
+	Line[125500 91500 125500 83300 1000 2000 "clearline"]
+	Line[106000 97250 106000 101000 1000 2000 "clearline"]
+	Line[106000 101000 107500 102500 1000 2000 "clearline"]
+	Line[97500 73543 91043 73543 2500 2000 "clearline"]
+	Line[91043 73543 91000 73500 2500 2000 "clearline"]
+	Line[97000 80957 97000 73543 2500 2000 "clearline"]
+	Line[20000 57815 22315 57815 1000 2000 "clearline"]
+	Line[22315 57815 30000 65500 1000 2000 "clearline"]
+	Line[30000 65500 30000 79700 1000 2000 "clearline"]
+	Line[30000 79700 35500 85200 1000 2000 "clearline"]
+	Line[35500 85200 29800 85200 1000 2000 "clearline"]
+	Line[29800 85200 17500 97500 1000 2000 "clearline"]
+	Line[17500 97500 17500 101500 1000 2000 "clearline"]
+	Line[10000 143000 43000 143000 1000 2000 "clearline"]
+	Line[43000 143000 45000 141000 1000 2000 "clearline"]
+	Line[45000 141000 45000 123750 1000 2000 "clearline"]
+	Line[45000 123750 44250 123000 1000 2000 "clearline"]
+	Line[30000 71000 59000 71000 1000 2000 "clearline"]
+	Line[59000 71000 62000 74000 1000 2000 "clearline"]
+	Line[62000 74000 62000 82000 1000 2000 "clearline"]
+	Line[62000 82000 58000 86000 1000 2000 "clearline"]
+	Line[58000 86000 58000 91000 1000 2000 "clearline"]
+	Line[58000 91000 54000 95000 1000 2000 "clearline"]
+	Line[74626 44114 76386 44114 2500 2000 "clearline"]
+	Line[76386 44114 82500 38000 2500 2000 "clearline"]
+	Line[62250 74250 62250 72750 1000 2000 "clearline"]
+	Line[62250 72750 74000 61000 1000 2000 "clearline"]
+	Line[74000 61000 81500 61000 1000 2000 "clearline"]
+	Line[81500 61000 84500 58000 1000 2000 "clearline"]
+	Line[89000 135957 73457 135957 1000 2000 "clearline"]
+	Line[73457 135957 68000 130500 1000 2000 "clearline"]
+	Line[68000 130500 59500 130500 1000 2000 "clearline"]
+	Line[59500 130500 59000 131000 1000 2000 "clearline"]
+	Line[96500 143043 96500 153500 1000 2000 "clearline"]
+	Line[96500 153500 98000 155000 1000 2000 "clearline"]
+	Line[105000 143543 105000 147000 1000 2000 "clearline"]
+	Line[105000 147000 103500 148500 1000 2000 "clearline"]
+	Line[125000 102500 119586 102500 1000 2000 "clearline"]
+	Line[9500 143000 4500 143000 1000 2000 "clearline"]
+	Line[4500 143000 4000 142500 1000 2000 "clearline"]
+	Line[4000 142500 4000 115000 1000 2000 "clearline"]
+	Line[17500 101500 4000 115000 1000 2000 "clearline"]
+	Line[107500 102500 112500 102500 1000 2000 "clearline"]
+	Line[112500 95000 118500 95000 1000 2000 "clearline"]
+	Line[118500 95000 120000 96500 1000 2000 "clearline"]
+	Line[120000 96500 129000 96500 1000 2000 "clearline"]
+	Line[129000 96500 130500 98000 1000 2000 "clearline"]
+	Line[130500 98000 130500 104500 1000 2000 "clearline"]
+	Line[127000 108000 130500 104500 1000 2000 "clearline"]
+	Line[127000 108000 112000 108000 1000 2000 "clearline"]
+	Line[112000 108000 110500 109500 1000 2000 "clearline"]
+	Line[110500 109500 110500 153500 1000 2000 "clearline"]
+	Line[110500 153500 109000 155000 1000 2000 "clearline"]
+	Line[109000 155000 98000 155000 1000 2000 "clearline"]
+	Line[76886 44114 78614 44114 1000 2000 "clearline"]
+	Line[78614 44114 84500 50000 1000 2000 "clearline"]
+	Line[84500 50000 84500 58000 1000 2000 "clearline"]
+)
+Layer(7 "outline")
+(
+	Line[0 162000 133000 162000 1000 2000 "clearline"]
+	Line[133000 162000 133000 0 1000 2000 "clearline"]
+	Line[133000 0 0 0 1000 2000 "clearline"]
+	Line[0 0 0 162000 1000 2000 "clearline"]
+)
+Layer(8 "spare")
+(
+)
+Layer(9 "silk")
+(
+)
+Layer(10 "silk")
+(
+)
+NetList()
+(
+	Net("GND" "(unknown)")
+	(
+		Connect("C2-1")
+		Connect("C3-2")
+		Connect("C4-1")
+		Connect("C5-1")
+		Connect("PROG-5")
+		Connect("Q2-2")
+		Connect("R2-1")
+		Connect("R6-1")
+		Connect("R7-1")
+		Connect("SWITCH-2")
+		Connect("U1-4")
+		Connect("U3-1")
+		Connect("U4-1")
+		Connect("U4-2")
+		Connect("U4-8")
+		Connect("U4-9")
+		Connect("U4-10")
+		Connect("U4-12")
+		Connect("U4-18")
+		Connect("U4-19")
+		Connect("U6-1")
+		Connect("U6-2")
+		Connect("U6-3")
+		Connect("U6-4")
+	)
+	Net("unnamed_net1" "(unknown)")
+	(
+		Connect("F1-2")
+		Connect("U1-1")
+		Connect("V1-2")
+	)
+	Net("unnamed_net2" "(unknown)")
+	(
+		Connect("ACIN-2")
+		Connect("ACOUT-2")
+		Connect("U1-2")
+		Connect("V1-1")
+	)
+	Net("unnamed_net3" "(unknown)")
+	(
+		Connect("Q1-4")
+		Connect("R1-2")
+		Connect("R3-2")
+		Connect("U1-3")
+	)
+	Net("unnamed_net4" "(unknown)")
+	(
+		Connect("ACIN-1")
+		Connect("D1-1")
+		Connect("F1-1")
+		Connect("R9-2")
+	)
+	Net("unnamed_net5" "(unknown)")
+	(
+		Connect("C4-2")
+		Connect("U2-4")
+	)
+	Net("unnamed_net6" "(unknown)")
+	(
+		Connect("C1-2")
+		Connect("C2-2")
+		Connect("C3-1")
+		Connect("Q1-3")
+		Connect("R5-2")
+		Connect("U2-6")
+		Connect("U3-3")
+	)
+	Net("unnamed_net7" "(unknown)")
+	(
+		Connect("C1-1")
+		Connect("U2-7")
+	)
+	Net("unnamed_net8" "(unknown)")
+	(
+		Connect("R1-1")
+		Connect("R2-2")
+	)
+	Net("unnamed_net9" "(unknown)")
+	(
+		Connect("R3-1")
+		Connect("R4-2")
+	)
+	Net("unnamed_net10" "(unknown)")
+	(
+		Connect("R4-1")
+		Connect("U2-1")
+	)
+	Net("unnamed_net11" "(unknown)")
+	(
+		Connect("R7-2")
+		Connect("U2-2")
+	)
+	Net("unnamed_net12" "(unknown)")
+	(
+		Connect("R5-1")
+		Connect("R6-2")
+		Connect("U2-5")
+	)
+	Net("unnamed_net13" "(unknown)")
+	(
+		Connect("Q1-1")
+		Connect("U2-8")
+	)
+	Net("unnamed_net14" "(unknown)")
+	(
+		Connect("R8-1")
+		Connect("U4-3")
+	)
+	Net("unnamed_net15" "(unknown)")
+	(
+		Connect("SWITCH-1")
+		Connect("U4-4")
+	)
+	Net("unnamed_net16" "(unknown)")
+	(
+		Connect("U4-5")
+		Connect("U6-7")
+	)
+	Net("unnamed_net17" "(unknown)")
+	(
+		Connect("U4-6")
+		Connect("U6-6")
+	)
+	Net("unnamed_net18" "(unknown)")
+	(
+		Connect("U4-7")
+		Connect("U6-5")
+	)
+	Net("unnamed_net19" "(unknown)")
+	(
+		Connect("PROG-1")
+		Connect("U4-17")
+	)
+	Net("unnamed_net20" "(unknown)")
+	(
+		Connect("PROG-2")
+		Connect("U4-16")
+	)
+	Net("unnamed_net21" "(unknown)")
+	(
+		Connect("PROG-3")
+		Connect("U4-14")
+	)
+	Net("unnamed_net22" "(unknown)")
+	(
+		Connect("C5-2")
+		Connect("PROG-4")
+		Connect("U3-2")
+		Connect("U4-13")
+		Connect("U5-1")
+		Connect("U6-8")
+	)
+	Net("unnamed_net23" "(unknown)")
+	(
+		Connect("ACOUT-1")
+		Connect("D1-2")
+	)
+	Net("unnamed_net24" "(unknown)")
+	(
+		Connect("D1-3")
+		Connect("U5-3")
+	)
+	Net("unnamed_net25" "(unknown)")
+	(
+		Connect("R9-1")
+		Connect("U5-4")
+	)
+	Net("unnamed_net26" "(unknown)")
+	(
+		Connect("Q2-3")
+		Connect("U5-2")
+	)
+	Net("unnamed_net27" "(unknown)")
+	(
+		Connect("Q2-1")
+		Connect("R8-2")
+	)
+)
+

--- /dev/null
+++ b/schem/BLE_AC_Controller.sch
@@ -1,1 +1,446 @@
+v 20130925 2
+C 26800 55400 1 0 0 bridge-2.sym
+{
+T 27000 56400 5 10 1 1 0 0 1
+refdes=U1
+T 27000 56600 5 10 0 0 0 0 1
+device=BRIDGE
+T 27000 56800 5 10 0 0 0 0 1
+symversion=0.1
+T 27000 56700 5 10 1 1 0 0 1
+device=MDB8SFSCT
+T 27400 56400 5 10 1 1 0 0 1
+footprint=MICRODIP4
+}
+C 24800 55300 1 0 1 connector2-2.sym
+{
+T 24100 56600 5 10 1 1 0 0 1
+refdes=ACIN
+T 24500 56550 5 10 0 0 0 6 1
+device=CONNECTOR_2
+T 24100 55050 5 10 1 1 0 0 1
+footprint=TERM_2_5MM
+}
+C 28500 56000 1 90 0 gnd-1.sym
+N 28000 56100 28200 56100 4
+C 33700 53600 1 0 0 gnd-1.sym
+N 33800 53900 33800 54100 4
+C 25200 56100 1 0 0 fuse-1.sym
+{
+T 25400 56500 5 10 0 0 0 0 1
+device=FUSE
+T 25200 56200 5 10 1 1 0 0 1
+refdes=F1
+T 25400 56700 5 10 0 0 0 0 1
+symversion=0.1
+T 26000 56200 5 10 1 1 0 0 1
+value=1A
+T 25200 55800 5 10 1 1 0 0 1
+footprint=FUSE_SST
+}
+C 26500 55000 1 90 0 varistor-1.sym
+{
+T 25700 55100 5 10 0 0 90 0 1
+device=MOV
+T 24850 55300 5 10 0 0 90 0 1
+device=VARISTOR
+T 25400 55300 5 10 1 1 0 0 1
+refdes=V1
+T 25400 55100 5 10 1 1 0 0 1
+footprint=ACY200
+}
+N 24800 56100 25200 56100 4
+N 26100 56100 26800 56100 4
+N 26300 56100 26300 55900 4
+N 24800 55700 25300 55700 4
+N 25300 55700 25300 54800 4
+N 23800 54800 26600 54800 4
+N 26300 54800 26300 55000 4
+N 26600 54800 26600 55600 4
+N 26600 55600 26800 55600 4
+C 32000 50700 1 90 0 capacitor-1.sym
+{
+T 31300 50900 5 10 0 0 90 0 1
+device=CAPACITOR
+T 31200 51100 5 10 1 1 0 0 1
+refdes=C4
+T 31100 50900 5 10 0 0 90 0 1
+symversion=0.1
+T 31200 50900 5 10 1 1 0 0 1
+value=100nF
+T 31200 50700 5 10 1 1 0 0 1
+footprint=0805
+}
+C 32300 54500 1 90 0 capacitor-1.sym
+{
+T 31600 54700 5 10 0 0 90 0 1
+device=CAPACITOR
+T 31600 54800 5 10 1 1 0 0 1
+refdes=C2
+T 31400 54700 5 10 0 0 90 0 1
+symversion=0.1
+T 31600 54600 5 10 1 1 0 0 1
+value=1uF
+T 31600 54400 5 10 1 1 0 0 1
+footprint=0805
+}
+C 30400 54000 1 0 0 capacitor-1.sym
+{
+T 30600 54700 5 10 0 0 0 0 1
+device=CAPACITOR
+T 30500 54300 5 10 1 1 0 0 1
+refdes=C1
+T 30600 54900 5 10 0 0 0 0 1
+symversion=0.1
+T 31000 54300 5 10 1 1 0 0 1
+value=100nF
+T 31000 53900 5 10 1 1 0 0 1
+footprint=0805
+}
+C 32500 55400 1 270 0 capacitor-2.sym
+{
+T 33200 55200 5 10 0 0 270 0 1
+device=POLARIZED_CAPACITOR
+T 32400 55100 5 10 1 1 0 0 1
+refdes=C3
+T 33400 55200 5 10 0 0 270 0 1
+symversion=0.1
+T 32600 54300 5 10 1 1 90 0 1
+value=470uF
+T 33100 54200 5 10 1 1 90 0 1
+footprint=FCAPEL
+}
+C 28300 54500 1 90 0 resistor-1.sym
+{
+T 27900 54800 5 10 0 0 90 0 1
+device=RESISTOR
+T 27600 55100 5 10 1 1 0 0 1
+refdes=R1
+T 27600 54900 5 10 1 1 0 0 1
+value=200k
+T 27600 54700 5 10 1 1 0 0 1
+footprint=0805
+}
+C 28300 53400 1 90 0 resistor-1.sym
+{
+T 27900 53700 5 10 0 0 90 0 1
+device=RESISTOR
+T 27600 54100 5 10 1 1 0 0 1
+refdes=R2
+T 27600 53900 5 10 1 1 0 0 1
+value=200k
+T 27600 53700 5 10 1 1 0 0 1
+footprint=0805
+}
+C 29300 53400 1 90 0 resistor-1.sym
+{
+T 28900 53700 5 10 0 0 90 0 1
+device=RESISTOR
+T 28600 54000 5 10 1 1 0 0 1
+refdes=R4
+T 28600 53800 5 10 1 1 0 0 1
+value=510k
+T 28600 53600 5 10 1 1 0 0 1
+footprint=0805
+}
+C 29300 54500 1 90 0 resistor-1.sym
+{
+T 28900 54800 5 10 0 0 90 0 1
+device=RESISTOR
+T 28600 55100 5 10 1 1 0 0 1
+refdes=R3
+T 28600 54900 5 10 1 1 0 0 1
+value=510k
+T 28600 54700 5 10 1 1 0 0 1
+footprint=0805
+}
+C 28200 50700 1 90 0 resistor-1.sym
+{
+T 27800 51000 5 10 0 0 90 0 1
+device=RESISTOR
+T 27500 51400 5 10 1 1 0 0 1
+refdes=R7
+T 27500 51200 5 10 1 1 0 0 1
+value=100k
+T 27500 51000 5 10 1 1 0 0 1
+footprint=0805
+}
+C 33400 52500 1 90 0 resistor-1.sym
+{
+T 33000 52800 5 10 0 0 90 0 1
+device=RESISTOR
+T 32700 53200 5 10 1 1 0 0 1
+refdes=R5
+T 32700 52800 5 10 1 1 0 0 1
+footprint=0805
+}
+C 33400 51200 1 90 0 resistor-1.sym
+{
+T 33000 51500 5 10 0 0 90 0 1
+device=RESISTOR
+T 32700 51900 5 10 1 1 0 0 1
+refdes=R6
+T 32700 51700 5 10 1 1 0 0 1
+value=12.4k
+T 32700 51500 5 10 1 1 0 0 1
+footprint=0805
+}
+N 29200 53200 29200 53400 4
+N 29200 54300 29200 54500 4
+N 28000 55600 29400 55600 4
+N 28200 55600 28200 55400 4
+N 29200 55600 29200 55400 4
+N 28100 51600 28100 51800 4
+N 28100 51800 28300 51800 4
+C 28100 52900 1 0 0 gnd-1.sym
+N 28200 53200 28200 53400 4
+N 28200 54300 28200 54500 4
+C 28000 50200 1 0 0 gnd-1.sym
+N 28100 50500 28100 50700 4
+N 29700 53200 29700 54400 4
+N 29700 54400 29900 54400 4
+N 29900 54400 29900 55000 4
+N 30200 53200 30200 54200 4
+N 30200 54200 30400 54200 4
+N 30400 55600 34200 55600 4
+N 31500 53700 31500 55600 4
+N 31500 54200 31300 54200 4
+N 30700 53200 30700 53700 4
+N 30700 53700 31500 53700 4
+N 32100 55600 32100 55400 4
+N 32700 55600 32700 55400 4
+C 32000 54000 1 0 0 gnd-1.sym
+C 32600 54000 1 0 0 gnd-1.sym
+C 31700 50200 1 0 0 gnd-1.sym
+N 31800 50500 31800 50700 4
+N 32100 54300 32100 54500 4
+N 32700 54300 32700 54500 4
+N 31600 51800 31800 51800 4
+N 31800 51800 31800 51600 4
+N 33300 55600 33300 53400 4
+N 31600 52300 33300 52300 4
+N 33300 52100 33300 52500 4
+C 33200 50700 1 0 0 gnd-1.sym
+N 33300 51000 33300 51200 4
+C 28300 51600 1 0 0 SR086.sym
+{
+T 28700 52900 5 10 1 1 0 0 1
+refdes=U2
+T 30800 52900 5 10 1 1 0 0 1
+footprint=SO8
+T 29800 51700 5 10 1 1 0 0 1
+device=SR086
+}
+C 30400 55000 1 90 0 IGBT_DPAK.sym
+{
+T 29900 55900 5 10 0 0 90 0 1
+device=NPN_TRANSISTOR
+T 27600 56500 5 10 0 0 90 0 1
+device=NPN_TRANSISTOR_IGBT
+T 29300 55800 5 10 1 1 0 0 1
+refdes=Q1
+T 30100 55800 5 10 1 1 0 0 1
+device=STGD5NB120SZ
+T 30300 55200 5 10 1 1 0 0 1
+footprint=DPAK
+}
+C 36600 50300 1 0 0 RFD22301.sym
+{
+T 39000 54800 5 10 1 1 0 0 1
+refdes=U4
+T 37200 50800 5 10 1 1 0 0 1
+device=RFD22301
+T 37200 50500 5 10 1 1 0 0 1
+footprint=RFD22301
+}
+C 29700 58600 1 90 1 triac-1.sym
+{
+T 28800 58300 5 10 0 0 270 2 1
+device=TRIAC
+T 29500 58400 5 10 1 1 0 0 1
+refdes=D1
+T 29500 57700 5 10 1 1 0 0 1
+footprint=D2PAK
+}
+C 25900 58000 1 0 0 FODM3053V.sym
+{
+T 26695 59100 5 10 1 1 0 0 1
+device=FODM3053V
+T 26295 59100 5 10 1 1 0 0 1
+refdes=U5
+T 26295 58000 5 10 1 1 0 0 1
+footprint=MFP4
+}
+C 28300 58700 1 0 0 resistor-1.sym
+{
+T 28600 59100 5 10 0 0 0 0 1
+device=RESISTOR
+T 28200 58900 5 10 1 1 0 0 1
+refdes=R9
+T 28500 59000 5 10 1 1 0 0 1
+footprint=0805
+}
+N 28100 58800 28300 58800 4
+N 29400 58600 29400 59500 4
+N 29400 58800 29200 58800 4
+N 29000 57900 28600 57900 4
+N 28600 57900 28600 58400 4
+N 28600 58400 28100 58400 4
+C 24700 57800 1 270 1 NPN.sym
+{
+T 25200 58700 5 10 0 0 270 6 1
+device=NPN_TRANSISTOR
+T 24600 58500 5 10 1 1 0 0 1
+refdes=Q2
+T 24900 58700 5 10 1 1 0 0 1
+footprint=SOT23
+}
+C 24200 58500 1 270 0 gnd-1.sym
+N 24500 58400 24700 58400 4
+C 39700 50000 1 0 0 gnd-1.sym
+N 39800 50300 39800 50900 4
+N 39800 50900 39600 50900 4
+N 39600 50500 39800 50500 4
+C 36300 51200 1 0 0 gnd-1.sym
+N 36400 51500 36400 51700 4
+N 36400 51700 36600 51700 4
+C 36100 54000 1 0 0 gnd-1.sym
+N 36200 54300 36200 54500 4
+N 36200 54500 36600 54500 4
+N 36400 54500 36400 54100 4
+N 36400 54100 36600 54100 4
+C 40300 54000 1 0 1 gnd-1.sym
+N 40200 54300 40200 54500 4
+N 40200 54500 39600 54500 4
+N 39800 54500 39800 54100 4
+N 39800 54100 39600 54100 4
+C 33600 54100 1 0 0 LINREG_1.sym
+{
+T 33600 55100 5 10 1 1 0 0 1
+refdes=U3
+T 34300 55100 5 10 1 1 0 0 1
+footprint=SOT23
+}
+N 34200 55600 34200 55400 4
+C 40000 51100 1 0 1 gnd-1.sym
+N 39900 51400 39900 51700 4
+N 39900 51700 39600 51700 4
+N 39600 52100 40400 52100 4
+N 34600 53900 35200 53900 4
+N 34600 53900 34600 54100 4
+N 40400 52100 40400 55900 4
+N 35000 55900 40400 55900 4
+N 35000 53900 35000 59600 4
+C 40600 51600 1 0 1 gnd-1.sym
+N 39600 53700 40700 53700 4
+N 39600 53300 40700 53300 4
+N 40700 52500 40400 52500 4
+C 40700 51700 1 0 0 connector5-2.sym
+{
+T 41400 54200 5 10 1 1 0 6 1
+refdes=PROG
+T 41000 54150 5 10 0 0 0 0 1
+device=CONNECTOR_5
+T 41000 54350 5 10 0 0 0 0 1
+footprint=GSIP5
+}
+N 39600 52500 40200 52500 4
+N 40200 52500 40200 52900 4
+N 40200 52900 40700 52900 4
+N 40500 51900 40500 52100 4
+N 40700 52100 40500 52100 4
+C 34700 52200 1 0 1 connector2-2.sym
+{
+T 34000 53500 5 10 1 1 0 0 1
+refdes=SWITCH
+T 34400 53450 5 10 0 0 0 6 1
+device=CONNECTOR_2
+T 33600 51950 5 10 1 1 0 0 1
+footprint=TERM_2_5MM
+}
+C 29900 56700 1 0 0 connector2-2.sym
+{
+T 30200 58200 5 10 1 1 0 0 1
+refdes=ACOUT
+T 30200 57950 5 10 0 0 0 0 1
+device=CONNECTOR_2
+T 30200 57950 5 10 1 1 0 0 1
+footprint=TERM_2_5MM
+}
+N 23800 54800 23800 57100 4
+N 23800 57100 29900 57100 4
+N 29900 57500 29400 57500 4
+N 29400 57500 29400 57700 4
+N 25000 56100 25000 56900 4
+N 23600 56900 25000 56900 4
+N 23600 56900 23600 59500 4
+N 23600 59500 29400 59500 4
+N 35000 59600 25700 59600 4
+N 25700 59600 25700 58800 4
+N 25700 58800 25900 58800 4
+N 36600 53700 35400 53700 4
+N 35400 53700 35400 56500 4
+N 28700 56500 35400 56500 4
+C 26300 57500 1 0 1 resistor-1.sym
+{
+T 26000 57900 5 10 0 0 0 6 1
+device=RESISTOR
+T 25500 57700 5 10 1 1 0 6 1
+refdes=R8
+T 25600 57800 5 10 1 1 0 0 1
+footprint=0805
+}
+C 34800 52100 1 0 0 gnd-1.sym
+N 34900 52400 34900 52600 4
+N 34900 52600 34700 52600 4
+N 34700 53000 34900 53000 4
+N 34900 53000 34900 53300 4
+N 34900 53300 36600 53300 4
+C 33700 49700 1 0 0 MB85RC04V.sym
+{
+T 34100 51600 5 10 1 1 0 0 1
+refdes=U6
+T 34800 51600 5 10 1 1 0 0 1
+footprint=SO8
+T 34100 49700 5 10 1 1 0 0 1
+device=MV85RC04V
+}
+C 33400 49600 1 0 0 gnd-1.sym
+N 33500 49900 33500 51300 4
+N 33500 50100 33700 50100 4
+N 35200 51700 35200 53900 4
+N 35200 51700 35800 51700 4
+N 35800 51700 35800 51300 4
+N 35800 51300 35600 51300 4
+N 35600 50100 36200 50100 4
+N 36200 50100 36200 52100 4
+N 36200 52100 36600 52100 4
+N 35600 50500 36100 50500 4
+N 36100 50500 36100 52500 4
+N 36100 52500 36600 52500 4
+N 35600 50900 36000 50900 4
+N 36000 50900 36000 52900 4
+N 36000 52900 36600 52900 4
+N 33500 51300 33700 51300 4
+N 33500 50900 33700 50900 4
+N 33500 50500 33700 50500 4
+N 25700 58400 25900 58400 4
+N 25400 57600 25200 57600 4
+N 25200 57600 25200 57800 4
+N 28700 56500 28700 57600 4
+N 28700 57600 26300 57600 4
+C 40500 51000 1 90 0 capacitor-1.sym
+{
+T 39800 51200 5 10 0 0 90 0 1
+device=CAPACITOR
+T 40400 51200 5 10 1 1 0 0 1
+refdes=C5
+T 39600 51200 5 10 0 0 90 0 1
+symversion=0.1
+T 40400 51000 5 10 1 1 0 0 1
+footprint=0805
+}
+C 40400 50500 1 0 1 gnd-1.sym
+N 40300 50800 40300 51000 4
+N 40300 51900 40300 52100 4
 

file:b/schem/fp/D2PAK.fp (new)
--- /dev/null
+++ b/schem/fp/D2PAK.fp
@@ -1,1 +1,18 @@
+Element["" "" "" "" 74409 59843 0 0 0 100 ""]
+(
+	Pad[-17519 -2953 -17519 2559 35039 2000 37039 "" "1" "square,edge2"]
+	Pad[19489 9842 28937 9842 5118 2000 7118 "" "2" "square,edge2"]
+	Pad[19489 -197 28937 -197 5118 2000 7118 "" "1" "square,edge2"]
+	Pad[19489 -10237 28937 -10237 5118 2000 7118 "" "3" "square,edge2"]
+	ElementLine [-36614 -22048 33071 -22048 1000]
+	ElementLine [-36614 -22048 -36614 21653 1000]
+	ElementLine [-36614 21653 33071 21653 1000]
+	ElementLine [33071 21653 33071 -22048 1000]
 
+	Attribute("author" "DJ Delorie")
+	Attribute("copyright" "2006 DJ Delorie")
+	Attribute("use-license" "Unlimited")
+	Attribute("dist-license" "GPL")
+	)
+
+

file:b/schem/fp/DPAK.fp (new)
--- /dev/null
+++ b/schem/fp/DPAK.fp
@@ -1,1 +1,25 @@
+Element[0x0 "DPAK__On-Semi" "" "" 0 0 11400 -20000 0 100 0x0]
+(
+   Pad[-9000 19550 -9000 25050 6300 2000 8300 "" "1" 0x0100]
+   Pad[9000 19550 9000 25050 6300 2000 8300 "" "3" 0x0100]
+   Pad[0 -800 0 800 22800 2000 24800 "" "4" 0x0100]
+   ElementLine[-12900 13700 12900 13700 1000]
+   ElementLine[12900 13700 12900 -13700 1000]
+   ElementLine[12900 -13700 10400 -13700 1000]
+   ElementLine[10400 -13700 8400 -15700 1000]
+   ElementLine[8400 -15700 -8400 -15700 1000]
+   ElementLine[-8400 -15700 -10400 -13700 1000]
+   ElementLine[-10400 -13700 -12900 -13700 1000]
+   ElementLine[-12900 -13700 -12900 13700 1000]
+   ElementLine[-1000 14200 -1000 19200 2000]
+   ElementLine[-1000 19200 -500 19200 2000]
+   ElementLine[-500 19200 -500 14200 2000]
+   ElementLine[-500 14200 0 14200 2000]
+   ElementLine[0 14200 0 19200 2000]
+   ElementLine[0 19200 500 19200 2000]
+   ElementLine[500 19200 500 14200 2000]
+   ElementLine[500 14200 1000 14200 2000]
+   ElementLine[1000 14200 1000 19200 2000]
+   
+)
 

--- /dev/null
+++ b/schem/fp/FCAPEL.fp
@@ -1,1 +1,14 @@
+Element[0x0 "DCAPEL" "" "" 0 0 6000 -5000 0 100 0x0]
+(
+	Pad[-18000 0 -8000 0 4200 2000 4200 "" "1" 0x00000100]
+	Pad[18000 0 8000 0 4200 2000 4200 "" "2" 0x00000100]
+	ElementLine [16338 16338 16338 3500 1000]
+	ElementLine [16338 -16338 16338 -3500 1000]
+	ElementLine [-16338 8000 -16338 3500 1000]
+	ElementLine [-16338 -8000 -16338 -3500 1000]
+	ElementLine [-16338 8000 -8000 16338 1000]
+	ElementLine [-16338 -8000 -8000 -16338 1000]
+	ElementLine [-8000 16338 16338 16338 1000]
+	ElementLine [-8000 -16338 16338 -16338 1000]
+	)
 

--- /dev/null
+++ b/schem/fp/FUSE_SST.fp
@@ -1,1 +1,6 @@
+Element[0x0 "FUSE_SST" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[10000 -2250 10000 2250 8000 2000 8000 "" "1" 0x0100]
+   Pad[-10000 -2250 -10000 2250 8000 2000 8000 "" "2" 0x0100]
+)
 

file:b/schem/fp/GSIP5.fp (new)
--- /dev/null
+++ b/schem/fp/GSIP5.fp
@@ -1,1 +1,15 @@
+Element(0x00 "Single in line package" "" "SIP5" 160 10 3 100 0x00)
+(
+	Pin(50 50 70 38 "1" 0x101)
+	Pin(50 150 70 38 "2" 0x01)
+	Pin(50 250 70 38 "3" 0x01)
+	Pin(50 350 70 38 "4" 0x01)
+	Pin(50 450 70 38 "5" 0x01)
+	ElementLine(  0 50   0 450 20)
+	ElementLine(100 50 100 450 20)
+	ElementLine(  0 100 100 100 10)
+	ElementArc(50  50 50 50 180 180 20)
+	ElementArc(50 450 50 50   0 180 20)
+	Mark(50 50)
+)
 

file:b/schem/fp/MFP4.fp (new)
--- /dev/null
+++ b/schem/fp/MFP4.fp
@@ -1,1 +1,8 @@
+Element[0x0 "MFP4" "" "" 0 0 6000 -5000 0 100 0x0]
+(
+	Pad[-5000 13200 -5000 12400 3200 3200 3200 "" "1" 0x00000100]
+	Pad[5000 13200 5000 12400 3200 3200 3200 "" "2" 0x00000100]
+	Pad[5000 -13200 5000 -12400 3200 3200 3200 "" "3" 0x00000100]
+	Pad[-5000 -13200 -5000 -12400 3200 3200 3200 "" "4" 0x00000100]
+	)
 

--- /dev/null
+++ b/schem/fp/MICRODIP4.fp
@@ -1,1 +1,13 @@
+Element[0x0 "2220" "" "" 0 0 -14672 -16949 0 100 0x0]
+(
+   Pad[-7874 10236 -7874 12992 3346 2000 3346 "" "1" 0x0100]
+   Pad[7874 10236 7874 12992 3346 2000 3346 "" "2" 0x0100]
+   Pad[-7874 -10236 -7874 -12992 3346 2000 3346 "" "4" 0x0100]
+   Pad[7874 -10236 7874 -12992 3346 1000 3346 "" "3" 0x0100]
 
+
+   ElementLine[-10137 8050 -10137 -8050 1000]
+   ElementLine[10137 8050 10137 -8050 1000]
+
+)
+

--- /dev/null
+++ b/schem/fp/RFD22301.fp
@@ -1,1 +1,26 @@
+Element(0x00000000 "RFduino" "" "RFD22301" 4851 2435 0 0 0 100 0x00000000)
+(
 
+	Pad(-314  50 -214  50 32  32  32 "" "1" 0x00000100)
+	Pad(-314 100 -214 100 32  32  32 "" "2" 0x00000100)
+	Pad(-314 150 -214 150 32  32  32 "" "3" 0x00000100)
+	Pad(-314 200 -214 200 32  32  32 "" "4" 0x00000100)
+	Pad(-314 250 -214 250 32  32  32 "" "5" 0x00000100)
+	Pad(-314 300 -214 300 32  32  32 "" "6" 0x00000100)
+	Pad(-314 350 -214 350 32  32  32 "" "7" 0x00000100)
+	Pad(-314 400 -214 400 32  32  32 "" "8" 0x00000100)
+
+	Pad( 314  50  214  50 32  32  32 "" "19" 0x00000100)
+	Pad( 314 100  214 100 32  32  32 "" "18" 0x00000100)
+	Pad( 314 150  214 150 32  32  32 "" "17" 0x00000100)
+	Pad( 314 200  214 200 32  32  32 "" "16" 0x00000100)
+	Pad( 314 250  214 250 32  32  32 "" "15" 0x00000100)
+	Pad( 314 300  214 300 32  32  32 "" "14" 0x00000100)
+	Pad( 314 350  214 350 32  32  32 "" "13" 0x00000100)
+	Pad( 314 400  214 400 32  32  32 "" "12" 0x00000100)
+	Pad( 314 450  214 450 32  32  32 "" "11" 0x00000100)
+	Pad( 314 500  214 500 32  32  32 "" "10" 0x00000100)
+	Pad( 314 550  214 550 32  32  32 "" "9" 0x00000100)
+)
+
+

--- /dev/null
+++ b/schem/fp/TERM_2_5MM.fp
@@ -1,1 +1,12 @@
 
+Element["" "TERM_2_5MM" "" "TERM_2_5MM" 10342 16888 1000 1000 0 100 ""]
+(
+	Pin[0 0 12000 3000 12000 5700 "" "1" "square,edge2"]
+	Pin[19685 0 12000 3000 12000 5700 "" "2" "edge2"]
+	ElementLine [29527 16388 29527 -16388 1000]
+	ElementLine [-9842 16388 -9842 -16388 1000]
+	ElementLine [-9842 16388 29527 16388 1000]
+	ElementLine [-9842 -16388 29527 -16388 1000]
+
+	)
+

--- /dev/null
+++ b/schem/sym/FODM3053V.sym
@@ -1,1 +1,53 @@
+v 20110115 2
+P 2200 800 1800 800 1 0 0
+{
+T 2200 800 5 10 0 0 0 0 1
+pintype=unknown
+T 1745 795 5 10 1 1 0 6 1
+pinlabel=MT1
+T 1895 845 5 10 1 1 0 0 1
+pinnumber=4
+T 2200 800 5 10 0 0 0 0 1
+pinseq=0
+}
+P 2200 400 1800 400 1 0 0
+{
+T 2200 400 5 10 0 0 0 0 1
+pintype=unknown
+T 1745 395 5 10 1 1 0 6 1
+pinlabel=MT2
+T 1895 445 5 10 1 1 0 0 1
+pinnumber=3
+T 2200 400 5 10 0 0 0 0 1
+pinseq=0
+}
+P 0 800 400 800 1 0 0
+{
+T 0 800 5 10 0 0 0 0 1
+pintype=unknown
+T 455 795 5 10 1 1 0 0 1
+pinlabel=Anode
+T 305 845 5 10 1 1 0 6 1
+pinnumber=1
+T 0 800 5 10 0 0 0 0 1
+pinseq=0
+}
+P 0 400 400 400 1 0 0
+{
+T 0 400 5 10 0 0 0 0 1
+pintype=unknown
+T 455 395 5 10 1 1 0 0 1
+pinlabel=Cathode
+T 305 445 5 10 1 1 0 6 1
+pinnumber=2
+T 0 400 5 10 0 0 0 0 1
+pinseq=0
+}
+B 400 200 1400 800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 795 1100 8 10 1 1 0 0 1
+device=FODM3053V
+T 395 1100 8 10 1 1 0 0 1
+refdes=U?
+T 395 0 8 10 1 1 0 0 1
+footprint=MFP4
 

--- /dev/null
+++ b/schem/sym/LINREG_1.sym
@@ -1,1 +1,38 @@
+v 20130925 2
+P 600 1300 600 900 1 0 0
+{
+T 600 1300 5 10 0 0 0 0 1
+pintype=unknown
+T 600 845 5 10 1 1 90 6 1
+pinlabel=IN
+T 550 995 5 10 1 1 90 0 1
+pinnumber=3
+T 600 1300 5 10 0 0 0 0 1
+pinseq=0
+}
+P 200 0 200 400 1 0 0
+{
+T 200 0 5 10 0 0 180 0 1
+pintype=unknown
+T 200 455 5 10 1 1 90 0 1
+pinlabel=GND
+T 150 305 5 10 1 1 90 6 1
+pinnumber=1
+T 200 0 5 10 0 0 180 0 1
+pinseq=0
+}
+P 1000 0 1000 400 1 0 0
+{
+T 1000 0 5 10 0 0 180 0 1
+pintype=unknown
+T 1000 455 5 10 1 1 90 0 1
+pinlabel=OUT
+T 950 305 5 10 1 1 90 6 1
+pinnumber=2
+T 1000 0 5 10 0 0 180 0 1
+pinseq=0
+}
+B 0 400 1200 500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 0 1000 8 10 1 1 0 0 1
+refdes=U?
 

--- /dev/null
+++ b/schem/sym/MB85RC04V.sym
@@ -1,1 +1,95 @@
+v 20130925 2
+P 0 1600 400 1600 1 0 0
+{
+T 0 1600 5 10 0 0 0 6 1
+pintype=unknown
+T 455 1595 5 10 1 1 0 0 1
+pinlabel=NC
+T 305 1645 5 10 1 1 0 6 1
+pinnumber=1
+T 0 1600 5 10 0 0 0 6 1
+pinseq=0
+}
+P 0 1200 400 1200 1 0 0
+{
+T 0 1200 5 10 0 0 0 6 1
+pintype=unknown
+T 455 1195 5 10 1 1 0 0 1
+pinlabel=A1
+T 305 1245 5 10 1 1 0 6 1
+pinnumber=2
+T 0 1200 5 10 0 0 0 6 1
+pinseq=0
+}
+P 0 800 400 800 1 0 0
+{
+T 0 800 5 10 0 0 0 6 1
+pintype=unknown
+T 455 795 5 10 1 1 0 0 1
+pinlabel=A2
+T 305 845 5 10 1 1 0 6 1
+pinnumber=3
+T 0 800 5 10 0 0 0 6 1
+pinseq=0
+}
+P 0 400 400 400 1 0 0
+{
+T 0 400 5 10 0 0 0 6 1
+pintype=unknown
+T 455 395 5 10 1 1 0 0 1
+pinlabel=VSS
+T 305 445 5 10 1 1 0 6 1
+pinnumber=4
+T 0 400 5 10 0 0 0 6 1
+pinseq=0
+}
+P 1900 1600 1500 1600 1 0 0
+{
+T 1900 1600 5 10 0 0 0 0 1
+pintype=unknown
+T 1600 1700 5 10 1 1 0 0 1
+pinseq=8
+T 1445 1595 5 10 1 1 0 6 1
+pinlabel=VDD
+}
+P 1900 1200 1500 1200 1 0 0
+{
+T 1900 1200 5 10 0 0 0 0 1
+pintype=unknown
+T 1900 1200 5 10 0 0 0 0 1
+pinseq=0
+T 1445 1195 5 10 1 1 0 6 1
+pinlabel=WP
+T 1595 1245 5 10 1 1 0 0 1
+pinnumber=7
+}
+P 1900 800 1500 800 1 0 0
+{
+T 1900 800 5 10 0 0 0 0 1
+pintype=unknown
+T 1900 800 5 10 0 0 0 0 1
+pinseq=0
+T 1445 795 5 10 1 1 0 6 1
+pinlabel=SCL
+T 1595 845 5 10 1 1 0 0 1
+pinnumber=6
+}
+P 1900 400 1500 400 1 0 0
+{
+T 1900 400 5 10 0 0 0 0 1
+pintype=unknown
+T 1900 400 5 10 0 0 0 0 1
+pinseq=0
+T 1445 395 5 10 1 1 0 6 1
+pinlabel=SDA
+T 1595 445 5 10 1 1 0 0 1
+pinnumber=5
+}
+B 400 200 1100 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 400 1900 8 10 1 1 0 0 1
+refdes=U?
+T 1100 1900 8 10 1 1 0 0 1
+footprint=SO8
+T 400 0 8 10 1 1 0 0 1
+device=MV85RC04V