Partialy working modulator, overflow problems
Partialy working modulator, overflow problems

--- a/schem/TNC_Li_Ion/TNC_Li_Ion.pcb
+++ b/schem/TNC_Li_Ion/TNC_Li_Ion.pcb
@@ -6,11 +6,11 @@
 PCB["" 242000 97500]
 
 Grid[500.0 0 0 0]
-Cursor[113000 10500 0.000000]
+Cursor[0 10000 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[600 600 600 600 1300 700]
-Flags("nameonpcb,uniquename,clearnew")
+Flags("nameonpcb,clearnew")
 Groups("1,c:2:3:4:5:6,s:7:8")
 Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
 
@@ -787,12 +787,9 @@
 	SymbolLine[2000 3500 2500 3000 800]
 )
 Attribute("PCB::grid::unit" "mil")
-Via[20500 74000 3600 2000 0 2000 "" "auto"]
 Via[59000 63500 3600 2000 0 2000 "" "auto"]
 Via[53400 58000 3600 2000 0 2000 "" "auto"]
 Via[107500 25150 3600 2000 0 2000 "" "auto"]
-Via[34300 61400 3600 2000 0 2000 "" "auto"]
-Via[138800 9250 3600 2000 0 2000 "" "auto"]
 Via[34300 68000 3600 2000 0 2000 "" "auto"]
 Via[128800 22050 3600 2000 0 2000 "" "auto"]
 Via[9800 29100 3600 2000 0 2000 "" "auto"]
@@ -808,53 +805,58 @@
 Via[90500 28450 3600 2000 0 2000 "" "auto"]
 Via[118300 28450 3600 2000 0 2000 "" "auto"]
 Via[66800 10400 3600 2000 0 2000 "" "auto"]
-Via[151600 79500 3600 2000 0 2000 "" "auto"]
+Via[159500 80500 3600 2000 0 2000 "" "auto"]
 Via[137355 23200 3600 2000 0 2000 "" "auto"]
-Via[205300 54850 3600 2000 0 2000 "" "auto"]
-Via[169350 34000 3600 2000 0 2000 "" "auto"]
 Via[161500 26500 3600 2000 0 2000 "" "auto"]
 Via[132859 76152 3600 2000 0 2000 "" "auto"]
-Via[160945 76152 3600 2000 0 2000 "" "auto"]
+Via[161000 74000 3600 2000 0 2000 "" "auto"]
 Via[133855 57700 3600 2000 0 2000 "" "auto"]
 Via[132200 49452 3600 2000 0 2000 "" "auto"]
 Via[138800 40748 3600 2000 0 2000 "" "auto"]
 Via[166050 10500 3600 2000 0 2000 "" "auto"]
 Via[85900 37448 3600 2000 0 2000 "" "auto"]
-Via[233900 85900 3600 2000 0 2000 "" "auto"]
 Via[113055 67593 3600 2000 0 2000 "" "auto"]
 Via[172500 4000 3600 2000 0 2000 "" "auto"]
 Via[88914 54748 3600 2000 0 2000 "" "auto"]
-Via[186500 16500 3600 2000 0 2000 "" ""]
-Via[186500 50500 3600 2000 0 2000 "" ""]
-Via[47500 42000 3600 2000 0 2000 "" ""]
-Via[57500 39500 3600 2000 0 2000 "" ""]
-Via[70500 27000 3600 2000 0 2000 "" ""]
-Via[223500 87000 3600 2000 0 2000 "" ""]
-Via[193000 52000 3600 2000 0 2000 "" ""]
-Via[204000 44500 3600 2000 0 2000 "" ""]
-Via[197000 39500 3600 2000 0 2000 "" ""]
-Via[197500 47000 3600 2000 0 2000 "" ""]
+Via[46500 41500 3600 2000 0 2000 "" ""]
+Via[55500 37500 3600 2000 0 2000 "" ""]
+Via[66000 26000 3600 2000 0 2000 "" ""]
 Via[197500 30000 3600 2000 0 2000 "" ""]
-
-Element["" "SJ_43515" "AUD" "unknown" 235700 63000 -65200 19500 2 100 ""]
+Via[88500 91000 3600 2000 0 2000 "" ""]
+Via[125000 9000 3600 2000 0 2000 "" ""]
+Via[34300 61400 3600 2000 0 2000 "" "auto"]
+Via[135000 9000 3600 2000 0 2000 "" ""]
+Via[47500 49500 3600 2000 0 2000 "" ""]
+Via[22000 38500 3600 2000 0 2000 "" ""]
+Via[171500 10000 3600 2000 0 2000 "" ""]
+Via[161000 34500 3600 2000 0 2000 "" ""]
+Via[189000 15000 3600 2000 0 2000 "" ""]
+Via[174500 53500 3600 2000 0 2000 "" ""]
+Via[205500 72000 3600 2000 0 2000 "" ""]
+Via[155000 74500 3600 2000 0 2000 "" ""]
+Via[215500 49000 3600 2000 0 2000 "" ""]
+Via[202000 46000 6000 2000 0 3500 "" ""]
+Via[233000 28000 6000 2000 0 3500 "" ""]
+
+Element["" "SJ_43515" "AUD" "unknown" 235500 63500 65200 -19500 0 100 ""]
 (
 	Attribute("device" "CONNECTOR_4")
 	Attribute("manufacturer" "unknown")
 	Attribute("manufacturer_part_number" "unknown")
 	Attribute("vendor" "unknown")
 	Attribute("vendor_part_number" "unknown")
-	Pin[-17700 0 6800 6800 6800 4800 "" "" "edge2"]
-	Pin[-45300 0 6800 6800 6800 4800 "" "" "edge2"]
-	Pad[-2400 13300 -2400 15700 8700 8700 8700 "4" "4" "square,edge2"]
-	Pad[-50400 14600 -50400 14600 11000 11000 11000 "1" "1" "square"]
-	Pad[-20900 -16100 -20900 -13000 7900 7900 7900 "2" "2" "square"]
-	Pad[-13400 13300 -13400 15700 8700 8700 8700 "3" "3" "square,edge2"]
-	Pad[-66500 -3000 -66500 -3000 11000 11000 11000 "" "5" "square"]
-	Pad[-9800 -16100 -9800 -13000 7900 7900 7900 "" "6" "square"]
-
-	)
-
-Element["" "0805" "C4" "unknown" 126000 52043 -3150 14150 1 100 ""]
+	Pin[-17700 0 8800 8800 8800 6800 "" "" "edge2"]
+	Pin[-45300 0 8800 8800 8800 6800 "" "" "edge2"]
+	Pad[-2400 -15700 -2400 -13300 8700 8700 8700 "4" "4" "square"]
+	Pad[-50400 -14600 -50400 -14600 11000 11000 11000 "1" "1" "square"]
+	Pad[-20900 13000 -20900 16100 7900 7900 7900 "2" "2" "square,edge2"]
+	Pad[-13400 -15700 -13400 -13300 8700 8700 8700 "3" "3" "square"]
+	Pad[-66500 3000 -66500 3000 11000 11000 11000 "" "5" "square"]
+	Pad[-9800 13000 -9800 16100 7900 7900 7900 "" "6" "square,edge2"]
+
+	)
+
+Element["" "0805" "C4" "10nF" 126000 52043 -3150 14150 1 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -868,7 +870,7 @@
 
 	)
 
-Element["" "0805" "R4" "unknown" 111957 51957 -3650 14107 1 100 ""]
+Element["" "0805" "R4" "10k" 111957 51957 -3650 14107 1 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -882,7 +884,7 @@
 
 	)
 
-Element["" "0805" "R5" "unknown" 119000 52043 -3150 14150 1 100 ""]
+Element["" "0805" "R5" "10k" 119000 52043 -3150 14150 1 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -896,7 +898,7 @@
 
 	)
 
-Element["" "0805" "R1" "unknown" 121957 70500 8850 -12150 0 100 ""]
+Element["" "0805" "R1" "39k" 121957 70500 8850 -12150 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -910,7 +912,7 @@
 
 	)
 
-Element["" "0805" "R3" "unknown" 140500 64543 -10650 8107 1 100 ""]
+Element["" "0805" "R3" "39k" 140500 64543 -10650 8107 1 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -924,7 +926,7 @@
 
 	)
 
-Element["" "0805" "R6" "unknown" 92457 68000 7936 -3650 0 100 ""]
+Element["" "0805" "R6" "10k" 92457 68000 7936 -3650 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -938,7 +940,7 @@
 
 	)
 
-Element["" "0805" "R7" "unknown" 92457 60500 8350 -3150 0 100 ""]
+Element["" "0805" "R7" "10k" 92457 60500 8350 -3150 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -952,7 +954,7 @@
 
 	)
 
-Element["" "0805" "C2" "unknown" 98500 31543 -3650 -8108 1 100 ""]
+Element["" "0805" "C2" "0.1uF" 98500 31543 -3650 -8108 1 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -966,7 +968,7 @@
 
 	)
 
-Element["" "0805" "C1" "unknown" 91957 76500 -6536 4350 0 100 ""]
+Element["" "0805" "C1" "0.1uF" 92000 77000 -6536 4350 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -980,7 +982,7 @@
 
 	)
 
-Element["" "0805" "C3" "unknown" 141457 47000 2193 9650 2 100 ""]
+Element["" "0805" "C3" "330pF" 141457 47000 2193 9650 2 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -994,7 +996,7 @@
 
 	)
 
-Element["" "0805" "R2" "unknown" 150957 61000 -3693 -11150 0 100 ""]
+Element["" "0805" "R2" "39k" 150957 61000 -3693 -11150 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1038,7 +1040,7 @@
 
 	)
 
-Element["" "0805" "C5" "unknown" 152043 69000 11107 -10193 3 100 ""]
+Element["" "0805" "C5" "1uF" 152043 69000 11107 -10193 3 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1073,7 +1075,7 @@
 
 	)
 
-Element["" "0805" "C6" "unknown" 197000 88000 -2500 2500 0 100 ""]
+Element["" "0805" "C6" "1uF" 197000 88000 -2500 2500 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1149,17 +1151,17 @@
 
 	)
 
-Element["" "0805" "LED1" "unknown" 182500 35043 -3607 7807 0 100 ""]
+Element["" "0805" "LED1" "unknown" 179000 32500 -5000 4000 0 100 ""]
 (
 	Attribute("device" "LED")
 	Attribute("manufacturer" "unknown")
 	Attribute("manufacturer_part_number" "unknown")
 	Attribute("vendor" "unknown")
 	Attribute("vendor_part_number" "unknown")
-	Pad[-393 -3543 393 -3543 5118 2000 5718 "A" "1" "square"]
-	Pad[-393 3543 393 3543 5118 2000 5718 "K" "2" "square"]
-	ElementLine [2755 -393 2755 393 800]
-	ElementLine [-2755 -393 -2755 393 800]
+	Pad[3543 -393 3543 393 5118 2000 5718 "A" "1" "square"]
+	Pad[-3543 -393 -3543 393 5118 2000 5718 "K" "2" "square"]
+	ElementLine [-393 2755 393 2755 800]
+	ElementLine [-393 -2755 393 -2755 800]
 
 	)
 
@@ -1171,8 +1173,8 @@
 	Attribute("vendor" "unknown")
 	Attribute("vendor_part_number" "unknown")
 	Pin[-15700 0 7200 3000 7800 4000 "4" "4" "square,edge2"]
-	Pin[-7900 0 6400 3000 7000 3200 "1" "1" "edge2"]
-	Pin[0 0 6400 3000 7000 3200 "2" "2" "edge2"]
+	Pin[0 0 6400 3000 7000 3200 "1" "1" "edge2"]
+	Pin[-7900 0 6400 3000 7000 3200 "2" "2" "edge2"]
 	Pin[7900 0 6400 3000 7000 3200 "3" "3" "edge2"]
 	Pin[15700 0 7200 3000 7800 4000 "5" "5" "edge2"]
 	ElementLine [-21000 -8500 21000 -8500 2000]
@@ -1190,8 +1192,8 @@
 	Attribute("vendor" "unknown")
 	Attribute("vendor_part_number" "unknown")
 	Pin[-15700 0 7200 3000 7800 4000 "4" "4" "square,edge2"]
-	Pin[-7900 0 6400 3000 7000 3200 "1" "1" "edge2"]
-	Pin[0 0 6400 3000 7000 3200 "2" "2" "edge2"]
+	Pin[0 0 6400 3000 7000 3200 "1" "1" "edge2"]
+	Pin[-7900 0 6400 3000 7000 3200 "2" "2" "edge2"]
 	Pin[7900 0 6400 3000 7000 3200 "3" "3" "edge2"]
 	Pin[15700 0 7200 3000 7800 4000 "5" "5" "edge2"]
 	ElementLine [-21000 -8500 21000 -8500 2000]
@@ -1213,16 +1215,16 @@
 	Pad[0 8700 0 12400 1600 1600 1600 "3" "3" "square,edge2"]
 	Pad[-2600 8700 -2600 12400 1600 1600 1600 "4" "4" "square,edge2"]
 	Pad[-5100 8700 -5100 12400 1600 1600 1600 "5" "5" "square,edge2"]
-	Pad[-13600 10000 -11200 10000 6300 6300 6300 "" "" "square,warn"]
-	Pad[11200 10000 13600 10000 6300 6300 6300 "" "" "square,warn,edge2"]
-	Pad[-4700 0 -4700 0 7400 7400 7400 "" "" "square,warn"]
-	Pad[4700 0 4700 0 7400 7400 7400 "" "" "square,warn,edge2"]
-	Pad[-15000 -200 -15000 200 7100 7100 7100 "" "" "square,warn"]
-	Pad[15000 -200 15000 200 7100 7100 7100 "" "" "square,warn"]
-
-	)
-
-Element["" "0805" "R11" "unknown" 219457 38500 12307 2350 0 100 ""]
+	Pad[-13600 10000 -11200 10000 6300 6300 6300 "" "" "square"]
+	Pad[11200 10000 13600 10000 6300 6300 6300 "" "" "square,edge2"]
+	Pad[-4700 0 -4700 0 7400 7400 7400 "" "" "square"]
+	Pad[4700 0 4700 0 7400 7400 7400 "" "" "square,edge2"]
+	Pad[-15000 -200 -15000 200 7100 7100 7100 "" "" "square"]
+	Pad[15000 -200 15000 200 7100 7100 7100 "" "" "square"]
+
+	)
+
+Element["" "0805" "R11" "2.2k" 219457 38500 12307 2350 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1236,7 +1238,7 @@
 
 	)
 
-Element["" "0805" "R10" "unknown" 175500 35043 -10150 4193 1 100 ""]
+Element["" "0805" "R10" "unknown" 167000 34000 6000 17000 1 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1250,7 +1252,7 @@
 
 	)
 
-Element["" "0805" "R12" "unknown" 192957 8500 -3779 3350 0 100 ""]
+Element["" "0805" "R12" "10k" 192957 8500 -3779 3350 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1264,7 +1266,7 @@
 
 	)
 
-Element["" "0805" "C9" "unknown" 156457 47000 -1193 5350 0 100 ""]
+Element["" "0805" "C9" "4.7uF" 156457 47000 -1193 5350 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1278,7 +1280,7 @@
 
 	)
 
-Element["" "0805" "C8" "unknown" 144957 16000 -5564 -9650 0 100 ""]
+Element["" "0805" "C8" "4.7uF" 144957 16000 -5564 -9650 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1292,7 +1294,7 @@
 
 	)
 
-Element["" "0805" "C7" "unknown" 150457 38500 7764 -4650 0 100 ""]
+Element["" "0805" "C7" "10nF" 150457 38500 7764 -4650 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1369,7 +1371,7 @@
 
 	)
 
-Element["" "0805" "R13" "unknown" 167500 46957 3350 4107 1 100 ""]
+Element["" "0805" "R13" "unknown" 168000 49500 6500 15500 1 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1383,7 +1385,7 @@
 
 	)
 
-Element["" "0805" "R14" "unknown" 198000 80500 -5000 -9500 0 100 ""]
+Element["" "0805" "R14" "100k" 198000 80500 -5000 -9500 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1397,7 +1399,7 @@
 
 	)
 
-Element["" "0805" "R15" "unknown" 211000 88000 -5000 -9000 0 100 ""]
+Element["" "0805" "R15" "10k" 211000 88000 7500 500 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1411,7 +1413,7 @@
 
 	)
 
-Element["" "0805" "R16" "unknown" 76500 32000 -3000 -9500 0 100 ""]
+Element["" "0805" "R16" "1M" 76500 32000 -3000 -9500 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1425,7 +1427,7 @@
 
 	)
 
-Element["" "0805" "R17" "unknown" 62500 32000 -1500 -9000 0 100 ""]
+Element["" "0805" "R17" "1M" 62500 32000 -1500 -9000 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1439,7 +1441,7 @@
 
 	)
 
-Element["" "0805" "C11" "unknown" 219957 27500 1393 2350 0 100 ""]
+Element["" "0805" "C11" "4.7uF" 219957 27500 1393 2350 0 100 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1453,7 +1455,7 @@
 
 	)
 
-Element["" "0805" "R8" "unknown" 17500 26000 -7000 -8500 0 100 ""]
+Element["" "0805" "R8" "10k" 17500 26000 -7000 -8500 0 100 ""]
 (
 	Attribute("device" "RESISTOR")
 	Attribute("manufacturer" "unknown")
@@ -1467,7 +1469,7 @@
 
 	)
 
-Element["" "0805" "C10" "unknown" 195457 21500 -2457 13000 1 105 ""]
+Element["" "0805" "C10" "4.7uF" 195457 21500 -2457 13000 1 105 ""]
 (
 	Attribute("device" "CAPACITOR")
 	Attribute("manufacturer" "unknown")
@@ -1478,22 +1480,6 @@
 	Pad[-3543 -393 -3543 393 5118 2000 5718 "2" "2" "square"]
 	ElementLine [-393 2755 393 2755 800]
 	ElementLine [-393 -2755 393 -2755 800]
-
-	)
-
-Element["onsolder" "BCAAPC" "B1" "unknown" 122000 36000 -113000 33000 2 100 "auto"]
-(
-	Attribute("device" "BATTERY")
-	Attribute("manufacturer" "unknown")
-	Attribute("manufacturer_part_number" "unknown")
-	Attribute("vendor" "unknown")
-	Attribute("vendor_part_number" "unknown")
-	Pin[-110000 0 7200 3000 7800 4000 "+" "1" "square,edge2"]
-	Pin[110000 0 7200 3000 7800 4000 "-" "2" "square,edge2"]
-	ElementLine [-117500 -31500 -117500 31500 2000]
-	ElementLine [117500 -31500 117500 31500 2000]
-	ElementLine [-117500 31500 117500 31500 2000]
-	ElementLine [-117500 -31500 117500 -31500 2000]
 
 	)
 
@@ -1515,7 +1501,7 @@
 	Pad[21400 5000 31400 5000 3200 3200 3200 "GND" "19" "square,edge2"]
 	Pad[21400 10000 31400 10000 3200 3200 3200 "GND" "18" "square,edge2"]
 	Pad[21400 15000 31400 15000 3200 3200 3200 "GPIO1" "17" "square,edge2"]
-	Pad[21400 20000 31400 20000 3200 3200 3200 "GPIO2/AREF" "16" "square,edge2"]
+	Pad[21400 20000 31400 20000 3200 3200 3200 "GPIO0/AREF" "16" "square,edge2"]
 	Pad[21400 25000 31400 25000 3200 3200 3200 "FACTORY" "15" "square,edge2"]
 	Pad[21400 30000 31400 30000 3200 3200 3200 "RESET" "14" "square,edge2"]
 	Pad[21400 35000 31400 35000 3200 3200 3200 "+3V" "13" "square,edge2"]
@@ -1525,11 +1511,25 @@
 	Pad[21400 55000 31400 55000 3200 3200 3200 "GND" "9" "square,edge2"]
 
 	)
+
+Element["onsolder" "BCAAPC" "B1" "unknown" 122000 36000 -113000 33000 2 100 "auto"]
+(
+	Attribute("device" "BATTERY")
+	Attribute("manufacturer" "unknown")
+	Attribute("manufacturer_part_number" "unknown")
+	Attribute("vendor" "unknown")
+	Attribute("vendor_part_number" "unknown")
+	Pin[-110000 0 7200 3000 7800 4000 "+" "1" "square,edge2"]
+	Pin[110000 0 7200 3000 7800 4000 "-" "2" "square,edge2"]
+	ElementLine [-117500 -31500 -117500 31500 2000]
+	ElementLine [117500 -31500 117500 31500 2000]
+	ElementLine [-117500 31500 117500 31500 2000]
+	ElementLine [-117500 -31500 117500 -31500 2000]
+
+	)
 Layer(1 "top")
 (
 	Line[145600 24300 145600 24300 1000 2000 "clearline,auto"]
-	Line[125500 70893 125500 55693 1000 2000 "clearline,auto"]
-	Line[156843 70650 155586 69393 1000 2000 "clearline,auto"]
 	Line[147414 60607 147414 60607 1000 2000 "clearline,auto"]
 	Line[87134 78000 88414 78000 1000 2000 "clearline,auto"]
 	Line[154500 58048 154345 58048 1000 2000 "clearline,auto"]
@@ -1543,12 +1543,9 @@
 	Line[113055 67593 113055 65897 1000 2000 "clearline,auto"]
 	Line[183702 17048 182750 18000 1000 2000 "clearline,auto"]
 	Line[140350 28200 138800 29750 1000 2000 "clearline,auto"]
-	Line[210100 50050 205300 54850 1000 2000 "clearline,auto"]
 	Line[135675 68086 129559 74202 1000 2000 "clearline,auto"]
-	Line[136250 80400 134900 81750 1000 2000 "clearline,auto"]
 	Line[55500 7000 51000 11500 1000 2000 "clearline,auto"]
 	Line[67950 9250 66800 10400 1000 2000 "clearline,auto"]
-	Line[116350 25150 115000 26500 1000 2000 "clearline,auto"]
 	Line[11007 27893 9800 29100 1000 2000 "clearline,auto"]
 	Line[19700 61400 18100 63000 1000 2000 "clearline,auto"]
 	Line[147414 60607 147414 60607 1000 2000 "clearline,auto"]
@@ -1559,8 +1556,6 @@
 	Line[147414 61393 140893 61393 1000 2000 "clearline,auto"]
 	Line[98893 38750 98893 38750 1000 2000 "clearline,auto"]
 	Line[137914 44048 135500 44048 1000 2000 "clearline,auto"]
-	Line[140893 61000 125500 61000 1000 2000 "clearline,auto"]
-	Line[162250 18000 162250 18000 1000 2000 "clearline,auto"]
 	Line[149780 16393 148500 16393 1000 2000 "clearline,auto"]
 	Line[156800 27000 145600 27000 1000 2000 "clearline,auto"]
 	Line[82500 43000 82500 45500 1000 2000 "clearline,auto"]
@@ -1569,49 +1564,29 @@
 	Line[85600 48000 85600 54748 1000 2000 "clearline,auto"]
 	Line[85600 48000 82500 48000 1000 2000 "clearline,auto"]
 	Line[149780 5000 9850 5000 1000 2000 "clearline,auto"]
-	Line[175893 30700 156800 30700 1000 2000 "clearline,auto"]
-	Line[175893 31500 175893 31500 1000 2000 "clearline,auto"]
 	Line[145600 19293 145600 27000 1000 2000 "clearline,auto"]
 	Line[156800 27000 156800 38893 1000 2000 "clearline,auto"]
 	Line[156800 38893 154000 38893 1000 2000 "clearline,auto"]
 	Line[113055 65897 119393 59559 1000 2000 "clearline,auto"]
-	Line[233900 85900 233900 85900 1000 2000 "clearline,auto"]
-	Line[111000 85500 111000 90600 1000 2000 "clearline,auto"]
 	Line[199000 21107 196500 21107 1000 2000 "clearline,auto"]
 	Line[196500 21107 199000 21107 1000 2000 "clearline,auto"]
 	Line[199000 21893 199000 25800 1000 2000 "clearline,auto"]
-	Line[189607 43414 167893 43414 1000 2000 "clearline,auto"]
 	Line[85900 37448 85900 37448 1000 2000 "clearline,auto"]
-	Line[182107 38586 175893 38586 1000 2000 "clearline,auto"]
-	Line[189607 31500 182893 31500 1000 2000 "clearline,auto"]
-	Line[190393 32800 190393 32800 1000 2000 "clearline,auto"]
-	Line[202000 50500 167893 50500 1000 2000 "clearline,auto"]
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 	Line[103100 85500 103100 85500 1000 2000 "clearline,auto"]
-	Line[160945 76152 160945 58150 1000 2000 "clearline,auto"]
 	Line[132859 76152 127198 76152 1000 2000 "clearline,auto"]
 	Line[118900 85500 118900 85500 1000 2000 "clearline,auto"]
-	Line[169350 34000 169350 34000 1000 2000 "clearline,auto"]
-	Line[205300 58150 187450 58150 1000 2000 "clearline,auto"]
-	Line[172650 80400 160650 80400 1000 2000 "clearline,auto"]
 	Line[155700 85500 155700 85500 1000 2000 "clearline,auto"]
 	Line[137355 23200 137355 35448 1000 2000 "clearline,auto"]
 	Line[151600 35448 137355 35448 1000 2000 "clearline,auto"]
-	Line[151600 79500 151600 79500 1000 2000 "clearline,auto"]
 	Line[66800 16000 41000 16000 1000 2000 "clearline,auto"]
 	Line[41000 11500 41000 16000 1000 2000 "clearline,auto"]
 	Line[118300 28450 118300 28450 1000 2000 "clearline,auto"]
@@ -1994,21 +1951,15 @@
 	Line[90748 48800 90748 48800 1000 2000 "clearline,auto"]
 	Line[157645 53248 157645 53248 1000 2000 "clearline,auto"]
 	Line[48800 67100 47500 68400 1000 2000 "clearline,auto"]
-	Line[47500 71300 31000 71300 1000 2000 "clearline,auto"]
-	Line[31000 11500 31000 71300 1000 2000 "clearline,auto"]
-	Line[9800 29100 6900 32000 1000 2000 "clearline,auto"]
 	Line[90500 21850 90500 21850 1000 2000 "clearline,auto"]
 	Line[90500 22100 84050 22100 1000 2000 "clearline,auto"]
 	Line[45500 68000 34300 68000 1000 2000 "clearline,auto"]
 	Line[107500 25150 86250 25150 1000 2000 "clearline,auto"]
 	Line[118300 28450 118300 28450 1000 2000 "clearline,auto"]
-	Line[147800 76700 147800 85500 1000 2000 "clearline,auto"]
 	Line[155700 85350 155700 85500 1000 2000 "clearline,auto"]
 	Line[103100 84200 103100 85500 1000 2000 "clearline,auto"]
-	Line[111000 85500 113055 85500 1000 2000 "clearline,auto"]
 	Line[118900 84450 118900 85500 1000 2000 "clearline,auto"]
 	Line[132200 47348 132200 49452 1000 2000 "clearline,auto"]
-	Line[151600 35448 151600 79500 1000 2000 "clearline,auto"]
 	Line[90748 46300 90748 48800 1000 2000 "clearline,auto"]
 	Line[157645 30300 157645 53248 1000 2000 "clearline,auto"]
 	Line[53400 58000 53400 58000 1000 2000 "clearline,auto"]
@@ -2017,39 +1968,19 @@
 	Line[90500 21850 90500 22100 1000 2000 "clearline,auto"]
 	Line[128800 21850 128800 22050 1000 2000 "clearline,auto"]
 	Line[9800 29100 9800 29100 1000 2000 "clearline,auto"]
-	Line[47500 68400 47500 71300 1000 2000 "clearline,auto"]
 	Line[48800 67100 48800 67100 1000 2000 "clearline,auto"]
 	Line[132100 23205 132100 34148 1000 2000 "clearline,auto"]
 	Line[148450 30300 148450 19900 1000 2000 "clearline,auto"]
 	Line[113800 43055 113800 43055 1000 2000 "clearline,auto"]
 	Line[113800 43055 113800 52752 1000 2000 "clearline,auto"]
 	Line[66800 10400 66800 16000 1000 2000 "clearline,auto"]
-	Line[172650 72950 172650 80400 1000 2000 "clearline,auto"]
-	Line[205300 54850 205300 58150 1000 2000 "clearline,auto"]
-	Line[160945 34000 160945 58150 1000 2000 "clearline,auto"]
-	Line[169350 34000 160945 34000 1000 2000 "clearline,auto"]
-	Line[105000 70398 105000 82300 1000 2000 "clearline,auto"]
 	Line[133855 57700 133855 64293 1000 2000 "clearline,auto"]
 	Line[138800 40748 138800 40748 1000 2000 "clearline,auto"]
-	Line[148300 37448 148300 76200 1000 2000 "clearline,auto"]
-	Line[88914 90600 223500 90600 1000 2000 "clearline,auto"]
-	Line[113055 67593 113055 85500 1000 2000 "clearline,auto"]
-	Line[227750 36000 227750 4200 1000 2000 "clearline,auto"]
-	Line[186500 16500 186500 50500 1000 2000 "clearline"]
 	Line[143400 10248 143400 19800 1000 2000 "clearline"]
 	Line[143400 19800 143500 19900 1000 2000 "clearline"]
 	Line[103000 60993 105607 60993 1000 2000 "clearline"]
 	Line[105607 60993 113800 52800 1000 2000 "clearline"]
-	Line[223500 86500 233300 86500 1000 2000 "clearline"]
-	Line[233900 85900 233300 86500 1000 2000 "clearline"]
 	Line[82800 46500 83000 46300 1000 2000 "clearline"]
-	Line[34300 61400 41850 61400 1000 2000 "clearline"]
-	Line[41850 61400 94000 9250 1000 2000 "clearline"]
-	Line[138800 9250 94000 9250 1000 2000 "clearline"]
-	Line[47500 42000 55000 42000 1000 2000 "clearline"]
-	Line[55000 42000 57500 39500 1000 2000 "clearline"]
-	Line[70500 27000 46000 27000 1000 2000 "clearline"]
-	Line[46000 27000 36000 17000 1000 2000 "clearline"]
 	Line[36000 17000 36000 6000 1000 2000 "clearline"]
 	Line[161000 34000 161000 27000 1000 2000 "clearline"]
 	Line[161000 27000 161500 26500 1000 2000 "clearline"]
@@ -2070,18 +2001,91 @@
 	Line[70000 46500 83000 46500 1000 2000 "clearline"]
 	Line[59000 63500 59000 64500 1000 2000 "clearline"]
 	Line[59000 64500 50000 73500 1000 2000 "clearline"]
-	Line[50000 73500 28500 73500 1000 2000 "clearline"]
-	Polygon("")
-	(
-		[190000 55500] [190000 34500] [206500 34500] [213000 34500] [220500 42000] 
-		[220500 56500] [209500 56500] [209500 50500] [200000 50500] [200000 55500] 
-	)
+	Line[21000 11500 21000 33000 1000 2000 "clearline"]
+	Line[31000 11500 31000 69500 1000 2000 "clearline"]
+	Line[31000 69500 33000 71500 1000 2000 "clearline"]
+	Line[33000 71500 45500 71500 1000 2000 "clearline"]
+	Line[45500 71500 49000 68000 1000 2000 "clearline"]
+	Line[21000 33000 29000 41000 1000 2000 "clearline"]
+	Line[29000 41000 29000 70500 1000 2000 "clearline"]
+	Line[29000 70500 32000 73500 1000 2000 "clearline"]
+	Line[32000 73500 50000 73500 1000 2000 "clearline"]
+	Line[113000 68000 131000 68000 1000 2000 "clearline"]
+	Line[131000 68000 137500 74500 1000 2000 "clearline"]
+	Line[137500 74500 137500 76500 1000 2000 "clearline"]
+	Line[137500 76500 133500 80500 1000 2000 "clearline"]
+	Line[111000 85500 111000 74000 1000 2000 "clearline"]
+	Line[111000 74000 109500 72500 1000 2000 "clearline"]
+	Line[109500 72500 109500 66000 1000 2000 "clearline"]
+	Line[109500 66000 111000 64500 1000 2000 "clearline"]
+	Line[148500 37500 148500 78000 1000 2000 "clearline"]
+	Line[124000 8000 125000 9000 1000 2000 "clearline"]
+	Line[135000 9000 134000 9000 1000 2000 "clearline"]
+	Line[134000 9000 124000 19000 1000 2000 "clearline"]
+	Line[124000 19000 102500 19000 1000 2000 "clearline"]
+	Line[102500 19000 96500 13000 1000 2000 "clearline"]
+	Line[47500 42000 47500 39500 1000 2000 "clearline"]
+	Line[47500 39500 50000 37000 1000 2000 "clearline"]
+	Line[50000 37000 55000 37000 1000 2000 "clearline"]
+	Line[55000 37000 55500 37500 1000 2000 "clearline"]
+	Line[124000 8000 89500 8000 1000 2000 "clearline"]
+	Line[36000 16500 36000 20500 1000 2000 "clearline"]
+	Line[36000 20500 41500 26000 1000 2000 "clearline"]
+	Line[41500 26000 66000 26000 1000 2000 "clearline"]
+	Line[96500 13000 88500 13000 1000 2000 "clearline"]
+	Line[86250 25150 53400 58000 1000 2000 "clearline,auto"]
+	Line[89500 8000 89500 8500 1000 2000 "clearline"]
+	Line[89500 8500 53000 45000 1000 2000 "clearline"]
+	Line[53000 45000 46500 45000 1000 2000 "clearline"]
+	Line[46500 45000 34500 57000 1000 2000 "clearline"]
+	Line[34500 57000 34500 61000 1000 2000 "clearline"]
+	Line[88500 13000 52500 49000 1000 2000 "clearline"]
+	Line[52500 49000 48000 49000 1000 2000 "clearline"]
+	Line[22000 38500 22000 39000 1000 2000 "clearline"]
+	Line[22000 39000 19000 42000 1000 2000 "clearline"]
+	Line[19000 42000 7500 42000 1000 2000 "clearline"]
+	Line[7500 42000 6000 40500 1000 2000 "clearline"]
+	Line[6000 40500 6000 32500 1000 2000 "clearline"]
+	Line[148500 78000 156000 85500 1000 2000 "clearline"]
+	Line[6000 32500 9500 29000 1000 2000 "clearline"]
+	Line[161500 26500 161500 20000 1000 2000 "clearline"]
+	Line[161500 20000 171500 10000 1000 2000 "clearline"]
+	Line[103000 91000 103000 85500 1000 2000 "clearline"]
+	Line[88500 91000 133500 91000 1000 2000 "clearline"]
+	Line[189000 15000 178500 15000 1000 2000 "clearline"]
+	Line[178500 15000 167500 26000 1000 2000 "clearline"]
+	Line[167500 26000 167500 46500 1000 2000 "clearline"]
+	Line[167500 46500 174500 53500 1000 2000 "clearline"]
+	Line[148000 85500 148000 90000 1000 2000 "clearline"]
+	Line[148000 90000 151000 93000 1000 2000 "clearline"]
+	Line[151000 93000 175500 93000 1000 2000 "clearline"]
+	Line[175500 93000 194000 74500 1000 2000 "clearline"]
+	Line[194000 74500 203000 74500 1000 2000 "clearline"]
+	Line[203000 74500 205500 72000 1000 2000 "clearline"]
+	Line[161000 34500 161000 74000 1000 2000 "clearline"]
+	Line[151500 35500 151500 76500 1000 2000 "clearline"]
+	Line[151500 76500 155500 80500 1000 2000 "clearline"]
+	Line[155500 80500 159000 80500 1000 2000 "clearline"]
+	Line[155000 75000 155500 75000 1000 2000 "clearline"]
+	Line[155500 75000 157500 77000 1000 2000 "clearline"]
+	Line[157500 77000 187500 77000 1000 2000 "clearline"]
+	Line[187500 77000 215500 49000 1000 2000 "clearline"]
+	Line[172500 3500 239000 3500 1000 2000 "clearline"]
+	Line[239000 3500 240000 4500 1000 2000 "clearline"]
+	Line[240000 4500 240000 33500 1000 2000 "clearline"]
+	Line[240000 33500 237500 36000 1000 2000 "clearline"]
+	Line[237500 36000 232000 36000 1000 2000 "clearline"]
+	Line[189000 15000 189000 32500 1000 2000 "clearline"]
+	Line[189000 32500 202000 45500 1000 2000 "clearline"]
+	Line[233000 28000 220000 28000 2500 2000 "clearline"]
+	Line[220000 28000 202000 46000 2500 2000 "clearline"]
+	Line[133500 91000 133500 80500 1000 2000 "clearline"]
 )
 Layer(7 "outline")
 (
 	Line[0 0 242000 0 1000 2000 "clearline"]
 	Line[242000 0 242000 97500 1000 2000 "clearline"]
-	Line[0 97500 0 0 1000 2000 "clearline"]
+	Line[0 97500 0 0 1000 2000 "clearline,selected"]
 	Line[0 97500 242000 97500 1000 2000 "clearline"]
 )
 Layer(8 "spare")
@@ -2383,25 +2387,20 @@
 	)
 	Net("unnamed_net5" "(unknown)")
 	(
-		Connect("R8-2")
-		Connect("U1-7")
-	)
-	Net("unnamed_net6" "(unknown)")
-	(
 		Connect("PROG-1")
 		Connect("U1-17")
 	)
-	Net("unnamed_net7" "(unknown)")
+	Net("unnamed_net6" "(unknown)")
 	(
 		Connect("PROG-2")
 		Connect("U1-16")
 	)
-	Net("unnamed_net8" "(unknown)")
+	Net("unnamed_net7" "(unknown)")
 	(
 		Connect("PROG-3")
 		Connect("U1-14")
 	)
-	Net("unnamed_net9" "(unknown)")
+	Net("unnamed_net8" "(unknown)")
 	(
 		Connect("C1-1")
 		Connect("C2-2")
@@ -2412,45 +2411,50 @@
 		Connect("U2-1")
 		Connect("U3-2")
 	)
-	Net("unnamed_net10" "(unknown)")
+	Net("unnamed_net9" "(unknown)")
 	(
 		Connect("C3-1")
 		Connect("R1-1")
 		Connect("U2-3")
 		Connect("U2-7")
 	)
-	Net("unnamed_net11" "(unknown)")
+	Net("unnamed_net10" "(unknown)")
 	(
 		Connect("PROG-6")
 		Connect("U2-4")
 	)
-	Net("unnamed_net12" "(unknown)")
+	Net("unnamed_net11" "(unknown)")
 	(
 		Connect("C4-2")
 		Connect("R4-2")
 		Connect("R5-2")
 		Connect("U2-5")
 	)
-	Net("unnamed_net13" "(unknown)")
+	Net("unnamed_net12" "(unknown)")
 	(
 		Connect("C3-2")
 		Connect("R2-2")
 		Connect("U2-6")
 	)
-	Net("unnamed_net14" "(unknown)")
+	Net("unnamed_net13" "(unknown)")
 	(
 		Connect("PROG-4")
 		Connect("U2-13")
 	)
-	Net("unnamed_net15" "(unknown)")
+	Net("unnamed_net14" "(unknown)")
 	(
 		Connect("PROG-5")
 		Connect("U2-12")
 	)
-	Net("unnamed_net16" "(unknown)")
+	Net("unnamed_net15" "(unknown)")
 	(
 		Connect("R14-2")
 		Connect("R15-2")
+		Connect("U2-11")
+	)
+	Net("unnamed_net16" "(unknown)")
+	(
+		Connect("R8-2")
 		Connect("U2-8")
 	)
 	Net("unnamed_net17" "(unknown)")
@@ -2498,8 +2502,7 @@
 		Connect("C9-2")
 		Connect("S1-3")
 		Connect("U3-3")
-		Connect("U4-5")
-		Connect("U4-6")
+		Connect("U4-3")
 		Connect("U4-7")
 		Connect("U4-8")
 	)
@@ -2535,7 +2538,8 @@
 		Connect("B1-1")
 		Connect("C10-2")
 		Connect("R16-1")
-		Connect("U4-3")
+		Connect("U4-5")
+		Connect("U4-6")
 		Connect("U5-5")
 	)
 	Net("unnamed_net30" "(unknown)")

--- a/schem/TNC_Li_Ion/TNC_Li_Ion.sch
+++ b/schem/TNC_Li_Ion/TNC_Li_Ion.sch
@@ -147,8 +147,7 @@
 N 44700 43300 44500 43300 4
 N 46000 43700 46000 42600 4
 N 46000 42600 45800 42600 4
-N 52200 42900 52600 42900 4
-N 43200 42200 52400 42200 4
+N 43200 42200 52600 42200 4
 C 44900 42500 1 0 0 resistor-1.sym
 {
 T 45200 42900 5 10 0 0 0 0 1
@@ -278,9 +277,7 @@
 N 53900 48400 54500 48400 4
 T 41800 48600 9 10 1 0 0 0 1
 3.3V
-N 52400 42200 52400 42900 4
-N 49300 48300 48600 48300 4
-N 48600 47300 48600 48300 4
+N 52600 42200 52600 44100 4
 C 41200 42000 1 0 0 capacitor-1.sym
 {
 T 41400 42700 5 10 0 0 0 0 1
@@ -413,8 +410,10 @@
 device=RESISTOR
 T 38300 42100 5 10 1 1 0 0 1
 refdes=R10
+T 38300 41700 5 10 1 1 0 0 1
+footprint=0805
 T 38300 41900 5 10 1 1 0 0 1
-footprint=0805
+value=220
 }
 N 37900 41400 37900 41200 4
 N 37900 41200 38800 41200 4
@@ -432,19 +431,16 @@
 T 38300 44100 5 10 1 1 0 0 1
 value=4.7uF
 }
-N 34600 44000 37700 44000 4
+N 34500 44000 37700 44000 4
 N 37500 44000 37500 43300 4
 N 38600 44000 38800 44000 4
 N 34900 46900 34100 46900 4
 N 34100 46900 34100 43300 4
 N 34900 46500 34100 46500 4
 N 38200 48500 39700 48500 4
-N 37700 45700 37700 46900 4
+N 37700 46500 37700 46900 4
 N 37700 46500 37300 46500 4
-N 37300 46100 37700 46100 4
-N 37700 45700 37300 45700 4
-N 34600 44000 34600 46100 4
-N 34600 46100 34900 46100 4
+N 34500 44000 34500 44700 4
 N 34900 45700 34100 45700 4
 C 33700 46700 1 270 0 resistor-1.sym
 {
@@ -479,8 +475,6 @@
 N 38800 47200 38800 47400 4
 N 39500 47400 39500 47700 4
 N 39500 47700 39700 47700 4
-C 39800 45900 1 0 1 gnd-1.sym
-N 39700 46200 39700 46500 4
 N 39300 46500 39300 46300 4
 N 39300 46300 38200 46300 4
 N 38200 46300 38200 48500 4
@@ -532,11 +526,11 @@
 {
 T 46100 47300 5 10 0 0 180 0 1
 device=NPN_TRANSISTOR
+T 45300 47800 5 10 1 1 0 0 1
+refdes=Q1
 T 45300 47600 5 10 1 1 0 0 1
-refdes=Q1
+device=PMBT2222A
 T 45300 47400 5 10 1 1 0 0 1
-device=PMBTA44
-T 45300 47200 5 10 1 1 0 0 1
 footprint=SOT23
 }
 C 46300 48300 1 180 1 gnd-1.sym
@@ -552,7 +546,7 @@
 T 48000 47400 5 10 1 1 0 0 1
 value=10k
 }
-N 48600 47300 48200 47300 4
+N 48400 47300 48200 47300 4
 N 47300 47300 47000 47300 4
 C 46600 45700 1 90 0 diode-1.sym
 {
@@ -628,6 +622,8 @@
 refdes=R13
 T 36100 41000 5 10 1 1 0 0 1
 footprint=0805
+T 36600 41000 5 10 1 1 0 0 1
+value=220
 }
 N 36800 40900 37000 40900 4
 N 34700 43300 34700 43000 4
@@ -705,17 +701,21 @@
 N 44400 45500 44400 49900 4
 N 38200 45500 44400 45500 4
 N 38200 45500 38200 44700 4
-N 34600 44700 38200 44700 4
-C 52500 43000 1 0 0 jumper-1.sym
-{
-T 52800 43500 5 8 0 0 0 0 1
-device=JUMPER
-T 52800 43700 5 10 1 1 0 0 1
-refdes=J1
-T 52800 43400 5 10 1 1 0 0 1
-footprint=0805
-}
-N 52600 43000 52600 42900 4
+N 34500 44700 38200 44700 4
 N 52200 44100 52600 44100 4
-N 52600 44100 52600 44000 4
+N 48400 47300 48400 46300 4
+N 48400 46300 50800 46300 4
+N 50800 46300 50800 42400 4
+N 50800 42400 52400 42400 4
+N 52400 42400 52400 42900 4
+N 52400 42900 52200 42900 4
+C 39800 46000 1 0 1 gnd-1.sym
+N 39700 46300 39700 46500 4
+N 37300 46100 37600 46100 4
+N 37600 46100 37600 44700 4
+N 37300 45700 37600 45700 4
+N 34900 46100 34500 46100 4
+N 34500 46100 34500 47400 4
+N 34500 47400 37700 47400 4
+N 37700 47400 37700 46900 4
 

--- a/schem/fp/SJ_43515.fp
+++ b/schem/fp/SJ_43515.fp
@@ -1,15 +1,15 @@
 Element(0x00000000 "" "" "" 4851 2435 0 0 0 100 0x00000000)
 (
 
-	Pad( 24 -133  24 -157 87  87  87 "" "4" 0x00000100)
-	Pad(504 -146 504 -146 110 110 110 "" "1" 0x00000100)
-	Pad(209  130 209  161  79  79  79 "" "2" 0x00000100)
-	Pad(134 -133 134 -157  87  87  87 "" "3" 0x00000100)
-	Pad(665   30 665   30 110 110 110 "" "5" 0x00000100)
-	Pad( 98  130  98  161  79  79  79 "" "6" 0x00000100)
+	Pad( 24  133  24  157 87  87  87 "" "4" 0x00000100)
+	Pad(504  146 504  146 110 110 110 "" "1" 0x00000100)
+	Pad(209 -130 209 -161  79  79  79 "" "2" 0x00000100)
+	Pad(134  133 134  157  87  87  87 "" "3" 0x00000100)
+	Pad(665  -30 665  -30 110 110 110 "" "5" 0x00000100)
+	Pad( 98 -130  98 -161  79  79  79 "" "6" 0x00000100)
 
-	Pin(177  0  68 68 68  48 "" "" 0x01)
-	Pin(453  0  68 68 68  48 "" "" 0x01)
+	Pin(177  0  88 88 88  68 "" "" 0x01)
+	Pin(453  0  88 88 88  68 "" "" 0x01)
 
 )
 

--- a/schem/fp/SPDT1825232.fp
+++ b/schem/fp/SPDT1825232.fp
@@ -1,7 +1,7 @@
 Element(0x00 "SPDT Switch" "" "SPDT1825232" 160 10 3 100 0x00)
 (
-	Pin(0  -79 64 32 "1" 0x01)
-	Pin(0    0 64 32 "2" 0x01)
+	Pin(0    0 64 32 "1" 0x01)
+	Pin(0  -79 64 32 "2" 0x01)
 	Pin(0   79 64 32 "3" 0x01)
 	Pin(0 -157 72 40 "4" 0x101)
 	Pin(0  157 72 40 "5" 0x01)

--- /dev/null
+++ b/src/BLE_TNC_ADC_DAC.X/.gitignore
@@ -1,1 +1,3 @@
+dist
+bin
 

--- a/src/BLE_TNC_ADC_DAC.X/build/default/production/main.p1
+++ /dev/null
@@ -1,5272 +1,1 @@
-Version 3.2 HI-TECH Software Intermediate Code
-"516 /opt/microchip/xc8/v1.32/include/pic16lf1704.h
-[s S34 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S34 . TMR1IF TMR2IF CCP1IF SSP1IF TXIF RCIF ADIF TMR1GIF ]
-"526
-[s S35 :2 `uc 1 :1 `uc 1 ]
-[n S35 . . CCPIF ]
-"515
-[u S33 `S34 1 `S35 1 ]
-[n S33 . . . ]
-"531
-[v _PIR1bits `VS33 ~T0 @X0 0 e@17 ]
-"3805
-[v _SSP1BUF `Vuc ~T0 @X0 0 e@529 ]
-"1664
-[v _ADRESH `Vuc ~T0 @X0 0 e@156 ]
-"341
-[s S27 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S27 . IOCIF INTF TMR0IF IOCIE INTE TMR0IE PEIE GIE ]
-"351
-[s S28 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]
-[n S28 . . T0IF . T0IE ]
-"340
-[u S26 `S27 1 `S28 1 ]
-[n S26 . . . ]
-"358
-[v _INTCONbits `VS26 ~T0 @X0 0 e@11 ]
-"680
-[v _TMR0 `Vuc ~T0 @X0 0 e@21 ]
-"1689
-[s S91 :1 `uc 1 :1 `uc 1 :5 `uc 1 ]
-[n S91 . ADON GO_nDONE CHS ]
-"1694
-[s S92 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S92 . . ADGO CHS0 CHS1 CHS2 CHS3 CHS4 ]
-"1703
-[s S93 :1 `uc 1 :1 `uc 1 ]
-[n S93 . . GO ]
-"1688
-[u S90 `S91 1 `S92 1 `S93 1 ]
-[n S90 . . . . ]
-"1708
-[v _ADCON0bits `VS90 ~T0 @X0 0 e@157 ]
-[p mainexit ]
-"1513
-[s S82 :2 `uc 1 :1 `uc 1 :4 `uc 1 :1 `uc 1 ]
-[n S82 . SCS . IRCF SPLLEN ]
-"1519
-[s S83 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S83 . SCS0 SCS1 . IRCF0 IRCF1 IRCF2 IRCF3 ]
-"1512
-[u S81 `S82 1 `S83 1 ]
-[n S81 . . . ]
-"1529
-[v _OSCCONbits `VS81 ~T0 @X0 0 e@153 ]
-"1584
-[s S85 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S85 . HFIOFS LFIOFR MFIOFR HFIOFL HFIOFR OSTS PLLR SOSCR ]
-"1583
-[u S84 `S85 1 ]
-[n S84 . . ]
-"1595
-[v _OSCSTATbits `VS84 ~T0 @X0 0 e@154 ]
-"5780
-[s S286 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S286 . SLRA0 SLRA1 SLRA2 . SLRA4 SLRA5 ]
-"5779
-[u S285 `S286 1 ]
-[n S285 . . ]
-"5789
-[v _SLRCONAbits `VS285 ~T0 @X0 0 e@780 ]
-"997
-[s S60 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S60 . TRISA0 TRISA1 TRISA2 . TRISA4 TRISA5 ]
-"996
-[u S59 `S60 1 ]
-[n S59 . . ]
-"1006
-[v _TRISAbits `VS59 ~T0 @X0 0 e@140 ]
-"1861
-[s S101 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S101 . LATA0 LATA1 LATA2 . LATA4 LATA5 ]
-"1860
-[u S100 `S101 1 ]
-[n S100 . . ]
-"1870
-[v _LATAbits `VS100 ~T0 @X0 0 e@268 ]
-"12102
-[v _GIE `Vb ~T0 @X0 0 e@95 ]
-"7764
-[v _PPSLOCK `Vuc ~T0 @X0 0 e@3599 ]
-"8169
-[s S426 :5 `uc 1 ]
-[n S426 . RA5PPS ]
-"8168
-[u S425 `S426 1 ]
-[n S425 . . ]
-"8173
-[v _RA5PPSbits `VS425 ~T0 @X0 0 e@3733 ]
-"7922
-[s S400 :5 `uc 1 ]
-[n S400 . SSPCLKPPS ]
-"7921
-[u S399 `S400 1 ]
-[n S399 . . ]
-"7926
-[v _SSPCLKPPSbits `VS399 ~T0 @X0 0 e@3616 ]
-"7941
-[s S402 :5 `uc 1 ]
-[n S402 . SSPDATPPS ]
-"7940
-[u S401 `S402 1 ]
-[n S401 . . ]
-"7945
-[v _SSPDATPPSbits `VS401 ~T0 @X0 0 e@3617 ]
-"6534
-[s S323 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S323 . OPA2PCH . OPA2UG . OPA2SP OPA2EN ]
-"6542
-[s S324 :1 `uc 1 :1 `uc 1 ]
-[n S324 . OPA2PCH0 OPA2PCH1 ]
-"6533
-[u S322 `S323 1 `S324 1 ]
-[n S322 . . . ]
-"6547
-[v _OPA2CONbits `VS322 ~T0 @X0 0 e@1301 ]
-"1090
-[s S64 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S64 . TMR1IE TMR2IE CCP1IE SSP1IE TXIE RCIE ADIE TMR1GIE ]
-"1100
-[s S65 :2 `uc 1 :1 `uc 1 ]
-[n S65 . . CCPIE ]
-"1089
-[u S63 `S64 1 `S65 1 ]
-[n S63 . . . ]
-"1105
-[v _PIE1bits `VS63 ~T0 @X0 0 e@145 ]
-"2615
-[v _ANSELA `Vuc ~T0 @X0 0 e@396 ]
-"2659
-[v _ANSELC `Vuc ~T0 @X0 0 e@398 ]
-"2621
-[s S133 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S133 . ANSA0 ANSA1 ANSA2 . ANSA4 ANS5 ]
-"2620
-[u S132 `S133 1 ]
-[n S132 . . ]
-"2630
-[v _ANSELAbits `VS132 ~T0 @X0 0 e@396 ]
-"1768
-[s S95 :2 `uc 1 :2 `uc 1 :3 `uc 1 :1 `uc 1 ]
-[n S95 . ADPREF . ADCS ADFM ]
-"1774
-[s S96 :1 `uc 1 :1 `uc 1 ]
-[n S96 . ADPREF0 ADPREF1 ]
-"1767
-[u S94 `S95 1 `S96 1 ]
-[n S94 . . . ]
-"1779
-[v _ADCON1bits `VS94 ~T0 @X0 0 e@158 ]
-"1814
-[s S98 :4 `uc 1 :4 `uc 1 ]
-[n S98 . . TRIGSEL ]
-"1818
-[s S99 :4 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S99 . . TRIGSEL0 TRIGSEL1 TRIGSEL2 TRIGSEL3 ]
-"1813
-[u S97 `S98 1 `S99 1 ]
-[n S97 . . . ]
-"1826
-[v _ADCON2bits `VS97 ~T0 @X0 0 e@159 ]
-"1041
-[s S62 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S62 . TRISC0 TRISC1 TRISC2 TRISC3 TRISC4 TRISC5 ]
-"1040
-[u S61 `S62 1 ]
-[n S61 . . ]
-"1050
-[v _TRISCbits `VS61 ~T0 @X0 0 e@142 ]
-"4575
-[s S231 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S231 . BF UA R_nW S P D_nA CKE SMP ]
-"4574
-[u S230 `S231 1 ]
-[n S230 . . ]
-"4586
-[v _SSP1STATbits `VS230 ~T0 @X0 0 e@532 ]
-"4704
-[s S235 :4 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S235 . SSPM CKP SSPEN SSPOV WCOL ]
-"4711
-[s S236 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S236 . SSPM0 SSPM1 SSPM2 SSPM3 ]
-"4703
-[u S234 `S235 1 `S236 1 ]
-[n S234 . . . ]
-"4718
-[v _SSP1CON1bits `VS234 ~T0 @X0 0 e@533 ]
-"5086
-[s S251 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S251 . DHEN AHEN SBCDE SDAHT BOEN SCIE PCIE ACKTIM ]
-"5085
-[u S250 `S251 1 ]
-[n S250 . . ]
-"5097
-[v _SSP1CON3bits `VS250 ~T0 @X0 0 e@535 ]
-"1260
-[s S71 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S71 . PS PSA TMR0SE TMR0CS INTEDG nWPUEN ]
-"1268
-[s S72 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
-[n S72 . PS0 PS1 PS2 . T0SE T0CS ]
-"1259
-[u S70 `S71 1 `S72 1 ]
-[n S70 . . . ]
-"1277
-[v _OPTION_REGbits `VS70 ~T0 @X0 0 e@149 ]
-[; ;htc.h: 21: extern const char __xc8_OPTIM_SPEED;
-[; ;htc.h: 24: extern void __builtin_software_breakpoint(void);
-[; ;pic16lf1704.h: 47: extern volatile unsigned char INDF0 @ 0x000;
-"49 /opt/microchip/xc8/v1.32/include/pic16lf1704.h
-[; ;pic16lf1704.h: 49: asm("INDF0 equ 00h");
-[; <" INDF0 equ 00h ;# ">
-[; ;pic16lf1704.h: 52: typedef union {
-[; ;pic16lf1704.h: 53: struct {
-[; ;pic16lf1704.h: 54: unsigned INDF0 :8;
-[; ;pic16lf1704.h: 55: };
-[; ;pic16lf1704.h: 56: } INDF0bits_t;
-[; ;pic16lf1704.h: 57: extern volatile INDF0bits_t INDF0bits @ 0x000;
-[; ;pic16lf1704.h: 66: extern volatile unsigned char INDF1 @ 0x001;
-"68
-[; ;pic16lf1704.h: 68: asm("INDF1 equ 01h");
-[; <" INDF1 equ 01h ;# ">
-[; ;pic16lf1704.h: 71: typedef union {
-[; ;pic16lf1704.h: 72: struct {
-[; ;pic16lf1704.h: 73: unsigned INDF1 :8;
-[; ;pic16lf1704.h: 74: };
-[; ;pic16lf1704.h: 75: } INDF1bits_t;
-[; ;pic16lf1704.h: 76: extern volatile INDF1bits_t INDF1bits @ 0x001;
-[; ;pic16lf1704.h: 85: extern volatile unsigned char PCL @ 0x002;
-"87
-[; ;pic16lf1704.h: 87: asm("PCL equ 02h");
-[; <" PCL equ 02h ;# ">
-[; ;pic16lf1704.h: 90: typedef union {
-[; ;pic16lf1704.h: 91: struct {
-[; ;pic16lf1704.h: 92: unsigned PCL :8;
-[; ;pic16lf1704.h: 93: };
-[; ;pic16lf1704.h: 94: } PCLbits_t;
-[; ;pic16lf1704.h: 95: extern volatile PCLbits_t PCLbits @ 0x002;
-[; ;pic16lf1704.h: 104: extern volatile unsigned char STATUS @ 0x003;
-"106
-[; ;pic16lf1704.h: 106: asm("STATUS equ 03h");
-[; <" STATUS equ 03h ;# ">
-[; ;pic16lf1704.h: 109: typedef union {
-[; ;pic16lf1704.h: 110: struct {
-[; ;pic16lf1704.h: 111: unsigned C :1;
-[; ;pic16lf1704.h: 112: unsigned DC :1;
-[; ;pic16lf1704.h: 113: unsigned Z :1;
-[; ;pic16lf1704.h: 114: unsigned nPD :1;
-[; ;pic16lf1704.h: 115: unsigned nTO :1;
-[; ;pic16lf1704.h: 116: };
-[; ;pic16lf1704.h: 117: struct {
-[; ;pic16lf1704.h: 118: unsigned CARRY :1;
-[; ;pic16lf1704.h: 119: };
-[; ;pic16lf1704.h: 120: struct {
-[; ;pic16lf1704.h: 121: unsigned :2;
-[; ;pic16lf1704.h: 122: unsigned ZERO :1;
-[; ;pic16lf1704.h: 123: };
-[; ;pic16lf1704.h: 124: } STATUSbits_t;
-[; ;pic16lf1704.h: 125: extern volatile STATUSbits_t STATUSbits @ 0x003;
-[; ;pic16lf1704.h: 164: extern volatile unsigned short FSR0 @ 0x004;
-[; ;pic16lf1704.h: 167: extern volatile unsigned char FSR0L @ 0x004;
-"169
-[; ;pic16lf1704.h: 169: asm("FSR0L equ 04h");
-[; <" FSR0L equ 04h ;# ">
-[; ;pic16lf1704.h: 172: typedef union {
-[; ;pic16lf1704.h: 173: struct {
-[; ;pic16lf1704.h: 174: unsigned FSR0L :8;
-[; ;pic16lf1704.h: 175: };
-[; ;pic16lf1704.h: 176: } FSR0Lbits_t;
-[; ;pic16lf1704.h: 177: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
-[; ;pic16lf1704.h: 186: extern volatile unsigned char FSR0H @ 0x005;
-"188
-[; ;pic16lf1704.h: 188: asm("FSR0H equ 05h");
-[; <" FSR0H equ 05h ;# ">
-[; ;pic16lf1704.h: 191: typedef union {
-[; ;pic16lf1704.h: 192: struct {
-[; ;pic16lf1704.h: 193: unsigned FSR0H :8;
-[; ;pic16lf1704.h: 194: };
-[; ;pic16lf1704.h: 195: } FSR0Hbits_t;
-[; ;pic16lf1704.h: 196: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
-[; ;pic16lf1704.h: 205: extern volatile unsigned short FSR1 @ 0x006;
-[; ;pic16lf1704.h: 208: extern volatile unsigned char FSR1L @ 0x006;
-"210
-[; ;pic16lf1704.h: 210: asm("FSR1L equ 06h");
-[; <" FSR1L equ 06h ;# ">
-[; ;pic16lf1704.h: 213: typedef union {
-[; ;pic16lf1704.h: 214: struct {
-[; ;pic16lf1704.h: 215: unsigned FSR1L :8;
-[; ;pic16lf1704.h: 216: };
-[; ;pic16lf1704.h: 217: } FSR1Lbits_t;
-[; ;pic16lf1704.h: 218: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
-[; ;pic16lf1704.h: 227: extern volatile unsigned char FSR1H @ 0x007;
-"229
-[; ;pic16lf1704.h: 229: asm("FSR1H equ 07h");
-[; <" FSR1H equ 07h ;# ">
-[; ;pic16lf1704.h: 232: typedef union {
-[; ;pic16lf1704.h: 233: struct {
-[; ;pic16lf1704.h: 234: unsigned FSR1H :8;
-[; ;pic16lf1704.h: 235: };
-[; ;pic16lf1704.h: 236: } FSR1Hbits_t;
-[; ;pic16lf1704.h: 237: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
-[; ;pic16lf1704.h: 246: extern volatile unsigned char BSR @ 0x008;
-"248
-[; ;pic16lf1704.h: 248: asm("BSR equ 08h");
-[; <" BSR equ 08h ;# ">
-[; ;pic16lf1704.h: 251: typedef union {
-[; ;pic16lf1704.h: 252: struct {
-[; ;pic16lf1704.h: 253: unsigned BSR :5;
-[; ;pic16lf1704.h: 254: };
-[; ;pic16lf1704.h: 255: struct {
-[; ;pic16lf1704.h: 256: unsigned BSR0 :1;
-[; ;pic16lf1704.h: 257: unsigned BSR1 :1;
-[; ;pic16lf1704.h: 258: unsigned BSR2 :1;
-[; ;pic16lf1704.h: 259: unsigned BSR3 :1;
-[; ;pic16lf1704.h: 260: unsigned BSR4 :1;
-[; ;pic16lf1704.h: 261: };
-[; ;pic16lf1704.h: 262: } BSRbits_t;
-[; ;pic16lf1704.h: 263: extern volatile BSRbits_t BSRbits @ 0x008;
-[; ;pic16lf1704.h: 297: extern volatile unsigned char WREG @ 0x009;
-"299
-[; ;pic16lf1704.h: 299: asm("WREG equ 09h");
-[; <" WREG equ 09h ;# ">
-[; ;pic16lf1704.h: 302: typedef union {
-[; ;pic16lf1704.h: 303: struct {
-[; ;pic16lf1704.h: 304: unsigned WREG0 :8;
-[; ;pic16lf1704.h: 305: };
-[; ;pic16lf1704.h: 306: } WREGbits_t;
-[; ;pic16lf1704.h: 307: extern volatile WREGbits_t WREGbits @ 0x009;
-[; ;pic16lf1704.h: 316: extern volatile unsigned char PCLATH @ 0x00A;
-"318
-[; ;pic16lf1704.h: 318: asm("PCLATH equ 0Ah");
-[; <" PCLATH equ 0Ah ;# ">
-[; ;pic16lf1704.h: 321: typedef union {
-[; ;pic16lf1704.h: 322: struct {
-[; ;pic16lf1704.h: 323: unsigned PCLATH :7;
-[; ;pic16lf1704.h: 324: };
-[; ;pic16lf1704.h: 325: } PCLATHbits_t;
-[; ;pic16lf1704.h: 326: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
-[; ;pic16lf1704.h: 335: extern volatile unsigned char INTCON @ 0x00B;
-"337
-[; ;pic16lf1704.h: 337: asm("INTCON equ 0Bh");
-[; <" INTCON equ 0Bh ;# ">
-[; ;pic16lf1704.h: 340: typedef union {
-[; ;pic16lf1704.h: 341: struct {
-[; ;pic16lf1704.h: 342: unsigned IOCIF :1;
-[; ;pic16lf1704.h: 343: unsigned INTF :1;
-[; ;pic16lf1704.h: 344: unsigned TMR0IF :1;
-[; ;pic16lf1704.h: 345: unsigned IOCIE :1;
-[; ;pic16lf1704.h: 346: unsigned INTE :1;
-[; ;pic16lf1704.h: 347: unsigned TMR0IE :1;
-[; ;pic16lf1704.h: 348: unsigned PEIE :1;
-[; ;pic16lf1704.h: 349: unsigned GIE :1;
-[; ;pic16lf1704.h: 350: };
-[; ;pic16lf1704.h: 351: struct {
-[; ;pic16lf1704.h: 352: unsigned :2;
-[; ;pic16lf1704.h: 353: unsigned T0IF :1;
-[; ;pic16lf1704.h: 354: unsigned :2;
-[; ;pic16lf1704.h: 355: unsigned T0IE :1;
-[; ;pic16lf1704.h: 356: };
-[; ;pic16lf1704.h: 357: } INTCONbits_t;
-[; ;pic16lf1704.h: 358: extern volatile INTCONbits_t INTCONbits @ 0x00B;
-[; ;pic16lf1704.h: 412: extern volatile unsigned char PORTA @ 0x00C;
-"414
-[; ;pic16lf1704.h: 414: asm("PORTA equ 0Ch");
-[; <" PORTA equ 0Ch ;# ">
-[; ;pic16lf1704.h: 417: typedef union {
-[; ;pic16lf1704.h: 418: struct {
-[; ;pic16lf1704.h: 419: unsigned RA0 :1;
-[; ;pic16lf1704.h: 420: unsigned RA1 :1;
-[; ;pic16lf1704.h: 421: unsigned RA2 :1;
-[; ;pic16lf1704.h: 422: unsigned RA3 :1;
-[; ;pic16lf1704.h: 423: unsigned RA4 :1;
-[; ;pic16lf1704.h: 424: unsigned RA5 :1;
-[; ;pic16lf1704.h: 425: };
-[; ;pic16lf1704.h: 426: } PORTAbits_t;
-[; ;pic16lf1704.h: 427: extern volatile PORTAbits_t PORTAbits @ 0x00C;
-[; ;pic16lf1704.h: 461: extern volatile unsigned char PORTC @ 0x00E;
-"463
-[; ;pic16lf1704.h: 463: asm("PORTC equ 0Eh");
-[; <" PORTC equ 0Eh ;# ">
-[; ;pic16lf1704.h: 466: typedef union {
-[; ;pic16lf1704.h: 467: struct {
-[; ;pic16lf1704.h: 468: unsigned RC0 :1;
-[; ;pic16lf1704.h: 469: unsigned RC1 :1;
-[; ;pic16lf1704.h: 470: unsigned RC2 :1;
-[; ;pic16lf1704.h: 471: unsigned RC3 :1;
-[; ;pic16lf1704.h: 472: unsigned RC4 :1;
-[; ;pic16lf1704.h: 473: unsigned RC5 :1;
-[; ;pic16lf1704.h: 474: };
-[; ;pic16lf1704.h: 475: } PORTCbits_t;
-[; ;pic16lf1704.h: 476: extern volatile PORTCbits_t PORTCbits @ 0x00E;
-[; ;pic16lf1704.h: 510: extern volatile unsigned char PIR1 @ 0x011;
-"512
-[; ;pic16lf1704.h: 512: asm("PIR1 equ 011h");
-[; <" PIR1 equ 011h ;# ">
-[; ;pic16lf1704.h: 515: typedef union {
-[; ;pic16lf1704.h: 516: struct {
-[; ;pic16lf1704.h: 517: unsigned TMR1IF :1;
-[; ;pic16lf1704.h: 518: unsigned TMR2IF :1;
-[; ;pic16lf1704.h: 519: unsigned CCP1IF :1;
-[; ;pic16lf1704.h: 520: unsigned SSP1IF :1;
-[; ;pic16lf1704.h: 521: unsigned TXIF :1;
-[; ;pic16lf1704.h: 522: unsigned RCIF :1;
-[; ;pic16lf1704.h: 523: unsigned ADIF :1;
-[; ;pic16lf1704.h: 524: unsigned TMR1GIF :1;
-[; ;pic16lf1704.h: 525: };
-[; ;pic16lf1704.h: 526: struct {
-[; ;pic16lf1704.h: 527: unsigned :2;
-[; ;pic16lf1704.h: 528: unsigned CCPIF :1;
-[; ;pic16lf1704.h: 529: };
-[; ;pic16lf1704.h: 530: } PIR1bits_t;
-[; ;pic16lf1704.h: 531: extern volatile PIR1bits_t PIR1bits @ 0x011;
-[; ;pic16lf1704.h: 580: extern volatile unsigned char PIR2 @ 0x012;
-"582
-[; ;pic16lf1704.h: 582: asm("PIR2 equ 012h");
-[; <" PIR2 equ 012h ;# ">
-[; ;pic16lf1704.h: 585: typedef union {
-[; ;pic16lf1704.h: 586: struct {
-[; ;pic16lf1704.h: 587: unsigned CCP2IF :1;
-[; ;pic16lf1704.h: 588: unsigned TMR4IF :1;
-[; ;pic16lf1704.h: 589: unsigned TMR6IF :1;
-[; ;pic16lf1704.h: 590: unsigned BCL1IF :1;
-[; ;pic16lf1704.h: 591: unsigned :1;
-[; ;pic16lf1704.h: 592: unsigned C1IF :1;
-[; ;pic16lf1704.h: 593: unsigned C2IF :1;
-[; ;pic16lf1704.h: 594: unsigned OSFIF :1;
-[; ;pic16lf1704.h: 595: };
-[; ;pic16lf1704.h: 596: } PIR2bits_t;
-[; ;pic16lf1704.h: 597: extern volatile PIR2bits_t PIR2bits @ 0x012;
-[; ;pic16lf1704.h: 636: extern volatile unsigned char PIR3 @ 0x013;
-"638
-[; ;pic16lf1704.h: 638: asm("PIR3 equ 013h");
-[; <" PIR3 equ 013h ;# ">
-[; ;pic16lf1704.h: 641: typedef union {
-[; ;pic16lf1704.h: 642: struct {
-[; ;pic16lf1704.h: 643: unsigned CLC1IF :1;
-[; ;pic16lf1704.h: 644: unsigned CLC2IF :1;
-[; ;pic16lf1704.h: 645: unsigned CLC3IF :1;
-[; ;pic16lf1704.h: 646: unsigned :1;
-[; ;pic16lf1704.h: 647: unsigned ZCDIF :1;
-[; ;pic16lf1704.h: 648: unsigned COGIF :1;
-[; ;pic16lf1704.h: 649: };
-[; ;pic16lf1704.h: 650: } PIR3bits_t;
-[; ;pic16lf1704.h: 651: extern volatile PIR3bits_t PIR3bits @ 0x013;
-[; ;pic16lf1704.h: 680: extern volatile unsigned char TMR0 @ 0x015;
-"682
-[; ;pic16lf1704.h: 682: asm("TMR0 equ 015h");
-[; <" TMR0 equ 015h ;# ">
-[; ;pic16lf1704.h: 685: typedef union {
-[; ;pic16lf1704.h: 686: struct {
-[; ;pic16lf1704.h: 687: unsigned TMR0 :8;
-[; ;pic16lf1704.h: 688: };
-[; ;pic16lf1704.h: 689: } TMR0bits_t;
-[; ;pic16lf1704.h: 690: extern volatile TMR0bits_t TMR0bits @ 0x015;
-[; ;pic16lf1704.h: 699: extern volatile unsigned short TMR1 @ 0x016;
-"701
-[; ;pic16lf1704.h: 701: asm("TMR1 equ 016h");
-[; <" TMR1 equ 016h ;# ">
-[; ;pic16lf1704.h: 705: extern volatile unsigned char TMR1L @ 0x016;
-"707
-[; ;pic16lf1704.h: 707: asm("TMR1L equ 016h");
-[; <" TMR1L equ 016h ;# ">
-[; ;pic16lf1704.h: 710: typedef union {
-[; ;pic16lf1704.h: 711: struct {
-[; ;pic16lf1704.h: 712: unsigned TMR1L :8;
-[; ;pic16lf1704.h: 713: };
-[; ;pic16lf1704.h: 714: } TMR1Lbits_t;
-[; ;pic16lf1704.h: 715: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
-[; ;pic16lf1704.h: 724: extern volatile unsigned char TMR1H @ 0x017;
-"726
-[; ;pic16lf1704.h: 726: asm("TMR1H equ 017h");
-[; <" TMR1H equ 017h ;# ">
-[; ;pic16lf1704.h: 729: typedef union {
-[; ;pic16lf1704.h: 730: struct {
-[; ;pic16lf1704.h: 731: unsigned TMR1H :8;
-[; ;pic16lf1704.h: 732: };
-[; ;pic16lf1704.h: 733: } TMR1Hbits_t;
-[; ;pic16lf1704.h: 734: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
-[; ;pic16lf1704.h: 743: extern volatile unsigned char T1CON @ 0x018;
-"745
-[; ;pic16lf1704.h: 745: asm("T1CON equ 018h");
-[; <" T1CON equ 018h ;# ">
-[; ;pic16lf1704.h: 748: typedef union {
-[; ;pic16lf1704.h: 749: struct {
-[; ;pic16lf1704.h: 750: unsigned TMR1ON :1;
-[; ;pic16lf1704.h: 751: unsigned :1;
-[; ;pic16lf1704.h: 752: unsigned nT1SYNC :1;
-[; ;pic16lf1704.h: 753: unsigned T1OSCEN :1;
-[; ;pic16lf1704.h: 754: unsigned T1CKPS :2;
-[; ;pic16lf1704.h: 755: unsigned TMR1CS :2;
-[; ;pic16lf1704.h: 756: };
-[; ;pic16lf1704.h: 757: struct {
-[; ;pic16lf1704.h: 758: unsigned :4;
-[; ;pic16lf1704.h: 759: unsigned T1CKPS0 :1;
-[; ;pic16lf1704.h: 760: unsigned T1CKPS1 :1;
-[; ;pic16lf1704.h: 761: unsigned TMR1CS0 :1;
-[; ;pic16lf1704.h: 762: unsigned TMR1CS1 :1;
-[; ;pic16lf1704.h: 763: };
-[; ;pic16lf1704.h: 764: } T1CONbits_t;
-[; ;pic16lf1704.h: 765: extern volatile T1CONbits_t T1CONbits @ 0x018;
-[; ;pic16lf1704.h: 814: extern volatile unsigned char T1GCON @ 0x019;
-"816
-[; ;pic16lf1704.h: 816: asm("T1GCON equ 019h");
-[; <" T1GCON equ 019h ;# ">
-[; ;pic16lf1704.h: 819: typedef union {
-[; ;pic16lf1704.h: 820: struct {
-[; ;pic16lf1704.h: 821: unsigned T1GSS :2;
-[; ;pic16lf1704.h: 822: unsigned T1GVAL :1;
-[; ;pic16lf1704.h: 823: unsigned T1GGO_nDONE :1;
-[; ;pic16lf1704.h: 824: unsigned T1GSPM :1;
-[; ;pic16lf1704.h: 825: unsigned T1GTM :1;
-[; ;pic16lf1704.h: 826: unsigned T1GPOL :1;
-[; ;pic16lf1704.h: 827: unsigned TMR1GE :1;
-[; ;pic16lf1704.h: 828: };
-[; ;pic16lf1704.h: 829: struct {
-[; ;pic16lf1704.h: 830: unsigned T1GSS0 :1;
-[; ;pic16lf1704.h: 831: unsigned T1GSS1 :1;
-[; ;pic16lf1704.h: 832: };
-[; ;pic16lf1704.h: 833: } T1GCONbits_t;
-[; ;pic16lf1704.h: 834: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
-[; ;pic16lf1704.h: 883: extern volatile unsigned char TMR2 @ 0x01A;
-"885
-[; ;pic16lf1704.h: 885: asm("TMR2 equ 01Ah");
-[; <" TMR2 equ 01Ah ;# ">
-[; ;pic16lf1704.h: 888: typedef union {
-[; ;pic16lf1704.h: 889: struct {
-[; ;pic16lf1704.h: 890: unsigned TMR2 :8;
-[; ;pic16lf1704.h: 891: };
-[; ;pic16lf1704.h: 892: } TMR2bits_t;
-[; ;pic16lf1704.h: 893: extern volatile TMR2bits_t TMR2bits @ 0x01A;
-[; ;pic16lf1704.h: 902: extern volatile unsigned char PR2 @ 0x01B;
-"904
-[; ;pic16lf1704.h: 904: asm("PR2 equ 01Bh");
-[; <" PR2 equ 01Bh ;# ">
-[; ;pic16lf1704.h: 907: typedef union {
-[; ;pic16lf1704.h: 908: struct {
-[; ;pic16lf1704.h: 909: unsigned PR2 :8;
-[; ;pic16lf1704.h: 910: };
-[; ;pic16lf1704.h: 911: } PR2bits_t;
-[; ;pic16lf1704.h: 912: extern volatile PR2bits_t PR2bits @ 0x01B;
-[; ;pic16lf1704.h: 921: extern volatile unsigned char T2CON @ 0x01C;
-"923
-[; ;pic16lf1704.h: 923: asm("T2CON equ 01Ch");
-[; <" T2CON equ 01Ch ;# ">
-[; ;pic16lf1704.h: 926: typedef union {
-[; ;pic16lf1704.h: 927: struct {
-[; ;pic16lf1704.h: 928: unsigned T2CKPS :2;
-[; ;pic16lf1704.h: 929: unsigned TMR2ON :1;
-[; ;pic16lf1704.h: 930: unsigned T2OUTPS :4;
-[; ;pic16lf1704.h: 931: };
-[; ;pic16lf1704.h: 932: struct {
-[; ;pic16lf1704.h: 933: unsigned T2CKPS0 :1;
-[; ;pic16lf1704.h: 934: unsigned T2CKPS1 :1;
-[; ;pic16lf1704.h: 935: unsigned :1;
-[; ;pic16lf1704.h: 936: unsigned T2OUTPS0 :1;
-[; ;pic16lf1704.h: 937: unsigned T2OUTPS1 :1;
-[; ;pic16lf1704.h: 938: unsigned T2OUTPS2 :1;
-[; ;pic16lf1704.h: 939: unsigned T2OUTPS3 :1;
-[; ;pic16lf1704.h: 940: };
-[; ;pic16lf1704.h: 941: } T2CONbits_t;
-[; ;pic16lf1704.h: 942: extern volatile T2CONbits_t T2CONbits @ 0x01C;
-[; ;pic16lf1704.h: 991: extern volatile unsigned char TRISA @ 0x08C;
-"993
-[; ;pic16lf1704.h: 993: asm("TRISA equ 08Ch");
-[; <" TRISA equ 08Ch ;# ">
-[; ;pic16lf1704.h: 996: typedef union {
-[; ;pic16lf1704.h: 997: struct {
-[; ;pic16lf1704.h: 998: unsigned TRISA0 :1;
-[; ;pic16lf1704.h: 999: unsigned TRISA1 :1;
-[; ;pic16lf1704.h: 1000: unsigned TRISA2 :1;
-[; ;pic16lf1704.h: 1001: unsigned :1;
-[; ;pic16lf1704.h: 1002: unsigned TRISA4 :1;
-[; ;pic16lf1704.h: 1003: unsigned TRISA5 :1;
-[; ;pic16lf1704.h: 1004: };
-[; ;pic16lf1704.h: 1005: } TRISAbits_t;
-[; ;pic16lf1704.h: 1006: extern volatile TRISAbits_t TRISAbits @ 0x08C;
-[; ;pic16lf1704.h: 1035: extern volatile unsigned char TRISC @ 0x08E;
-"1037
-[; ;pic16lf1704.h: 1037: asm("TRISC equ 08Eh");
-[; <" TRISC equ 08Eh ;# ">
-[; ;pic16lf1704.h: 1040: typedef union {
-[; ;pic16lf1704.h: 1041: struct {
-[; ;pic16lf1704.h: 1042: unsigned TRISC0 :1;
-[; ;pic16lf1704.h: 1043: unsigned TRISC1 :1;
-[; ;pic16lf1704.h: 1044: unsigned TRISC2 :1;
-[; ;pic16lf1704.h: 1045: unsigned TRISC3 :1;
-[; ;pic16lf1704.h: 1046: unsigned TRISC4 :1;
-[; ;pic16lf1704.h: 1047: unsigned TRISC5 :1;
-[; ;pic16lf1704.h: 1048: };
-[; ;pic16lf1704.h: 1049: } TRISCbits_t;
-[; ;pic16lf1704.h: 1050: extern volatile TRISCbits_t TRISCbits @ 0x08E;
-[; ;pic16lf1704.h: 1084: extern volatile unsigned char PIE1 @ 0x091;
-"1086
-[; ;pic16lf1704.h: 1086: asm("PIE1 equ 091h");
-[; <" PIE1 equ 091h ;# ">
-[; ;pic16lf1704.h: 1089: typedef union {
-[; ;pic16lf1704.h: 1090: struct {
-[; ;pic16lf1704.h: 1091: unsigned TMR1IE :1;
-[; ;pic16lf1704.h: 1092: unsigned TMR2IE :1;
-[; ;pic16lf1704.h: 1093: unsigned CCP1IE :1;
-[; ;pic16lf1704.h: 1094: unsigned SSP1IE :1;
-[; ;pic16lf1704.h: 1095: unsigned TXIE :1;
-[; ;pic16lf1704.h: 1096: unsigned RCIE :1;
-[; ;pic16lf1704.h: 1097: unsigned ADIE :1;
-[; ;pic16lf1704.h: 1098: unsigned TMR1GIE :1;
-[; ;pic16lf1704.h: 1099: };
-[; ;pic16lf1704.h: 1100: struct {
-[; ;pic16lf1704.h: 1101: unsigned :2;
-[; ;pic16lf1704.h: 1102: unsigned CCPIE :1;
-[; ;pic16lf1704.h: 1103: };
-[; ;pic16lf1704.h: 1104: } PIE1bits_t;
-[; ;pic16lf1704.h: 1105: extern volatile PIE1bits_t PIE1bits @ 0x091;
-[; ;pic16lf1704.h: 1154: extern volatile unsigned char PIE2 @ 0x092;
-"1156
-[; ;pic16lf1704.h: 1156: asm("PIE2 equ 092h");
-[; <" PIE2 equ 092h ;# ">
-[; ;pic16lf1704.h: 1159: typedef union {
-[; ;pic16lf1704.h: 1160: struct {
-[; ;pic16lf1704.h: 1161: unsigned CCP2IE :1;
-[; ;pic16lf1704.h: 1162: unsigned TMR4IE :1;
-[; ;pic16lf1704.h: 1163: unsigned TMR6IE :1;
-[; ;pic16lf1704.h: 1164: unsigned BCL1IE :1;
-[; ;pic16lf1704.h: 1165: unsigned :1;
-[; ;pic16lf1704.h: 1166: unsigned C1IE :1;
-[; ;pic16lf1704.h: 1167: unsigned C2IE :1;
-[; ;pic16lf1704.h: 1168: unsigned OSFIE :1;
-[; ;pic16lf1704.h: 1169: };
-[; ;pic16lf1704.h: 1170: } PIE2bits_t;
-[; ;pic16lf1704.h: 1171: extern volatile PIE2bits_t PIE2bits @ 0x092;
-[; ;pic16lf1704.h: 1210: extern volatile unsigned char PIE3 @ 0x093;
-"1212
-[; ;pic16lf1704.h: 1212: asm("PIE3 equ 093h");
-[; <" PIE3 equ 093h ;# ">
-[; ;pic16lf1704.h: 1215: typedef union {
-[; ;pic16lf1704.h: 1216: struct {
-[; ;pic16lf1704.h: 1217: unsigned CLC1IE :1;
-[; ;pic16lf1704.h: 1218: unsigned CLC2IE :1;
-[; ;pic16lf1704.h: 1219: unsigned CLC3IE :1;
-[; ;pic16lf1704.h: 1220: unsigned :1;
-[; ;pic16lf1704.h: 1221: unsigned ZCDIE :1;
-[; ;pic16lf1704.h: 1222: unsigned COGIE :1;
-[; ;pic16lf1704.h: 1223: };
-[; ;pic16lf1704.h: 1224: } PIE3bits_t;
-[; ;pic16lf1704.h: 1225: extern volatile PIE3bits_t PIE3bits @ 0x093;
-[; ;pic16lf1704.h: 1254: extern volatile unsigned char OPTION_REG @ 0x095;
-"1256
-[; ;pic16lf1704.h: 1256: asm("OPTION_REG equ 095h");
-[; <" OPTION_REG equ 095h ;# ">
-[; ;pic16lf1704.h: 1259: typedef union {
-[; ;pic16lf1704.h: 1260: struct {
-[; ;pic16lf1704.h: 1261: unsigned PS :3;
-[; ;pic16lf1704.h: 1262: unsigned PSA :1;
-[; ;pic16lf1704.h: 1263: unsigned TMR0SE :1;
-[; ;pic16lf1704.h: 1264: unsigned TMR0CS :1;
-[; ;pic16lf1704.h: 1265: unsigned INTEDG :1;
-[; ;pic16lf1704.h: 1266: unsigned nWPUEN :1;
-[; ;pic16lf1704.h: 1267: };
-[; ;pic16lf1704.h: 1268: struct {
-[; ;pic16lf1704.h: 1269: unsigned PS0 :1;
-[; ;pic16lf1704.h: 1270: unsigned PS1 :1;
-[; ;pic16lf1704.h: 1271: unsigned PS2 :1;
-[; ;pic16lf1704.h: 1272: unsigned :1;
-[; ;pic16lf1704.h: 1273: unsigned T0SE :1;
-[; ;pic16lf1704.h: 1274: unsigned T0CS :1;
-[; ;pic16lf1704.h: 1275: };
-[; ;pic16lf1704.h: 1276: } OPTION_REGbits_t;
-[; ;pic16lf1704.h: 1277: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
-[; ;pic16lf1704.h: 1336: extern volatile unsigned char PCON @ 0x096;
-"1338
-[; ;pic16lf1704.h: 1338: asm("PCON equ 096h");
-[; <" PCON equ 096h ;# ">
-[; ;pic16lf1704.h: 1341: typedef union {
-[; ;pic16lf1704.h: 1342: struct {
-[; ;pic16lf1704.h: 1343: unsigned nBOR :1;
-[; ;pic16lf1704.h: 1344: unsigned nPOR :1;
-[; ;pic16lf1704.h: 1345: unsigned nRI :1;
-[; ;pic16lf1704.h: 1346: unsigned nRMCLR :1;
-[; ;pic16lf1704.h: 1347: unsigned nRWDT :1;
-[; ;pic16lf1704.h: 1348: unsigned :1;
-[; ;pic16lf1704.h: 1349: unsigned STKUNF :1;
-[; ;pic16lf1704.h: 1350: unsigned STKOVF :1;
-[; ;pic16lf1704.h: 1351: };
-[; ;pic16lf1704.h: 1352: } PCONbits_t;
-[; ;pic16lf1704.h: 1353: extern volatile PCONbits_t PCONbits @ 0x096;
-[; ;pic16lf1704.h: 1392: extern volatile unsigned char WDTCON @ 0x097;
-"1394
-[; ;pic16lf1704.h: 1394: asm("WDTCON equ 097h");
-[; <" WDTCON equ 097h ;# ">
-[; ;pic16lf1704.h: 1397: typedef union {
-[; ;pic16lf1704.h: 1398: struct {
-[; ;pic16lf1704.h: 1399: unsigned SWDTEN :1;
-[; ;pic16lf1704.h: 1400: unsigned WDTPS :5;
-[; ;pic16lf1704.h: 1401: };
-[; ;pic16lf1704.h: 1402: struct {
-[; ;pic16lf1704.h: 1403: unsigned :1;
-[; ;pic16lf1704.h: 1404: unsigned WDTPS0 :1;
-[; ;pic16lf1704.h: 1405: unsigned WDTPS1 :1;
-[; ;pic16lf1704.h: 1406: unsigned WDTPS2 :1;
-[; ;pic16lf1704.h: 1407: unsigned WDTPS3 :1;
-[; ;pic16lf1704.h: 1408: unsigned WDTPS4 :1;
-[; ;pic16lf1704.h: 1409: };
-[; ;pic16lf1704.h: 1410: } WDTCONbits_t;
-[; ;pic16lf1704.h: 1411: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
-[; ;pic16lf1704.h: 1450: extern volatile unsigned char OSCTUNE @ 0x098;
-"1452
-[; ;pic16lf1704.h: 1452: asm("OSCTUNE equ 098h");
-[; <" OSCTUNE equ 098h ;# ">
-[; ;pic16lf1704.h: 1455: typedef union {
-[; ;pic16lf1704.h: 1456: struct {
-[; ;pic16lf1704.h: 1457: unsigned TUN :6;
-[; ;pic16lf1704.h: 1458: };
-[; ;pic16lf1704.h: 1459: struct {
-[; ;pic16lf1704.h: 1460: unsigned TUN0 :1;
-[; ;pic16lf1704.h: 1461: unsigned TUN1 :1;
-[; ;pic16lf1704.h: 1462: unsigned TUN2 :1;
-[; ;pic16lf1704.h: 1463: unsigned TUN3 :1;
-[; ;pic16lf1704.h: 1464: unsigned TUN4 :1;
-[; ;pic16lf1704.h: 1465: unsigned TUN5 :1;
-[; ;pic16lf1704.h: 1466: };
-[; ;pic16lf1704.h: 1467: } OSCTUNEbits_t;
-[; ;pic16lf1704.h: 1468: extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
-[; ;pic16lf1704.h: 1507: extern volatile unsigned char OSCCON @ 0x099;
-"1509
-[; ;pic16lf1704.h: 1509: asm("OSCCON equ 099h");
-[; <" OSCCON equ 099h ;# ">
-[; ;pic16lf1704.h: 1512: typedef union {
-[; ;pic16lf1704.h: 1513: struct {
-[; ;pic16lf1704.h: 1514: unsigned SCS :2;
-[; ;pic16lf1704.h: 1515: unsigned :1;
-[; ;pic16lf1704.h: 1516: unsigned IRCF :4;
-[; ;pic16lf1704.h: 1517: unsigned SPLLEN :1;
-[; ;pic16lf1704.h: 1518: };
-[; ;pic16lf1704.h: 1519: struct {
-[; ;pic16lf1704.h: 1520: unsigned SCS0 :1;
-[; ;pic16lf1704.h: 1521: unsigned SCS1 :1;
-[; ;pic16lf1704.h: 1522: unsigned :1;
-[; ;pic16lf1704.h: 1523: unsigned IRCF0 :1;
-[; ;pic16lf1704.h: 1524: unsigned IRCF1 :1;
-[; ;pic16lf1704.h: 1525: unsigned IRCF2 :1;
-[; ;pic16lf1704.h: 1526: unsigned IRCF3 :1;
-[; ;pic16lf1704.h: 1527: };
-[; ;pic16lf1704.h: 1528: } OSCCONbits_t;
-[; ;pic16lf1704.h: 1529: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
-[; ;pic16lf1704.h: 1578: extern volatile unsigned char OSCSTAT @ 0x09A;
-"1580
-[; ;pic16lf1704.h: 1580: asm("OSCSTAT equ 09Ah");
-[; <" OSCSTAT equ 09Ah ;# ">
-[; ;pic16lf1704.h: 1583: typedef union {
-[; ;pic16lf1704.h: 1584: struct {
-[; ;pic16lf1704.h: 1585: unsigned HFIOFS :1;
-[; ;pic16lf1704.h: 1586: unsigned LFIOFR :1;
-[; ;pic16lf1704.h: 1587: unsigned MFIOFR :1;
-[; ;pic16lf1704.h: 1588: unsigned HFIOFL :1;
-[; ;pic16lf1704.h: 1589: unsigned HFIOFR :1;
-[; ;pic16lf1704.h: 1590: unsigned OSTS :1;
-[; ;pic16lf1704.h: 1591: unsigned PLLR :1;
-[; ;pic16lf1704.h: 1592: unsigned SOSCR :1;
-[; ;pic16lf1704.h: 1593: };
-[; ;pic16lf1704.h: 1594: } OSCSTATbits_t;
-[; ;pic16lf1704.h: 1595: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
-[; ;pic16lf1704.h: 1639: extern volatile unsigned short ADRES @ 0x09B;
-"1641
-[; ;pic16lf1704.h: 1641: asm("ADRES equ 09Bh");
-[; <" ADRES equ 09Bh ;# ">
-[; ;pic16lf1704.h: 1645: extern volatile unsigned char ADRESL @ 0x09B;
-"1647
-[; ;pic16lf1704.h: 1647: asm("ADRESL equ 09Bh");
-[; <" ADRESL equ 09Bh ;# ">
-[; ;pic16lf1704.h: 1650: typedef union {
-[; ;pic16lf1704.h: 1651: struct {
-[; ;pic16lf1704.h: 1652: unsigned ADRESL :8;
-[; ;pic16lf1704.h: 1653: };
-[; ;pic16lf1704.h: 1654: } ADRESLbits_t;
-[; ;pic16lf1704.h: 1655: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
-[; ;pic16lf1704.h: 1664: extern volatile unsigned char ADRESH @ 0x09C;
-"1666
-[; ;pic16lf1704.h: 1666: asm("ADRESH equ 09Ch");
-[; <" ADRESH equ 09Ch ;# ">
-[; ;pic16lf1704.h: 1669: typedef union {
-[; ;pic16lf1704.h: 1670: struct {
-[; ;pic16lf1704.h: 1671: unsigned ADRESH :8;
-[; ;pic16lf1704.h: 1672: };
-[; ;pic16lf1704.h: 1673: } ADRESHbits_t;
-[; ;pic16lf1704.h: 1674: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
-[; ;pic16lf1704.h: 1683: extern volatile unsigned char ADCON0 @ 0x09D;
-"1685
-[; ;pic16lf1704.h: 1685: asm("ADCON0 equ 09Dh");
-[; <" ADCON0 equ 09Dh ;# ">
-[; ;pic16lf1704.h: 1688: typedef union {
-[; ;pic16lf1704.h: 1689: struct {
-[; ;pic16lf1704.h: 1690: unsigned ADON :1;
-[; ;pic16lf1704.h: 1691: unsigned GO_nDONE :1;
-[; ;pic16lf1704.h: 1692: unsigned CHS :5;
-[; ;pic16lf1704.h: 1693: };
-[; ;pic16lf1704.h: 1694: struct {
-[; ;pic16lf1704.h: 1695: unsigned :1;
-[; ;pic16lf1704.h: 1696: unsigned ADGO :1;
-[; ;pic16lf1704.h: 1697: unsigned CHS0 :1;
-[; ;pic16lf1704.h: 1698: unsigned CHS1 :1;
-[; ;pic16lf1704.h: 1699: unsigned CHS2 :1;
-[; ;pic16lf1704.h: 1700: unsigned CHS3 :1;
-[; ;pic16lf1704.h: 1701: unsigned CHS4 :1;
-[; ;pic16lf1704.h: 1702: };
-[; ;pic16lf1704.h: 1703: struct {
-[; ;pic16lf1704.h: 1704: unsigned :1;
-[; ;pic16lf1704.h: 1705: unsigned GO :1;
-[; ;pic16lf1704.h: 1706: };
-[; ;pic16lf1704.h: 1707: } ADCON0bits_t;
-[; ;pic16lf1704.h: 1708: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
-[; ;pic16lf1704.h: 1762: extern volatile unsigned char ADCON1 @ 0x09E;
-"1764
-[; ;pic16lf1704.h: 1764: asm("ADCON1 equ 09Eh");
-[; <" ADCON1 equ 09Eh ;# ">
-[; ;pic16lf1704.h: 1767: typedef union {
-[; ;pic16lf1704.h: 1768: struct {
-[; ;pic16lf1704.h: 1769: unsigned ADPREF :2;
-[; ;pic16lf1704.h: 1770: unsigned :2;
-[; ;pic16lf1704.h: 1771: unsigned ADCS :3;
-[; ;pic16lf1704.h: 1772: unsigned ADFM :1;
-[; ;pic16lf1704.h: 1773: };
-[; ;pic16lf1704.h: 1774: struct {
-[; ;pic16lf1704.h: 1775: unsigned ADPREF0 :1;
-[; ;pic16lf1704.h: 1776: unsigned ADPREF1 :1;
-[; ;pic16lf1704.h: 1777: };
-[; ;pic16lf1704.h: 1778: } ADCON1bits_t;
-[; ;pic16lf1704.h: 1779: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
-[; ;pic16lf1704.h: 1808: extern volatile unsigned char ADCON2 @ 0x09F;
-"1810
-[; ;pic16lf1704.h: 1810: asm("ADCON2 equ 09Fh");
-[; <" ADCON2 equ 09Fh ;# ">
-[; ;pic16lf1704.h: 1813: typedef union {
-[; ;pic16lf1704.h: 1814: struct {
-[; ;pic16lf1704.h: 1815: unsigned :4;
-[; ;pic16lf1704.h: 1816: unsigned TRIGSEL :4;
-[; ;pic16lf1704.h: 1817: };
-[; ;pic16lf1704.h: 1818: struct {
-[; ;pic16lf1704.h: 1819: unsigned :4;
-[; ;pic16lf1704.h: 1820: unsigned TRIGSEL0 :1;
-[; ;pic16lf1704.h: 1821: unsigned TRIGSEL1 :1;
-[; ;pic16lf1704.h: 1822: unsigned TRIGSEL2 :1;
-[; ;pic16lf1704.h: 1823: unsigned TRIGSEL3 :1;
-[; ;pic16lf1704.h: 1824: };
-[; ;pic16lf1704.h: 1825: } ADCON2bits_t;
-[; ;pic16lf1704.h: 1826: extern volatile ADCON2bits_t ADCON2bits @ 0x09F;
-[; ;pic16lf1704.h: 1855: extern volatile unsigned char LATA @ 0x10C;
-"1857
-[; ;pic16lf1704.h: 1857: asm("LATA equ 010Ch");
-[; <" LATA equ 010Ch ;# ">
-[; ;pic16lf1704.h: 1860: typedef union {
-[; ;pic16lf1704.h: 1861: struct {
-[; ;pic16lf1704.h: 1862: unsigned LATA0 :1;
-[; ;pic16lf1704.h: 1863: unsigned LATA1 :1;
-[; ;pic16lf1704.h: 1864: unsigned LATA2 :1;
-[; ;pic16lf1704.h: 1865: unsigned :1;
-[; ;pic16lf1704.h: 1866: unsigned LATA4 :1;
-[; ;pic16lf1704.h: 1867: unsigned LATA5 :1;
-[; ;pic16lf1704.h: 1868: };
-[; ;pic16lf1704.h: 1869: } LATAbits_t;
-[; ;pic16lf1704.h: 1870: extern volatile LATAbits_t LATAbits @ 0x10C;
-[; ;pic16lf1704.h: 1899: extern volatile unsigned char LATC @ 0x10E;
-"1901
-[; ;pic16lf1704.h: 1901: asm("LATC equ 010Eh");
-[; <" LATC equ 010Eh ;# ">
-[; ;pic16lf1704.h: 1904: typedef union {
-[; ;pic16lf1704.h: 1905: struct {
-[; ;pic16lf1704.h: 1906: unsigned LATC0 :1;
-[; ;pic16lf1704.h: 1907: unsigned LATC1 :1;
-[; ;pic16lf1704.h: 1908: unsigned LATC2 :1;
-[; ;pic16lf1704.h: 1909: unsigned LATC3 :1;
-[; ;pic16lf1704.h: 1910: unsigned LATC4 :1;
-[; ;pic16lf1704.h: 1911: unsigned LATC5 :1;
-[; ;pic16lf1704.h: 1912: };
-[; ;pic16lf1704.h: 1913: } LATCbits_t;
-[; ;pic16lf1704.h: 1914: extern volatile LATCbits_t LATCbits @ 0x10E;
-[; ;pic16lf1704.h: 1948: extern volatile unsigned char CM1CON0 @ 0x111;
-"1950
-[; ;pic16lf1704.h: 1950: asm("CM1CON0 equ 0111h");
-[; <" CM1CON0 equ 0111h ;# ">
-[; ;pic16lf1704.h: 1953: typedef union {
-[; ;pic16lf1704.h: 1954: struct {
-[; ;pic16lf1704.h: 1955: unsigned C1SYNC :1;
-[; ;pic16lf1704.h: 1956: unsigned C1HYS :1;
-[; ;pic16lf1704.h: 1957: unsigned C1SP :1;
-[; ;pic16lf1704.h: 1958: unsigned C1ZLF :1;
-[; ;pic16lf1704.h: 1959: unsigned C1POL :1;
-[; ;pic16lf1704.h: 1960: unsigned :1;
-[; ;pic16lf1704.h: 1961: unsigned C1OUT :1;
-[; ;pic16lf1704.h: 1962: unsigned C1ON :1;
-[; ;pic16lf1704.h: 1963: };
-[; ;pic16lf1704.h: 1964: } CM1CON0bits_t;
-[; ;pic16lf1704.h: 1965: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
-[; ;pic16lf1704.h: 2004: extern volatile unsigned char CM1CON1 @ 0x112;
-"2006
-[; ;pic16lf1704.h: 2006: asm("CM1CON1 equ 0112h");
-[; <" CM1CON1 equ 0112h ;# ">
-[; ;pic16lf1704.h: 2009: typedef union {
-[; ;pic16lf1704.h: 2010: struct {
-[; ;pic16lf1704.h: 2011: unsigned C1NCH :3;
-[; ;pic16lf1704.h: 2012: unsigned C1PCH :3;
-[; ;pic16lf1704.h: 2013: unsigned C1INTN :1;
-[; ;pic16lf1704.h: 2014: unsigned C1INTP :1;
-[; ;pic16lf1704.h: 2015: };
-[; ;pic16lf1704.h: 2016: struct {
-[; ;pic16lf1704.h: 2017: unsigned C1NCH0 :1;
-[; ;pic16lf1704.h: 2018: unsigned C1NCH1 :1;
-[; ;pic16lf1704.h: 2019: unsigned C1NCH2 :1;
-[; ;pic16lf1704.h: 2020: unsigned C1PCH0 :1;
-[; ;pic16lf1704.h: 2021: unsigned C1PCH1 :1;
-[; ;pic16lf1704.h: 2022: unsigned C1PCH2 :1;
-[; ;pic16lf1704.h: 2023: };
-[; ;pic16lf1704.h: 2024: } CM1CON1bits_t;
-[; ;pic16lf1704.h: 2025: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
-[; ;pic16lf1704.h: 2079: extern volatile unsigned char CM2CON0 @ 0x113;
-"2081
-[; ;pic16lf1704.h: 2081: asm("CM2CON0 equ 0113h");
-[; <" CM2CON0 equ 0113h ;# ">
-[; ;pic16lf1704.h: 2084: typedef union {
-[; ;pic16lf1704.h: 2085: struct {
-[; ;pic16lf1704.h: 2086: unsigned C2SYNC :1;
-[; ;pic16lf1704.h: 2087: unsigned C2HYS :1;
-[; ;pic16lf1704.h: 2088: unsigned C2SP :1;
-[; ;pic16lf1704.h: 2089: unsigned C2ZLF :1;
-[; ;pic16lf1704.h: 2090: unsigned C2POL :1;
-[; ;pic16lf1704.h: 2091: unsigned :1;
-[; ;pic16lf1704.h: 2092: unsigned C2OUT :1;
-[; ;pic16lf1704.h: 2093: unsigned C2ON :1;
-[; ;pic16lf1704.h: 2094: };
-[; ;pic16lf1704.h: 2095: } CM2CON0bits_t;
-[; ;pic16lf1704.h: 2096: extern volatile CM2CON0bits_t CM2CON0bits @ 0x113;
-[; ;pic16lf1704.h: 2135: extern volatile unsigned char CM2CON1 @ 0x114;
-"2137
-[; ;pic16lf1704.h: 2137: asm("CM2CON1 equ 0114h");
-[; <" CM2CON1 equ 0114h ;# ">
-[; ;pic16lf1704.h: 2140: typedef union {
-[; ;pic16lf1704.h: 2141: struct {
-[; ;pic16lf1704.h: 2142: unsigned C2NCH :3;
-[; ;pic16lf1704.h: 2143: unsigned C2PCH :3;
-[; ;pic16lf1704.h: 2144: unsigned C2INTN :1;
-[; ;pic16lf1704.h: 2145: unsigned C2INTP :1;
-[; ;pic16lf1704.h: 2146: };
-[; ;pic16lf1704.h: 2147: struct {
-[; ;pic16lf1704.h: 2148: unsigned C2NCH0 :1;
-[; ;pic16lf1704.h: 2149: unsigned C2NCH1 :1;
-[; ;pic16lf1704.h: 2150: unsigned C2NCH2 :1;
-[; ;pic16lf1704.h: 2151: unsigned C2PCH0 :1;
-[; ;pic16lf1704.h: 2152: unsigned C2PCH1 :1;
-[; ;pic16lf1704.h: 2153: unsigned C2PCH2 :1;
-[; ;pic16lf1704.h: 2154: };
-[; ;pic16lf1704.h: 2155: } CM2CON1bits_t;
-[; ;pic16lf1704.h: 2156: extern volatile CM2CON1bits_t CM2CON1bits @ 0x114;
-[; ;pic16lf1704.h: 2210: extern volatile unsigned char CMOUT @ 0x115;
-"2212
-[; ;pic16lf1704.h: 2212: asm("CMOUT equ 0115h");
-[; <" CMOUT equ 0115h ;# ">
-[; ;pic16lf1704.h: 2215: typedef union {
-[; ;pic16lf1704.h: 2216: struct {
-[; ;pic16lf1704.h: 2217: unsigned MC1OUT :1;
-[; ;pic16lf1704.h: 2218: unsigned MC2OUT :1;
-[; ;pic16lf1704.h: 2219: };
-[; ;pic16lf1704.h: 2220: } CMOUTbits_t;
-[; ;pic16lf1704.h: 2221: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
-[; ;pic16lf1704.h: 2235: extern volatile unsigned char BORCON @ 0x116;
-"2237
-[; ;pic16lf1704.h: 2237: asm("BORCON equ 0116h");
-[; <" BORCON equ 0116h ;# ">
-[; ;pic16lf1704.h: 2240: typedef union {
-[; ;pic16lf1704.h: 2241: struct {
-[; ;pic16lf1704.h: 2242: unsigned BORRDY :1;
-[; ;pic16lf1704.h: 2243: unsigned :5;
-[; ;pic16lf1704.h: 2244: unsigned BORFS :1;
-[; ;pic16lf1704.h: 2245: unsigned SBOREN :1;
-[; ;pic16lf1704.h: 2246: };
-[; ;pic16lf1704.h: 2247: } BORCONbits_t;
-[; ;pic16lf1704.h: 2248: extern volatile BORCONbits_t BORCONbits @ 0x116;
-[; ;pic16lf1704.h: 2267: extern volatile unsigned char FVRCON @ 0x117;
-"2269
-[; ;pic16lf1704.h: 2269: asm("FVRCON equ 0117h");
-[; <" FVRCON equ 0117h ;# ">
-[; ;pic16lf1704.h: 2272: typedef union {
-[; ;pic16lf1704.h: 2273: struct {
-[; ;pic16lf1704.h: 2274: unsigned ADFVR :2;
-[; ;pic16lf1704.h: 2275: unsigned CDAFVR :2;
-[; ;pic16lf1704.h: 2276: unsigned TSRNG :1;
-[; ;pic16lf1704.h: 2277: unsigned TSEN :1;
-[; ;pic16lf1704.h: 2278: unsigned FVRRDY :1;
-[; ;pic16lf1704.h: 2279: unsigned FVREN :1;
-[; ;pic16lf1704.h: 2280: };
-[; ;pic16lf1704.h: 2281: struct {
-[; ;pic16lf1704.h: 2282: unsigned ADFVR0 :1;
-[; ;pic16lf1704.h: 2283: unsigned ADFVR1 :1;
-[; ;pic16lf1704.h: 2284: unsigned CDAFVR0 :1;
-[; ;pic16lf1704.h: 2285: unsigned CDAFVR1 :1;
-[; ;pic16lf1704.h: 2286: };
-[; ;pic16lf1704.h: 2287: } FVRCONbits_t;
-[; ;pic16lf1704.h: 2288: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
-[; ;pic16lf1704.h: 2342: extern volatile unsigned char DAC1CON0 @ 0x118;
-"2344
-[; ;pic16lf1704.h: 2344: asm("DAC1CON0 equ 0118h");
-[; <" DAC1CON0 equ 0118h ;# ">
-[; ;pic16lf1704.h: 2347: typedef union {
-[; ;pic16lf1704.h: 2348: struct {
-[; ;pic16lf1704.h: 2349: unsigned DAC1NSS :1;
-[; ;pic16lf1704.h: 2350: unsigned :1;
-[; ;pic16lf1704.h: 2351: unsigned DAC1PSS :2;
-[; ;pic16lf1704.h: 2352: unsigned DAC1OE2 :1;
-[; ;pic16lf1704.h: 2353: unsigned DAC1OE1 :1;
-[; ;pic16lf1704.h: 2354: unsigned :1;
-[; ;pic16lf1704.h: 2355: unsigned DAC1EN :1;
-[; ;pic16lf1704.h: 2356: };
-[; ;pic16lf1704.h: 2357: struct {
-[; ;pic16lf1704.h: 2358: unsigned :2;
-[; ;pic16lf1704.h: 2359: unsigned DAC1PSS0 :1;
-[; ;pic16lf1704.h: 2360: unsigned DAC1PSS1 :1;
-[; ;pic16lf1704.h: 2361: };
-[; ;pic16lf1704.h: 2362: struct {
-[; ;pic16lf1704.h: 2363: unsigned DACNSS :1;
-[; ;pic16lf1704.h: 2364: unsigned :1;
-[; ;pic16lf1704.h: 2365: unsigned DACPSS :2;
-[; ;pic16lf1704.h: 2366: unsigned DACOE0 :1;
-[; ;pic16lf1704.h: 2367: unsigned DACOE1 :1;
-[; ;pic16lf1704.h: 2368: unsigned :1;
-[; ;pic16lf1704.h: 2369: unsigned DACEN :1;
-[; ;pic16lf1704.h: 2370: };
-[; ;pic16lf1704.h: 2371: struct {
-[; ;pic16lf1704.h: 2372: unsigned :2;
-[; ;pic16lf1704.h: 2373: unsigned DACPSS0 :1;
-[; ;pic16lf1704.h: 2374: unsigned DACPSS1 :1;
-[; ;pic16lf1704.h: 2375: };
-[; ;pic16lf1704.h: 2376: } DAC1CON0bits_t;
-[; ;pic16lf1704.h: 2377: extern volatile DAC1CON0bits_t DAC1CON0bits @ 0x118;
-[; ;pic16lf1704.h: 2451: extern volatile unsigned char DAC1CON1 @ 0x119;
-"2453
-[; ;pic16lf1704.h: 2453: asm("DAC1CON1 equ 0119h");
-[; <" DAC1CON1 equ 0119h ;# ">
-[; ;pic16lf1704.h: 2456: typedef union {
-[; ;pic16lf1704.h: 2457: struct {
-[; ;pic16lf1704.h: 2458: unsigned DAC1R :8;
-[; ;pic16lf1704.h: 2459: };
-[; ;pic16lf1704.h: 2460: struct {
-[; ;pic16lf1704.h: 2461: unsigned DAC1R0 :1;
-[; ;pic16lf1704.h: 2462: unsigned DAC1R1 :1;
-[; ;pic16lf1704.h: 2463: unsigned DAC1R2 :1;
-[; ;pic16lf1704.h: 2464: unsigned DAC1R3 :1;
-[; ;pic16lf1704.h: 2465: unsigned DAC1R4 :1;
-[; ;pic16lf1704.h: 2466: unsigned DAC1R5 :1;
-[; ;pic16lf1704.h: 2467: unsigned DAC1R6 :1;
-[; ;pic16lf1704.h: 2468: unsigned DAC1R7 :1;
-[; ;pic16lf1704.h: 2469: };
-[; ;pic16lf1704.h: 2470: struct {
-[; ;pic16lf1704.h: 2471: unsigned DACR0 :1;
-[; ;pic16lf1704.h: 2472: unsigned DACR1 :1;
-[; ;pic16lf1704.h: 2473: unsigned DACR2 :1;
-[; ;pic16lf1704.h: 2474: unsigned DACR3 :1;
-[; ;pic16lf1704.h: 2475: unsigned DACR4 :1;
-[; ;pic16lf1704.h: 2476: unsigned DACR5 :1;
-[; ;pic16lf1704.h: 2477: unsigned DACR6 :1;
-[; ;pic16lf1704.h: 2478: unsigned DACR7 :1;
-[; ;pic16lf1704.h: 2479: };
-[; ;pic16lf1704.h: 2480: } DAC1CON1bits_t;
-[; ;pic16lf1704.h: 2481: extern volatile DAC1CON1bits_t DAC1CON1bits @ 0x119;
-[; ;pic16lf1704.h: 2570: extern volatile unsigned char ZCD1CON @ 0x11C;
-"2572
-[; ;pic16lf1704.h: 2572: asm("ZCD1CON equ 011Ch");
-[; <" ZCD1CON equ 011Ch ;# ">
-[; ;pic16lf1704.h: 2575: typedef union {
-[; ;pic16lf1704.h: 2576: struct {
-[; ;pic16lf1704.h: 2577: unsigned ZCD1INTN :1;
-[; ;pic16lf1704.h: 2578: unsigned ZCD1INTP :1;
-[; ;pic16lf1704.h: 2579: unsigned :2;
-[; ;pic16lf1704.h: 2580: unsigned ZCD1POL :1;
-[; ;pic16lf1704.h: 2581: unsigned ZCD1OUT :1;
-[; ;pic16lf1704.h: 2582: unsigned :1;
-[; ;pic16lf1704.h: 2583: unsigned ZCD1EN :1;
-[; ;pic16lf1704.h: 2584: };
-[; ;pic16lf1704.h: 2585: } ZCD1CONbits_t;
-[; ;pic16lf1704.h: 2586: extern volatile ZCD1CONbits_t ZCD1CONbits @ 0x11C;
-[; ;pic16lf1704.h: 2615: extern volatile unsigned char ANSELA @ 0x18C;
-"2617
-[; ;pic16lf1704.h: 2617: asm("ANSELA equ 018Ch");
-[; <" ANSELA equ 018Ch ;# ">
-[; ;pic16lf1704.h: 2620: typedef union {
-[; ;pic16lf1704.h: 2621: struct {
-[; ;pic16lf1704.h: 2622: unsigned ANSA0 :1;
-[; ;pic16lf1704.h: 2623: unsigned ANSA1 :1;
-[; ;pic16lf1704.h: 2624: unsigned ANSA2 :1;
-[; ;pic16lf1704.h: 2625: unsigned :1;
-[; ;pic16lf1704.h: 2626: unsigned ANSA4 :1;
-[; ;pic16lf1704.h: 2627: unsigned ANS5 :1;
-[; ;pic16lf1704.h: 2628: };
-[; ;pic16lf1704.h: 2629: } ANSELAbits_t;
-[; ;pic16lf1704.h: 2630: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
-[; ;pic16lf1704.h: 2659: extern volatile unsigned char ANSELC @ 0x18E;
-"2661
-[; ;pic16lf1704.h: 2661: asm("ANSELC equ 018Eh");
-[; <" ANSELC equ 018Eh ;# ">
-[; ;pic16lf1704.h: 2664: typedef union {
-[; ;pic16lf1704.h: 2665: struct {
-[; ;pic16lf1704.h: 2666: unsigned ANSC0 :1;
-[; ;pic16lf1704.h: 2667: unsigned ANSC1 :1;
-[; ;pic16lf1704.h: 2668: unsigned ANSC2 :1;
-[; ;pic16lf1704.h: 2669: unsigned ANSC3 :1;
-[; ;pic16lf1704.h: 2670: unsigned ANSC4 :1;
-[; ;pic16lf1704.h: 2671: unsigned ANSC5 :1;
-[; ;pic16lf1704.h: 2672: };
-[; ;pic16lf1704.h: 2673: } ANSELCbits_t;
-[; ;pic16lf1704.h: 2674: extern volatile ANSELCbits_t ANSELCbits @ 0x18E;
-[; ;pic16lf1704.h: 2708: extern volatile unsigned short PMADR @ 0x191;
-"2710
-[; ;pic16lf1704.h: 2710: asm("PMADR equ 0191h");
-[; <" PMADR equ 0191h ;# ">
-[; ;pic16lf1704.h: 2714: extern volatile unsigned char PMADRL @ 0x191;
-"2716
-[; ;pic16lf1704.h: 2716: asm("PMADRL equ 0191h");
-[; <" PMADRL equ 0191h ;# ">
-[; ;pic16lf1704.h: 2719: typedef union {
-[; ;pic16lf1704.h: 2720: struct {
-[; ;pic16lf1704.h: 2721: unsigned PMADRL :8;
-[; ;pic16lf1704.h: 2722: };
-[; ;pic16lf1704.h: 2723: } PMADRLbits_t;
-[; ;pic16lf1704.h: 2724: extern volatile PMADRLbits_t PMADRLbits @ 0x191;
-[; ;pic16lf1704.h: 2733: extern volatile unsigned char PMADRH @ 0x192;
-"2735
-[; ;pic16lf1704.h: 2735: asm("PMADRH equ 0192h");
-[; <" PMADRH equ 0192h ;# ">
-[; ;pic16lf1704.h: 2738: typedef union {
-[; ;pic16lf1704.h: 2739: struct {
-[; ;pic16lf1704.h: 2740: unsigned PMADRH :7;
-[; ;pic16lf1704.h: 2741: };
-[; ;pic16lf1704.h: 2742: } PMADRHbits_t;
-[; ;pic16lf1704.h: 2743: extern volatile PMADRHbits_t PMADRHbits @ 0x192;
-[; ;pic16lf1704.h: 2752: extern volatile unsigned short PMDAT @ 0x193;
-"2754
-[; ;pic16lf1704.h: 2754: asm("PMDAT equ 0193h");
-[; <" PMDAT equ 0193h ;# ">
-[; ;pic16lf1704.h: 2758: extern volatile unsigned char PMDATL @ 0x193;
-"2760
-[; ;pic16lf1704.h: 2760: asm("PMDATL equ 0193h");
-[; <" PMDATL equ 0193h ;# ">
-[; ;pic16lf1704.h: 2763: typedef union {
-[; ;pic16lf1704.h: 2764: struct {
-[; ;pic16lf1704.h: 2765: unsigned PMDATL :8;
-[; ;pic16lf1704.h: 2766: };
-[; ;pic16lf1704.h: 2767: } PMDATLbits_t;
-[; ;pic16lf1704.h: 2768: extern volatile PMDATLbits_t PMDATLbits @ 0x193;
-[; ;pic16lf1704.h: 2777: extern volatile unsigned char PMDATH @ 0x194;
-"2779
-[; ;pic16lf1704.h: 2779: asm("PMDATH equ 0194h");
-[; <" PMDATH equ 0194h ;# ">
-[; ;pic16lf1704.h: 2782: typedef union {
-[; ;pic16lf1704.h: 2783: struct {
-[; ;pic16lf1704.h: 2784: unsigned PMDATH :6;
-[; ;pic16lf1704.h: 2785: };
-[; ;pic16lf1704.h: 2786: } PMDATHbits_t;
-[; ;pic16lf1704.h: 2787: extern volatile PMDATHbits_t PMDATHbits @ 0x194;
-[; ;pic16lf1704.h: 2796: extern volatile unsigned char PMCON1 @ 0x195;
-"2798
-[; ;pic16lf1704.h: 2798: asm("PMCON1 equ 0195h");
-[; <" PMCON1 equ 0195h ;# ">
-[; ;pic16lf1704.h: 2801: typedef union {
-[; ;pic16lf1704.h: 2802: struct {
-[; ;pic16lf1704.h: 2803: unsigned RD :1;
-[; ;pic16lf1704.h: 2804: unsigned WR :1;
-[; ;pic16lf1704.h: 2805: unsigned WREN :1;
-[; ;pic16lf1704.h: 2806: unsigned WRERR :1;
-[; ;pic16lf1704.h: 2807: unsigned FREE :1;
-[; ;pic16lf1704.h: 2808: unsigned LWLO :1;
-[; ;pic16lf1704.h: 2809: unsigned CFGS :1;
-[; ;pic16lf1704.h: 2810: };
-[; ;pic16lf1704.h: 2811: } PMCON1bits_t;
-[; ;pic16lf1704.h: 2812: extern volatile PMCON1bits_t PMCON1bits @ 0x195;
-[; ;pic16lf1704.h: 2851: extern volatile unsigned char PMCON2 @ 0x196;
-"2853
-[; ;pic16lf1704.h: 2853: asm("PMCON2 equ 0196h");
-[; <" PMCON2 equ 0196h ;# ">
-[; ;pic16lf1704.h: 2856: typedef union {
-[; ;pic16lf1704.h: 2857: struct {
-[; ;pic16lf1704.h: 2858: unsigned PMCON2 :8;
-[; ;pic16lf1704.h: 2859: };
-[; ;pic16lf1704.h: 2860: } PMCON2bits_t;
-[; ;pic16lf1704.h: 2861: extern volatile PMCON2bits_t PMCON2bits @ 0x196;
-[; ;pic16lf1704.h: 2870: extern volatile unsigned char RC1REG @ 0x199;
-"2872
-[; ;pic16lf1704.h: 2872: asm("RC1REG equ 0199h");
-[; <" RC1REG equ 0199h ;# ">
-[; ;pic16lf1704.h: 2875: extern volatile unsigned char RCREG @ 0x199;
-"2877
-[; ;pic16lf1704.h: 2877: asm("RCREG equ 0199h");
-[; <" RCREG equ 0199h ;# ">
-[; ;pic16lf1704.h: 2879: extern volatile unsigned char RCREG1 @ 0x199;
-"2881
-[; ;pic16lf1704.h: 2881: asm("RCREG1 equ 0199h");
-[; <" RCREG1 equ 0199h ;# ">
-[; ;pic16lf1704.h: 2884: typedef union {
-[; ;pic16lf1704.h: 2885: struct {
-[; ;pic16lf1704.h: 2886: unsigned RC1REG :8;
-[; ;pic16lf1704.h: 2887: };
-[; ;pic16lf1704.h: 2888: } RC1REGbits_t;
-[; ;pic16lf1704.h: 2889: extern volatile RC1REGbits_t RC1REGbits @ 0x199;
-[; ;pic16lf1704.h: 2897: typedef union {
-[; ;pic16lf1704.h: 2898: struct {
-[; ;pic16lf1704.h: 2899: unsigned RC1REG :8;
-[; ;pic16lf1704.h: 2900: };
-[; ;pic16lf1704.h: 2901: } RCREGbits_t;
-[; ;pic16lf1704.h: 2902: extern volatile RCREGbits_t RCREGbits @ 0x199;
-[; ;pic16lf1704.h: 2909: typedef union {
-[; ;pic16lf1704.h: 2910: struct {
-[; ;pic16lf1704.h: 2911: unsigned RC1REG :8;
-[; ;pic16lf1704.h: 2912: };
-[; ;pic16lf1704.h: 2913: } RCREG1bits_t;
-[; ;pic16lf1704.h: 2914: extern volatile RCREG1bits_t RCREG1bits @ 0x199;
-[; ;pic16lf1704.h: 2923: extern volatile unsigned char TX1REG @ 0x19A;
-"2925
-[; ;pic16lf1704.h: 2925: asm("TX1REG equ 019Ah");
-[; <" TX1REG equ 019Ah ;# ">
-[; ;pic16lf1704.h: 2928: extern volatile unsigned char TXREG1 @ 0x19A;
-"2930
-[; ;pic16lf1704.h: 2930: asm("TXREG1 equ 019Ah");
-[; <" TXREG1 equ 019Ah ;# ">
-[; ;pic16lf1704.h: 2932: extern volatile unsigned char TXREG @ 0x19A;
-"2934
-[; ;pic16lf1704.h: 2934: asm("TXREG equ 019Ah");
-[; <" TXREG equ 019Ah ;# ">
-[; ;pic16lf1704.h: 2937: typedef union {
-[; ;pic16lf1704.h: 2938: struct {
-[; ;pic16lf1704.h: 2939: unsigned TX1REG :8;
-[; ;pic16lf1704.h: 2940: };
-[; ;pic16lf1704.h: 2941: } TX1REGbits_t;
-[; ;pic16lf1704.h: 2942: extern volatile TX1REGbits_t TX1REGbits @ 0x19A;
-[; ;pic16lf1704.h: 2950: typedef union {
-[; ;pic16lf1704.h: 2951: struct {
-[; ;pic16lf1704.h: 2952: unsigned TX1REG :8;
-[; ;pic16lf1704.h: 2953: };
-[; ;pic16lf1704.h: 2954: } TXREG1bits_t;
-[; ;pic16lf1704.h: 2955: extern volatile TXREG1bits_t TXREG1bits @ 0x19A;
-[; ;pic16lf1704.h: 2962: typedef union {
-[; ;pic16lf1704.h: 2963: struct {
-[; ;pic16lf1704.h: 2964: unsigned TX1REG :8;
-[; ;pic16lf1704.h: 2965: };
-[; ;pic16lf1704.h: 2966: } TXREGbits_t;
-[; ;pic16lf1704.h: 2967: extern volatile TXREGbits_t TXREGbits @ 0x19A;
-[; ;pic16lf1704.h: 2976: extern volatile unsigned short SP1BRG @ 0x19B;
-"2978
-[; ;pic16lf1704.h: 2978: asm("SP1BRG equ 019Bh");
-[; <" SP1BRG equ 019Bh ;# ">
-[; ;pic16lf1704.h: 2982: extern volatile unsigned char SP1BRGL @ 0x19B;
-"2984
-[; ;pic16lf1704.h: 2984: asm("SP1BRGL equ 019Bh");
-[; <" SP1BRGL equ 019Bh ;# ">
-[; ;pic16lf1704.h: 2987: extern volatile unsigned char SPBRG @ 0x19B;
-"2989
-[; ;pic16lf1704.h: 2989: asm("SPBRG equ 019Bh");
-[; <" SPBRG equ 019Bh ;# ">
-[; ;pic16lf1704.h: 2991: extern volatile unsigned char SPBRG1 @ 0x19B;
-"2993
-[; ;pic16lf1704.h: 2993: asm("SPBRG1 equ 019Bh");
-[; <" SPBRG1 equ 019Bh ;# ">
-[; ;pic16lf1704.h: 2995: extern volatile unsigned char SPBRGL @ 0x19B;
-"2997
-[; ;pic16lf1704.h: 2997: asm("SPBRGL equ 019Bh");
-[; <" SPBRGL equ 019Bh ;# ">
-[; ;pic16lf1704.h: 3000: typedef union {
-[; ;pic16lf1704.h: 3001: struct {
-[; ;pic16lf1704.h: 3002: unsigned SP1BRGL :8;
-[; ;pic16lf1704.h: 3003: };
-[; ;pic16lf1704.h: 3004: } SP1BRGLbits_t;
-[; ;pic16lf1704.h: 3005: extern volatile SP1BRGLbits_t SP1BRGLbits @ 0x19B;
-[; ;pic16lf1704.h: 3013: typedef union {
-[; ;pic16lf1704.h: 3014: struct {
-[; ;pic16lf1704.h: 3015: unsigned SP1BRGL :8;
-[; ;pic16lf1704.h: 3016: };
-[; ;pic16lf1704.h: 3017: } SPBRGbits_t;
-[; ;pic16lf1704.h: 3018: extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
-[; ;pic16lf1704.h: 3025: typedef union {
-[; ;pic16lf1704.h: 3026: struct {
-[; ;pic16lf1704.h: 3027: unsigned SP1BRGL :8;
-[; ;pic16lf1704.h: 3028: };
-[; ;pic16lf1704.h: 3029: } SPBRG1bits_t;
-[; ;pic16lf1704.h: 3030: extern volatile SPBRG1bits_t SPBRG1bits @ 0x19B;
-[; ;pic16lf1704.h: 3037: typedef union {
-[; ;pic16lf1704.h: 3038: struct {
-[; ;pic16lf1704.h: 3039: unsigned SP1BRGL :8;
-[; ;pic16lf1704.h: 3040: };
-[; ;pic16lf1704.h: 3041: } SPBRGLbits_t;
-[; ;pic16lf1704.h: 3042: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
-[; ;pic16lf1704.h: 3051: extern volatile unsigned char SP1BRGH @ 0x19C;
-"3053
-[; ;pic16lf1704.h: 3053: asm("SP1BRGH equ 019Ch");
-[; <" SP1BRGH equ 019Ch ;# ">
-[; ;pic16lf1704.h: 3056: extern volatile unsigned char SPBRGH @ 0x19C;
-"3058
-[; ;pic16lf1704.h: 3058: asm("SPBRGH equ 019Ch");
-[; <" SPBRGH equ 019Ch ;# ">
-[; ;pic16lf1704.h: 3060: extern volatile unsigned char SPBRGH1 @ 0x19C;
-"3062
-[; ;pic16lf1704.h: 3062: asm("SPBRGH1 equ 019Ch");
-[; <" SPBRGH1 equ 019Ch ;# ">
-[; ;pic16lf1704.h: 3065: typedef union {
-[; ;pic16lf1704.h: 3066: struct {
-[; ;pic16lf1704.h: 3067: unsigned SP1BRGH :8;
-[; ;pic16lf1704.h: 3068: };
-[; ;pic16lf1704.h: 3069: } SP1BRGHbits_t;
-[; ;pic16lf1704.h: 3070: extern volatile SP1BRGHbits_t SP1BRGHbits @ 0x19C;
-[; ;pic16lf1704.h: 3078: typedef union {
-[; ;pic16lf1704.h: 3079: struct {
-[; ;pic16lf1704.h: 3080: unsigned SP1BRGH :8;
-[; ;pic16lf1704.h: 3081: };
-[; ;pic16lf1704.h: 3082: } SPBRGHbits_t;
-[; ;pic16lf1704.h: 3083: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
-[; ;pic16lf1704.h: 3090: typedef union {
-[; ;pic16lf1704.h: 3091: struct {
-[; ;pic16lf1704.h: 3092: unsigned SP1BRGH :8;
-[; ;pic16lf1704.h: 3093: };
-[; ;pic16lf1704.h: 3094: } SPBRGH1bits_t;
-[; ;pic16lf1704.h: 3095: extern volatile SPBRGH1bits_t SPBRGH1bits @ 0x19C;
-[; ;pic16lf1704.h: 3104: extern volatile unsigned char RC1STA @ 0x19D;
-"3106
-[; ;pic16lf1704.h: 3106: asm("RC1STA equ 019Dh");
-[; <" RC1STA equ 019Dh ;# ">
-[; ;pic16lf1704.h: 3109: extern volatile unsigned char RCSTA1 @ 0x19D;
-"3111
-[; ;pic16lf1704.h: 3111: asm("RCSTA1 equ 019Dh");
-[; <" RCSTA1 equ 019Dh ;# ">
-[; ;pic16lf1704.h: 3113: extern volatile unsigned char RCSTA @ 0x19D;
-"3115
-[; ;pic16lf1704.h: 3115: asm("RCSTA equ 019Dh");
-[; <" RCSTA equ 019Dh ;# ">
-[; ;pic16lf1704.h: 3118: typedef union {
-[; ;pic16lf1704.h: 3119: struct {
-[; ;pic16lf1704.h: 3120: unsigned RX9D :1;
-[; ;pic16lf1704.h: 3121: unsigned OERR :1;
-[; ;pic16lf1704.h: 3122: unsigned FERR :1;
-[; ;pic16lf1704.h: 3123: unsigned ADDEN :1;
-[; ;pic16lf1704.h: 3124: unsigned CREN :1;
-[; ;pic16lf1704.h: 3125: unsigned SREN :1;
-[; ;pic16lf1704.h: 3126: unsigned RX9 :1;
-[; ;pic16lf1704.h: 3127: unsigned SPEN :1;
-[; ;pic16lf1704.h: 3128: };
-[; ;pic16lf1704.h: 3129: } RC1STAbits_t;
-[; ;pic16lf1704.h: 3130: extern volatile RC1STAbits_t RC1STAbits @ 0x19D;
-[; ;pic16lf1704.h: 3173: typedef union {
-[; ;pic16lf1704.h: 3174: struct {
-[; ;pic16lf1704.h: 3175: unsigned RX9D :1;
-[; ;pic16lf1704.h: 3176: unsigned OERR :1;
-[; ;pic16lf1704.h: 3177: unsigned FERR :1;
-[; ;pic16lf1704.h: 3178: unsigned ADDEN :1;
-[; ;pic16lf1704.h: 3179: unsigned CREN :1;
-[; ;pic16lf1704.h: 3180: unsigned SREN :1;
-[; ;pic16lf1704.h: 3181: unsigned RX9 :1;
-[; ;pic16lf1704.h: 3182: unsigned SPEN :1;
-[; ;pic16lf1704.h: 3183: };
-[; ;pic16lf1704.h: 3184: } RCSTA1bits_t;
-[; ;pic16lf1704.h: 3185: extern volatile RCSTA1bits_t RCSTA1bits @ 0x19D;
-[; ;pic16lf1704.h: 3227: typedef union {
-[; ;pic16lf1704.h: 3228: struct {
-[; ;pic16lf1704.h: 3229: unsigned RX9D :1;
-[; ;pic16lf1704.h: 3230: unsigned OERR :1;
-[; ;pic16lf1704.h: 3231: unsigned FERR :1;
-[; ;pic16lf1704.h: 3232: unsigned ADDEN :1;
-[; ;pic16lf1704.h: 3233: unsigned CREN :1;
-[; ;pic16lf1704.h: 3234: unsigned SREN :1;
-[; ;pic16lf1704.h: 3235: unsigned RX9 :1;
-[; ;pic16lf1704.h: 3236: unsigned SPEN :1;
-[; ;pic16lf1704.h: 3237: };
-[; ;pic16lf1704.h: 3238: } RCSTAbits_t;
-[; ;pic16lf1704.h: 3239: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
-[; ;pic16lf1704.h: 3283: extern volatile unsigned char TX1STA @ 0x19E;
-"3285
-[; ;pic16lf1704.h: 3285: asm("TX1STA equ 019Eh");
-[; <" TX1STA equ 019Eh ;# ">
-[; ;pic16lf1704.h: 3288: extern volatile unsigned char TXSTA1 @ 0x19E;
-"3290
-[; ;pic16lf1704.h: 3290: asm("TXSTA1 equ 019Eh");
-[; <" TXSTA1 equ 019Eh ;# ">
-[; ;pic16lf1704.h: 3292: extern volatile unsigned char TXSTA @ 0x19E;
-"3294
-[; ;pic16lf1704.h: 3294: asm("TXSTA equ 019Eh");
-[; <" TXSTA equ 019Eh ;# ">
-[; ;pic16lf1704.h: 3297: typedef union {
-[; ;pic16lf1704.h: 3298: struct {
-[; ;pic16lf1704.h: 3299: unsigned TX9D :1;
-[; ;pic16lf1704.h: 3300: unsigned TRMT :1;
-[; ;pic16lf1704.h: 3301: unsigned BRGH :1;
-[; ;pic16lf1704.h: 3302: unsigned SENDB :1;
-[; ;pic16lf1704.h: 3303: unsigned SYNC :1;
-[; ;pic16lf1704.h: 3304: unsigned TXEN :1;
-[; ;pic16lf1704.h: 3305: unsigned TX9 :1;
-[; ;pic16lf1704.h: 3306: unsigned CSRC :1;
-[; ;pic16lf1704.h: 3307: };
-[; ;pic16lf1704.h: 3308: } TX1STAbits_t;
-[; ;pic16lf1704.h: 3309: extern volatile TX1STAbits_t TX1STAbits @ 0x19E;
-[; ;pic16lf1704.h: 3352: typedef union {
-[; ;pic16lf1704.h: 3353: struct {
-[; ;pic16lf1704.h: 3354: unsigned TX9D :1;
-[; ;pic16lf1704.h: 3355: unsigned TRMT :1;
-[; ;pic16lf1704.h: 3356: unsigned BRGH :1;
-[; ;pic16lf1704.h: 3357: unsigned SENDB :1;
-[; ;pic16lf1704.h: 3358: unsigned SYNC :1;
-[; ;pic16lf1704.h: 3359: unsigned TXEN :1;
-[; ;pic16lf1704.h: 3360: unsigned TX9 :1;
-[; ;pic16lf1704.h: 3361: unsigned CSRC :1;
-[; ;pic16lf1704.h: 3362: };
-[; ;pic16lf1704.h: 3363: } TXSTA1bits_t;
-[; ;pic16lf1704.h: 3364: extern volatile TXSTA1bits_t TXSTA1bits @ 0x19E;
-[; ;pic16lf1704.h: 3406: typedef union {
-[; ;pic16lf1704.h: 3407: struct {
-[; ;pic16lf1704.h: 3408: unsigned TX9D :1;
-[; ;pic16lf1704.h: 3409: unsigned TRMT :1;
-[; ;pic16lf1704.h: 3410: unsigned BRGH :1;
-[; ;pic16lf1704.h: 3411: unsigned SENDB :1;
-[; ;pic16lf1704.h: 3412: unsigned SYNC :1;
-[; ;pic16lf1704.h: 3413: unsigned TXEN :1;
-[; ;pic16lf1704.h: 3414: unsigned TX9 :1;
-[; ;pic16lf1704.h: 3415: unsigned CSRC :1;
-[; ;pic16lf1704.h: 3416: };
-[; ;pic16lf1704.h: 3417: } TXSTAbits_t;
-[; ;pic16lf1704.h: 3418: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
-[; ;pic16lf1704.h: 3462: extern volatile unsigned char BAUD1CON @ 0x19F;
-"3464
-[; ;pic16lf1704.h: 3464: asm("BAUD1CON equ 019Fh");
-[; <" BAUD1CON equ 019Fh ;# ">
-[; ;pic16lf1704.h: 3467: extern volatile unsigned char BAUDCON1 @ 0x19F;
-"3469
-[; ;pic16lf1704.h: 3469: asm("BAUDCON1 equ 019Fh");
-[; <" BAUDCON1 equ 019Fh ;# ">
-[; ;pic16lf1704.h: 3471: extern volatile unsigned char BAUDCTL1 @ 0x19F;
-"3473
-[; ;pic16lf1704.h: 3473: asm("BAUDCTL1 equ 019Fh");
-[; <" BAUDCTL1 equ 019Fh ;# ">
-[; ;pic16lf1704.h: 3475: extern volatile unsigned char BAUDCON @ 0x19F;
-"3477
-[; ;pic16lf1704.h: 3477: asm("BAUDCON equ 019Fh");
-[; <" BAUDCON equ 019Fh ;# ">
-[; ;pic16lf1704.h: 3479: extern volatile unsigned char BAUDCTL @ 0x19F;
-"3481
-[; ;pic16lf1704.h: 3481: asm("BAUDCTL equ 019Fh");
-[; <" BAUDCTL equ 019Fh ;# ">
-[; ;pic16lf1704.h: 3484: typedef union {
-[; ;pic16lf1704.h: 3485: struct {
-[; ;pic16lf1704.h: 3486: unsigned ABDEN :1;
-[; ;pic16lf1704.h: 3487: unsigned WUE :1;
-[; ;pic16lf1704.h: 3488: unsigned :1;
-[; ;pic16lf1704.h: 3489: unsigned BRG16 :1;
-[; ;pic16lf1704.h: 3490: unsigned SCKP :1;
-[; ;pic16lf1704.h: 3491: unsigned :1;
-[; ;pic16lf1704.h: 3492: unsigned RCIDL :1;
-[; ;pic16lf1704.h: 3493: unsigned ABDOVF :1;
-[; ;pic16lf1704.h: 3494: };
-[; ;pic16lf1704.h: 3495: } BAUD1CONbits_t;
-[; ;pic16lf1704.h: 3496: extern volatile BAUD1CONbits_t BAUD1CONbits @ 0x19F;
-[; ;pic16lf1704.h: 3529: typedef union {
-[; ;pic16lf1704.h: 3530: struct {
-[; ;pic16lf1704.h: 3531: unsigned ABDEN :1;
-[; ;pic16lf1704.h: 3532: unsigned WUE :1;
-[; ;pic16lf1704.h: 3533: unsigned :1;
-[; ;pic16lf1704.h: 3534: unsigned BRG16 :1;
-[; ;pic16lf1704.h: 3535: unsigned SCKP :1;
-[; ;pic16lf1704.h: 3536: unsigned :1;
-[; ;pic16lf1704.h: 3537: unsigned RCIDL :1;
-[; ;pic16lf1704.h: 3538: unsigned ABDOVF :1;
-[; ;pic16lf1704.h: 3539: };
-[; ;pic16lf1704.h: 3540: } BAUDCON1bits_t;
-[; ;pic16lf1704.h: 3541: extern volatile BAUDCON1bits_t BAUDCON1bits @ 0x19F;
-[; ;pic16lf1704.h: 3573: typedef union {
-[; ;pic16lf1704.h: 3574: struct {
-[; ;pic16lf1704.h: 3575: unsigned ABDEN :1;
-[; ;pic16lf1704.h: 3576: unsigned WUE :1;
-[; ;pic16lf1704.h: 3577: unsigned :1;
-[; ;pic16lf1704.h: 3578: unsigned BRG16 :1;
-[; ;pic16lf1704.h: 3579: unsigned SCKP :1;
-[; ;pic16lf1704.h: 3580: unsigned :1;
-[; ;pic16lf1704.h: 3581: unsigned RCIDL :1;
-[; ;pic16lf1704.h: 3582: unsigned ABDOVF :1;
-[; ;pic16lf1704.h: 3583: };
-[; ;pic16lf1704.h: 3584: } BAUDCTL1bits_t;
-[; ;pic16lf1704.h: 3585: extern volatile BAUDCTL1bits_t BAUDCTL1bits @ 0x19F;
-[; ;pic16lf1704.h: 3617: typedef union {
-[; ;pic16lf1704.h: 3618: struct {
-[; ;pic16lf1704.h: 3619: unsigned ABDEN :1;
-[; ;pic16lf1704.h: 3620: unsigned WUE :1;
-[; ;pic16lf1704.h: 3621: unsigned :1;
-[; ;pic16lf1704.h: 3622: unsigned BRG16 :1;
-[; ;pic16lf1704.h: 3623: unsigned SCKP :1;
-[; ;pic16lf1704.h: 3624: unsigned :1;
-[; ;pic16lf1704.h: 3625: unsigned RCIDL :1;
-[; ;pic16lf1704.h: 3626: unsigned ABDOVF :1;
-[; ;pic16lf1704.h: 3627: };
-[; ;pic16lf1704.h: 3628: } BAUDCONbits_t;
-[; ;pic16lf1704.h: 3629: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
-[; ;pic16lf1704.h: 3661: typedef union {
-[; ;pic16lf1704.h: 3662: struct {
-[; ;pic16lf1704.h: 3663: unsigned ABDEN :1;
-[; ;pic16lf1704.h: 3664: unsigned WUE :1;
-[; ;pic16lf1704.h: 3665: unsigned :1;
-[; ;pic16lf1704.h: 3666: unsigned BRG16 :1;
-[; ;pic16lf1704.h: 3667: unsigned SCKP :1;
-[; ;pic16lf1704.h: 3668: unsigned :1;
-[; ;pic16lf1704.h: 3669: unsigned RCIDL :1;
-[; ;pic16lf1704.h: 3670: unsigned ABDOVF :1;
-[; ;pic16lf1704.h: 3671: };
-[; ;pic16lf1704.h: 3672: } BAUDCTLbits_t;
-[; ;pic16lf1704.h: 3673: extern volatile BAUDCTLbits_t BAUDCTLbits @ 0x19F;
-[; ;pic16lf1704.h: 3707: extern volatile unsigned char WPUA @ 0x20C;
-"3709
-[; ;pic16lf1704.h: 3709: asm("WPUA equ 020Ch");
-[; <" WPUA equ 020Ch ;# ">
-[; ;pic16lf1704.h: 3712: typedef union {
-[; ;pic16lf1704.h: 3713: struct {
-[; ;pic16lf1704.h: 3714: unsigned WPUA0 :1;
-[; ;pic16lf1704.h: 3715: unsigned WPUA1 :1;
-[; ;pic16lf1704.h: 3716: unsigned WPUA2 :1;
-[; ;pic16lf1704.h: 3717: unsigned WPUA3 :1;
-[; ;pic16lf1704.h: 3718: unsigned WPUA4 :1;
-[; ;pic16lf1704.h: 3719: unsigned WPUA5 :1;
-[; ;pic16lf1704.h: 3720: };
-[; ;pic16lf1704.h: 3721: } WPUAbits_t;
-[; ;pic16lf1704.h: 3722: extern volatile WPUAbits_t WPUAbits @ 0x20C;
-[; ;pic16lf1704.h: 3756: extern volatile unsigned char WPUC @ 0x20E;
-"3758
-[; ;pic16lf1704.h: 3758: asm("WPUC equ 020Eh");
-[; <" WPUC equ 020Eh ;# ">
-[; ;pic16lf1704.h: 3761: typedef union {
-[; ;pic16lf1704.h: 3762: struct {
-[; ;pic16lf1704.h: 3763: unsigned WPUC0 :1;
-[; ;pic16lf1704.h: 3764: unsigned WPUC1 :1;
-[; ;pic16lf1704.h: 3765: unsigned WPUC2 :1;
-[; ;pic16lf1704.h: 3766: unsigned WPUC3 :1;
-[; ;pic16lf1704.h: 3767: unsigned WPUC4 :1;
-[; ;pic16lf1704.h: 3768: unsigned WPUC5 :1;
-[; ;pic16lf1704.h: 3769: };
-[; ;pic16lf1704.h: 3770: } WPUCbits_t;
-[; ;pic16lf1704.h: 3771: extern volatile WPUCbits_t WPUCbits @ 0x20E;
-[; ;pic16lf1704.h: 3805: extern volatile unsigned char SSP1BUF @ 0x211;
-"3807
-[; ;pic16lf1704.h: 3807: asm("SSP1BUF equ 0211h");
-[; <" SSP1BUF equ 0211h ;# ">
-[; ;pic16lf1704.h: 3810: extern volatile unsigned char SSPBUF @ 0x211;
-"3812
-[; ;pic16lf1704.h: 3812: asm("SSPBUF equ 0211h");
-[; <" SSPBUF equ 0211h ;# ">
-[; ;pic16lf1704.h: 3815: typedef union {
-[; ;pic16lf1704.h: 3816: struct {
-[; ;pic16lf1704.h: 3817: unsigned SSP1BUF0 :1;
-[; ;pic16lf1704.h: 3818: unsigned SSP1BUF1 :1;
-[; ;pic16lf1704.h: 3819: unsigned SSP1BUF2 :1;
-[; ;pic16lf1704.h: 3820: unsigned SSP1BUF3 :1;
-[; ;pic16lf1704.h: 3821: unsigned SSP1BUF4 :1;
-[; ;pic16lf1704.h: 3822: unsigned SSP1BUF5 :1;
-[; ;pic16lf1704.h: 3823: unsigned SSP1BUF6 :1;
-[; ;pic16lf1704.h: 3824: unsigned SSP1BUF7 :1;
-[; ;pic16lf1704.h: 3825: };
-[; ;pic16lf1704.h: 3826: struct {
-[; ;pic16lf1704.h: 3827: unsigned BUF :8;
-[; ;pic16lf1704.h: 3828: };
-[; ;pic16lf1704.h: 3829: struct {
-[; ;pic16lf1704.h: 3830: unsigned BUF0 :1;
-[; ;pic16lf1704.h: 3831: unsigned BUF1 :1;
-[; ;pic16lf1704.h: 3832: unsigned BUF2 :1;
-[; ;pic16lf1704.h: 3833: unsigned BUF3 :1;
-[; ;pic16lf1704.h: 3834: unsigned BUF4 :1;
-[; ;pic16lf1704.h: 3835: unsigned BUF5 :1;
-[; ;pic16lf1704.h: 3836: unsigned BUF6 :1;
-[; ;pic16lf1704.h: 3837: unsigned BUF7 :1;
-[; ;pic16lf1704.h: 3838: };
-[; ;pic16lf1704.h: 3839: struct {
-[; ;pic16lf1704.h: 3840: unsigned SSP1BUF :8;
-[; ;pic16lf1704.h: 3841: };
-[; ;pic16lf1704.h: 3842: } SSP1BUFbits_t;
-[; ;pic16lf1704.h: 3843: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
-[; ;pic16lf1704.h: 3936: typedef union {
-[; ;pic16lf1704.h: 3937: struct {
-[; ;pic16lf1704.h: 3938: unsigned SSP1BUF0 :1;
-[; ;pic16lf1704.h: 3939: unsigned SSP1BUF1 :1;
-[; ;pic16lf1704.h: 3940: unsigned SSP1BUF2 :1;
-[; ;pic16lf1704.h: 3941: unsigned SSP1BUF3 :1;
-[; ;pic16lf1704.h: 3942: unsigned SSP1BUF4 :1;
-[; ;pic16lf1704.h: 3943: unsigned SSP1BUF5 :1;
-[; ;pic16lf1704.h: 3944: unsigned SSP1BUF6 :1;
-[; ;pic16lf1704.h: 3945: unsigned SSP1BUF7 :1;
-[; ;pic16lf1704.h: 3946: };
-[; ;pic16lf1704.h: 3947: struct {
-[; ;pic16lf1704.h: 3948: unsigned BUF :8;
-[; ;pic16lf1704.h: 3949: };
-[; ;pic16lf1704.h: 3950: struct {
-[; ;pic16lf1704.h: 3951: unsigned BUF0 :1;
-[; ;pic16lf1704.h: 3952: unsigned BUF1 :1;
-[; ;pic16lf1704.h: 3953: unsigned BUF2 :1;
-[; ;pic16lf1704.h: 3954: unsigned BUF3 :1;
-[; ;pic16lf1704.h: 3955: unsigned BUF4 :1;
-[; ;pic16lf1704.h: 3956: unsigned BUF5 :1;
-[; ;pic16lf1704.h: 3957: unsigned BUF6 :1;
-[; ;pic16lf1704.h: 3958: unsigned BUF7 :1;
-[; ;pic16lf1704.h: 3959: };
-[; ;pic16lf1704.h: 3960: struct {
-[; ;pic16lf1704.h: 3961: unsigned SSP1BUF :8;
-[; ;pic16lf1704.h: 3962: };
-[; ;pic16lf1704.h: 3963: } SSPBUFbits_t;
-[; ;pic16lf1704.h: 3964: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
-[; ;pic16lf1704.h: 4058: extern volatile unsigned char SSP1ADD @ 0x212;
-"4060
-[; ;pic16lf1704.h: 4060: asm("SSP1ADD equ 0212h");
-[; <" SSP1ADD equ 0212h ;# ">
-[; ;pic16lf1704.h: 4063: extern volatile unsigned char SSPADD @ 0x212;
-"4065
-[; ;pic16lf1704.h: 4065: asm("SSPADD equ 0212h");
-[; <" SSPADD equ 0212h ;# ">
-[; ;pic16lf1704.h: 4068: typedef union {
-[; ;pic16lf1704.h: 4069: struct {
-[; ;pic16lf1704.h: 4070: unsigned SSP1ADD0 :1;
-[; ;pic16lf1704.h: 4071: unsigned SSP1ADD1 :1;
-[; ;pic16lf1704.h: 4072: unsigned SSP1ADD2 :1;
-[; ;pic16lf1704.h: 4073: unsigned SSP1ADD3 :1;
-[; ;pic16lf1704.h: 4074: unsigned SSP1ADD4 :1;
-[; ;pic16lf1704.h: 4075: unsigned SSP1ADD5 :1;
-[; ;pic16lf1704.h: 4076: unsigned SSP1ADD6 :1;
-[; ;pic16lf1704.h: 4077: unsigned SSP1ADD7 :1;
-[; ;pic16lf1704.h: 4078: };
-[; ;pic16lf1704.h: 4079: struct {
-[; ;pic16lf1704.h: 4080: unsigned ADD :8;
-[; ;pic16lf1704.h: 4081: };
-[; ;pic16lf1704.h: 4082: struct {
-[; ;pic16lf1704.h: 4083: unsigned ADD0 :1;
-[; ;pic16lf1704.h: 4084: unsigned ADD1 :1;
-[; ;pic16lf1704.h: 4085: unsigned ADD2 :1;
-[; ;pic16lf1704.h: 4086: unsigned ADD3 :1;
-[; ;pic16lf1704.h: 4087: unsigned ADD4 :1;
-[; ;pic16lf1704.h: 4088: unsigned ADD5 :1;
-[; ;pic16lf1704.h: 4089: unsigned ADD6 :1;
-[; ;pic16lf1704.h: 4090: unsigned ADD7 :1;
-[; ;pic16lf1704.h: 4091: };
-[; ;pic16lf1704.h: 4092: struct {
-[; ;pic16lf1704.h: 4093: unsigned SSP1ADD :8;
-[; ;pic16lf1704.h: 4094: };
-[; ;pic16lf1704.h: 4095: } SSP1ADDbits_t;
-[; ;pic16lf1704.h: 4096: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
-[; ;pic16lf1704.h: 4189: typedef union {
-[; ;pic16lf1704.h: 4190: struct {
-[; ;pic16lf1704.h: 4191: unsigned SSP1ADD0 :1;
-[; ;pic16lf1704.h: 4192: unsigned SSP1ADD1 :1;
-[; ;pic16lf1704.h: 4193: unsigned SSP1ADD2 :1;
-[; ;pic16lf1704.h: 4194: unsigned SSP1ADD3 :1;
-[; ;pic16lf1704.h: 4195: unsigned SSP1ADD4 :1;
-[; ;pic16lf1704.h: 4196: unsigned SSP1ADD5 :1;
-[; ;pic16lf1704.h: 4197: unsigned SSP1ADD6 :1;
-[; ;pic16lf1704.h: 4198: unsigned SSP1ADD7 :1;
-[; ;pic16lf1704.h: 4199: };
-[; ;pic16lf1704.h: 4200: struct {
-[; ;pic16lf1704.h: 4201: unsigned ADD :8;
-[; ;pic16lf1704.h: 4202: };
-[; ;pic16lf1704.h: 4203: struct {
-[; ;pic16lf1704.h: 4204: unsigned ADD0 :1;
-[; ;pic16lf1704.h: 4205: unsigned ADD1 :1;
-[; ;pic16lf1704.h: 4206: unsigned ADD2 :1;
-[; ;pic16lf1704.h: 4207: unsigned ADD3 :1;
-[; ;pic16lf1704.h: 4208: unsigned ADD4 :1;
-[; ;pic16lf1704.h: 4209: unsigned ADD5 :1;
-[; ;pic16lf1704.h: 4210: unsigned ADD6 :1;
-[; ;pic16lf1704.h: 4211: unsigned ADD7 :1;
-[; ;pic16lf1704.h: 4212: };
-[; ;pic16lf1704.h: 4213: struct {
-[; ;pic16lf1704.h: 4214: unsigned SSP1ADD :8;
-[; ;pic16lf1704.h: 4215: };
-[; ;pic16lf1704.h: 4216: } SSPADDbits_t;
-[; ;pic16lf1704.h: 4217: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
-[; ;pic16lf1704.h: 4311: extern volatile unsigned char SSP1MSK @ 0x213;
-"4313
-[; ;pic16lf1704.h: 4313: asm("SSP1MSK equ 0213h");
-[; <" SSP1MSK equ 0213h ;# ">
-[; ;pic16lf1704.h: 4316: extern volatile unsigned char SSPMSK @ 0x213;
-"4318
-[; ;pic16lf1704.h: 4318: asm("SSPMSK equ 0213h");
-[; <" SSPMSK equ 0213h ;# ">
-[; ;pic16lf1704.h: 4321: typedef union {
-[; ;pic16lf1704.h: 4322: struct {
-[; ;pic16lf1704.h: 4323: unsigned SSP1MSK0 :1;
-[; ;pic16lf1704.h: 4324: unsigned SSP1MSK1 :1;
-[; ;pic16lf1704.h: 4325: unsigned SSP1MSK2 :1;
-[; ;pic16lf1704.h: 4326: unsigned SSP1MSK3 :1;
-[; ;pic16lf1704.h: 4327: unsigned SSP1MSK4 :1;
-[; ;pic16lf1704.h: 4328: unsigned SSP1MSK5 :1;
-[; ;pic16lf1704.h: 4329: unsigned SSP1MSK6 :1;
-[; ;pic16lf1704.h: 4330: unsigned SSP1MSK7 :1;
-[; ;pic16lf1704.h: 4331: };
-[; ;pic16lf1704.h: 4332: struct {
-[; ;pic16lf1704.h: 4333: unsigned MSK :8;
-[; ;pic16lf1704.h: 4334: };
-[; ;pic16lf1704.h: 4335: struct {
-[; ;pic16lf1704.h: 4336: unsigned MSK0 :1;
-[; ;pic16lf1704.h: 4337: unsigned MSK1 :1;
-[; ;pic16lf1704.h: 4338: unsigned MSK2 :1;
-[; ;pic16lf1704.h: 4339: unsigned MSK3 :1;
-[; ;pic16lf1704.h: 4340: unsigned MSK4 :1;
-[; ;pic16lf1704.h: 4341: unsigned MSK5 :1;
-[; ;pic16lf1704.h: 4342: unsigned MSK6 :1;
-[; ;pic16lf1704.h: 4343: unsigned MSK7 :1;
-[; ;pic16lf1704.h: 4344: };
-[; ;pic16lf1704.h: 4345: struct {
-[; ;pic16lf1704.h: 4346: unsigned SSP1MSK :8;
-[; ;pic16lf1704.h: 4347: };
-[; ;pic16lf1704.h: 4348: } SSP1MSKbits_t;
-[; ;pic16lf1704.h: 4349: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
-[; ;pic16lf1704.h: 4442: typedef union {
-[; ;pic16lf1704.h: 4443: struct {
-[; ;pic16lf1704.h: 4444: unsigned SSP1MSK0 :1;
-[; ;pic16lf1704.h: 4445: unsigned SSP1MSK1 :1;
-[; ;pic16lf1704.h: 4446: unsigned SSP1MSK2 :1;
-[; ;pic16lf1704.h: 4447: unsigned SSP1MSK3 :1;
-[; ;pic16lf1704.h: 4448: unsigned SSP1MSK4 :1;
-[; ;pic16lf1704.h: 4449: unsigned SSP1MSK5 :1;
-[; ;pic16lf1704.h: 4450: unsigned SSP1MSK6 :1;
-[; ;pic16lf1704.h: 4451: unsigned SSP1MSK7 :1;
-[; ;pic16lf1704.h: 4452: };
-[; ;pic16lf1704.h: 4453: struct {
-[; ;pic16lf1704.h: 4454: unsigned MSK :8;
-[; ;pic16lf1704.h: 4455: };
-[; ;pic16lf1704.h: 4456: struct {
-[; ;pic16lf1704.h: 4457: unsigned MSK0 :1;
-[; ;pic16lf1704.h: 4458: unsigned MSK1 :1;
-[; ;pic16lf1704.h: 4459: unsigned MSK2 :1;
-[; ;pic16lf1704.h: 4460: unsigned MSK3 :1;
-[; ;pic16lf1704.h: 4461: unsigned MSK4 :1;
-[; ;pic16lf1704.h: 4462: unsigned MSK5 :1;
-[; ;pic16lf1704.h: 4463: unsigned MSK6 :1;
-[; ;pic16lf1704.h: 4464: unsigned MSK7 :1;
-[; ;pic16lf1704.h: 4465: };
-[; ;pic16lf1704.h: 4466: struct {
-[; ;pic16lf1704.h: 4467: unsigned SSP1MSK :8;
-[; ;pic16lf1704.h: 4468: };
-[; ;pic16lf1704.h: 4469: } SSPMSKbits_t;
-[; ;pic16lf1704.h: 4470: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
-[; ;pic16lf1704.h: 4564: extern volatile unsigned char SSP1STAT @ 0x214;
-"4566
-[; ;pic16lf1704.h: 4566: asm("SSP1STAT equ 0214h");
-[; <" SSP1STAT equ 0214h ;# ">
-[; ;pic16lf1704.h: 4569: extern volatile unsigned char SSPSTAT @ 0x214;
-"4571
-[; ;pic16lf1704.h: 4571: asm("SSPSTAT equ 0214h");
-[; <" SSPSTAT equ 0214h ;# ">
-[; ;pic16lf1704.h: 4574: typedef union {
-[; ;pic16lf1704.h: 4575: struct {
-[; ;pic16lf1704.h: 4576: unsigned BF :1;
-[; ;pic16lf1704.h: 4577: unsigned UA :1;
-[; ;pic16lf1704.h: 4578: unsigned R_nW :1;
-[; ;pic16lf1704.h: 4579: unsigned S :1;
-[; ;pic16lf1704.h: 4580: unsigned P :1;
-[; ;pic16lf1704.h: 4581: unsigned D_nA :1;
-[; ;pic16lf1704.h: 4582: unsigned CKE :1;
-[; ;pic16lf1704.h: 4583: unsigned SMP :1;
-[; ;pic16lf1704.h: 4584: };
-[; ;pic16lf1704.h: 4585: } SSP1STATbits_t;
-[; ;pic16lf1704.h: 4586: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
-[; ;pic16lf1704.h: 4629: typedef union {
-[; ;pic16lf1704.h: 4630: struct {
-[; ;pic16lf1704.h: 4631: unsigned BF :1;
-[; ;pic16lf1704.h: 4632: unsigned UA :1;
-[; ;pic16lf1704.h: 4633: unsigned R_nW :1;
-[; ;pic16lf1704.h: 4634: unsigned S :1;
-[; ;pic16lf1704.h: 4635: unsigned P :1;
-[; ;pic16lf1704.h: 4636: unsigned D_nA :1;
-[; ;pic16lf1704.h: 4637: unsigned CKE :1;
-[; ;pic16lf1704.h: 4638: unsigned SMP :1;
-[; ;pic16lf1704.h: 4639: };
-[; ;pic16lf1704.h: 4640: } SSPSTATbits_t;
-[; ;pic16lf1704.h: 4641: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
-[; ;pic16lf1704.h: 4685: extern volatile unsigned char SSP1CON1 @ 0x215;
-"4687
-[; ;pic16lf1704.h: 4687: asm("SSP1CON1 equ 0215h");
-[; <" SSP1CON1 equ 0215h ;# ">
-[; ;pic16lf1704.h: 4690: extern volatile unsigned char SSPCON @ 0x215;
-"4692
-[; ;pic16lf1704.h: 4692: asm("SSPCON equ 0215h");
-[; <" SSPCON equ 0215h ;# ">
-[; ;pic16lf1704.h: 4694: extern volatile unsigned char SSPCON1 @ 0x215;
-"4696
-[; ;pic16lf1704.h: 4696: asm("SSPCON1 equ 0215h");
-[; <" SSPCON1 equ 0215h ;# ">
-[; ;pic16lf1704.h: 4698: extern volatile unsigned char SSP1CON @ 0x215;
-"4700
-[; ;pic16lf1704.h: 4700: asm("SSP1CON equ 0215h");
-[; <" SSP1CON equ 0215h ;# ">
-[; ;pic16lf1704.h: 4703: typedef union {
-[; ;pic16lf1704.h: 4704: struct {
-[; ;pic16lf1704.h: 4705: unsigned SSPM :4;
-[; ;pic16lf1704.h: 4706: unsigned CKP :1;
-[; ;pic16lf1704.h: 4707: unsigned SSPEN :1;
-[; ;pic16lf1704.h: 4708: unsigned SSPOV :1;
-[; ;pic16lf1704.h: 4709: unsigned WCOL :1;
-[; ;pic16lf1704.h: 4710: };
-[; ;pic16lf1704.h: 4711: struct {
-[; ;pic16lf1704.h: 4712: unsigned SSPM0 :1;
-[; ;pic16lf1704.h: 4713: unsigned SSPM1 :1;
-[; ;pic16lf1704.h: 4714: unsigned SSPM2 :1;
-[; ;pic16lf1704.h: 4715: unsigned SSPM3 :1;
-[; ;pic16lf1704.h: 4716: };
-[; ;pic16lf1704.h: 4717: } SSP1CON1bits_t;
-[; ;pic16lf1704.h: 4718: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
-[; ;pic16lf1704.h: 4766: typedef union {
-[; ;pic16lf1704.h: 4767: struct {
-[; ;pic16lf1704.h: 4768: unsigned SSPM :4;
-[; ;pic16lf1704.h: 4769: unsigned CKP :1;
-[; ;pic16lf1704.h: 4770: unsigned SSPEN :1;
-[; ;pic16lf1704.h: 4771: unsigned SSPOV :1;
-[; ;pic16lf1704.h: 4772: unsigned WCOL :1;
-[; ;pic16lf1704.h: 4773: };
-[; ;pic16lf1704.h: 4774: struct {
-[; ;pic16lf1704.h: 4775: unsigned SSPM0 :1;
-[; ;pic16lf1704.h: 4776: unsigned SSPM1 :1;
-[; ;pic16lf1704.h: 4777: unsigned SSPM2 :1;
-[; ;pic16lf1704.h: 4778: unsigned SSPM3 :1;
-[; ;pic16lf1704.h: 4779: };
-[; ;pic16lf1704.h: 4780: } SSPCONbits_t;
-[; ;pic16lf1704.h: 4781: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
-[; ;pic16lf1704.h: 4828: typedef union {
-[; ;pic16lf1704.h: 4829: struct {
-[; ;pic16lf1704.h: 4830: unsigned SSPM :4;
-[; ;pic16lf1704.h: 4831: unsigned CKP :1;
-[; ;pic16lf1704.h: 4832: unsigned SSPEN :1;
-[; ;pic16lf1704.h: 4833: unsigned SSPOV :1;
-[; ;pic16lf1704.h: 4834: unsigned WCOL :1;
-[; ;pic16lf1704.h: 4835: };
-[; ;pic16lf1704.h: 4836: struct {
-[; ;pic16lf1704.h: 4837: unsigned SSPM0 :1;
-[; ;pic16lf1704.h: 4838: unsigned SSPM1 :1;
-[; ;pic16lf1704.h: 4839: unsigned SSPM2 :1;
-[; ;pic16lf1704.h: 4840: unsigned SSPM3 :1;
-[; ;pic16lf1704.h: 4841: };
-[; ;pic16lf1704.h: 4842: } SSPCON1bits_t;
-[; ;pic16lf1704.h: 4843: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
-[; ;pic16lf1704.h: 4890: typedef union {
-[; ;pic16lf1704.h: 4891: struct {
-[; ;pic16lf1704.h: 4892: unsigned SSPM :4;
-[; ;pic16lf1704.h: 4893: unsigned CKP :1;
-[; ;pic16lf1704.h: 4894: unsigned SSPEN :1;
-[; ;pic16lf1704.h: 4895: unsigned SSPOV :1;
-[; ;pic16lf1704.h: 4896: unsigned WCOL :1;
-[; ;pic16lf1704.h: 4897: };
-[; ;pic16lf1704.h: 4898: struct {
-[; ;pic16lf1704.h: 4899: unsigned SSPM0 :1;
-[; ;pic16lf1704.h: 4900: unsigned SSPM1 :1;
-[; ;pic16lf1704.h: 4901: unsigned SSPM2 :1;
-[; ;pic16lf1704.h: 4902: unsigned SSPM3 :1;
-[; ;pic16lf1704.h: 4903: };
-[; ;pic16lf1704.h: 4904: } SSP1CONbits_t;
-[; ;pic16lf1704.h: 4905: extern volatile SSP1CONbits_t SSP1CONbits @ 0x215;
-[; ;pic16lf1704.h: 4954: extern volatile unsigned char SSP1CON2 @ 0x216;
-"4956
-[; ;pic16lf1704.h: 4956: asm("SSP1CON2 equ 0216h");
-[; <" SSP1CON2 equ 0216h ;# ">
-[; ;pic16lf1704.h: 4959: extern volatile unsigned char SSPCON2 @ 0x216;
-"4961
-[; ;pic16lf1704.h: 4961: asm("SSPCON2 equ 0216h");
-[; <" SSPCON2 equ 0216h ;# ">
-[; ;pic16lf1704.h: 4964: typedef union {
-[; ;pic16lf1704.h: 4965: struct {
-[; ;pic16lf1704.h: 4966: unsigned SEN :1;
-[; ;pic16lf1704.h: 4967: unsigned RSEN :1;
-[; ;pic16lf1704.h: 4968: unsigned PEN :1;
-[; ;pic16lf1704.h: 4969: unsigned RCEN :1;
-[; ;pic16lf1704.h: 4970: unsigned ACKEN :1;
-[; ;pic16lf1704.h: 4971: unsigned ACKDT :1;
-[; ;pic16lf1704.h: 4972: unsigned ACKSTAT :1;
-[; ;pic16lf1704.h: 4973: unsigned GCEN :1;
-[; ;pic16lf1704.h: 4974: };
-[; ;pic16lf1704.h: 4975: } SSP1CON2bits_t;
-[; ;pic16lf1704.h: 4976: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
-[; ;pic16lf1704.h: 5019: typedef union {
-[; ;pic16lf1704.h: 5020: struct {
-[; ;pic16lf1704.h: 5021: unsigned SEN :1;
-[; ;pic16lf1704.h: 5022: unsigned RSEN :1;
-[; ;pic16lf1704.h: 5023: unsigned PEN :1;
-[; ;pic16lf1704.h: 5024: unsigned RCEN :1;
-[; ;pic16lf1704.h: 5025: unsigned ACKEN :1;
-[; ;pic16lf1704.h: 5026: unsigned ACKDT :1;
-[; ;pic16lf1704.h: 5027: unsigned ACKSTAT :1;
-[; ;pic16lf1704.h: 5028: unsigned GCEN :1;
-[; ;pic16lf1704.h: 5029: };
-[; ;pic16lf1704.h: 5030: } SSPCON2bits_t;
-[; ;pic16lf1704.h: 5031: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
-[; ;pic16lf1704.h: 5075: extern volatile unsigned char SSP1CON3 @ 0x217;
-"5077
-[; ;pic16lf1704.h: 5077: asm("SSP1CON3 equ 0217h");
-[; <" SSP1CON3 equ 0217h ;# ">
-[; ;pic16lf1704.h: 5080: extern volatile unsigned char SSPCON3 @ 0x217;
-"5082
-[; ;pic16lf1704.h: 5082: asm("SSPCON3 equ 0217h");
-[; <" SSPCON3 equ 0217h ;# ">
-[; ;pic16lf1704.h: 5085: typedef union {
-[; ;pic16lf1704.h: 5086: struct {
-[; ;pic16lf1704.h: 5087: unsigned DHEN :1;
-[; ;pic16lf1704.h: 5088: unsigned AHEN :1;
-[; ;pic16lf1704.h: 5089: unsigned SBCDE :1;
-[; ;pic16lf1704.h: 5090: unsigned SDAHT :1;
-[; ;pic16lf1704.h: 5091: unsigned BOEN :1;
-[; ;pic16lf1704.h: 5092: unsigned SCIE :1;
-[; ;pic16lf1704.h: 5093: unsigned PCIE :1;
-[; ;pic16lf1704.h: 5094: unsigned ACKTIM :1;
-[; ;pic16lf1704.h: 5095: };
-[; ;pic16lf1704.h: 5096: } SSP1CON3bits_t;
-[; ;pic16lf1704.h: 5097: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
-[; ;pic16lf1704.h: 5140: typedef union {
-[; ;pic16lf1704.h: 5141: struct {
-[; ;pic16lf1704.h: 5142: unsigned DHEN :1;
-[; ;pic16lf1704.h: 5143: unsigned AHEN :1;
-[; ;pic16lf1704.h: 5144: unsigned SBCDE :1;
-[; ;pic16lf1704.h: 5145: unsigned SDAHT :1;
-[; ;pic16lf1704.h: 5146: unsigned BOEN :1;
-[; ;pic16lf1704.h: 5147: unsigned SCIE :1;
-[; ;pic16lf1704.h: 5148: unsigned PCIE :1;
-[; ;pic16lf1704.h: 5149: unsigned ACKTIM :1;
-[; ;pic16lf1704.h: 5150: };
-[; ;pic16lf1704.h: 5151: } SSPCON3bits_t;
-[; ;pic16lf1704.h: 5152: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
-[; ;pic16lf1704.h: 5196: extern volatile unsigned char ODCONA @ 0x28C;
-"5198
-[; ;pic16lf1704.h: 5198: asm("ODCONA equ 028Ch");
-[; <" ODCONA equ 028Ch ;# ">
-[; ;pic16lf1704.h: 5201: typedef union {
-[; ;pic16lf1704.h: 5202: struct {
-[; ;pic16lf1704.h: 5203: unsigned ODA0 :1;
-[; ;pic16lf1704.h: 5204: unsigned ODA1 :1;
-[; ;pic16lf1704.h: 5205: unsigned ODA2 :1;
-[; ;pic16lf1704.h: 5206: unsigned :1;
-[; ;pic16lf1704.h: 5207: unsigned ODA4 :1;
-[; ;pic16lf1704.h: 5208: unsigned ODA5 :1;
-[; ;pic16lf1704.h: 5209: };
-[; ;pic16lf1704.h: 5210: } ODCONAbits_t;
-[; ;pic16lf1704.h: 5211: extern volatile ODCONAbits_t ODCONAbits @ 0x28C;
-[; ;pic16lf1704.h: 5240: extern volatile unsigned char ODCONC @ 0x28E;
-"5242
-[; ;pic16lf1704.h: 5242: asm("ODCONC equ 028Eh");
-[; <" ODCONC equ 028Eh ;# ">
-[; ;pic16lf1704.h: 5245: typedef union {
-[; ;pic16lf1704.h: 5246: struct {
-[; ;pic16lf1704.h: 5247: unsigned ODC0 :1;
-[; ;pic16lf1704.h: 5248: unsigned ODC1 :1;
-[; ;pic16lf1704.h: 5249: unsigned ODC2 :1;
-[; ;pic16lf1704.h: 5250: unsigned ODC3 :1;
-[; ;pic16lf1704.h: 5251: unsigned ODC4 :1;
-[; ;pic16lf1704.h: 5252: unsigned ODC5 :1;
-[; ;pic16lf1704.h: 5253: };
-[; ;pic16lf1704.h: 5254: } ODCONCbits_t;
-[; ;pic16lf1704.h: 5255: extern volatile ODCONCbits_t ODCONCbits @ 0x28E;
-[; ;pic16lf1704.h: 5289: extern volatile unsigned short CCPR1 @ 0x291;
-"5291
-[; ;pic16lf1704.h: 5291: asm("CCPR1 equ 0291h");
-[; <" CCPR1 equ 0291h ;# ">
-[; ;pic16lf1704.h: 5295: extern volatile unsigned char CCPR1L @ 0x291;
-"5297
-[; ;pic16lf1704.h: 5297: asm("CCPR1L equ 0291h");
-[; <" CCPR1L equ 0291h ;# ">
-[; ;pic16lf1704.h: 5300: typedef union {
-[; ;pic16lf1704.h: 5301: struct {
-[; ;pic16lf1704.h: 5302: unsigned CCPR1L :8;
-[; ;pic16lf1704.h: 5303: };
-[; ;pic16lf1704.h: 5304: } CCPR1Lbits_t;
-[; ;pic16lf1704.h: 5305: extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
-[; ;pic16lf1704.h: 5314: extern volatile unsigned char CCPR1H @ 0x292;
-"5316
-[; ;pic16lf1704.h: 5316: asm("CCPR1H equ 0292h");
-[; <" CCPR1H equ 0292h ;# ">
-[; ;pic16lf1704.h: 5319: typedef union {
-[; ;pic16lf1704.h: 5320: struct {
-[; ;pic16lf1704.h: 5321: unsigned CCPR1H :8;
-[; ;pic16lf1704.h: 5322: };
-[; ;pic16lf1704.h: 5323: } CCPR1Hbits_t;
-[; ;pic16lf1704.h: 5324: extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
-[; ;pic16lf1704.h: 5333: extern volatile unsigned char CCP1CON @ 0x293;
-"5335
-[; ;pic16lf1704.h: 5335: asm("CCP1CON equ 0293h");
-[; <" CCP1CON equ 0293h ;# ">
-[; ;pic16lf1704.h: 5338: extern volatile unsigned char ECCP1CON @ 0x293;
-"5340
-[; ;pic16lf1704.h: 5340: asm("ECCP1CON equ 0293h");
-[; <" ECCP1CON equ 0293h ;# ">
-[; ;pic16lf1704.h: 5343: typedef union {
-[; ;pic16lf1704.h: 5344: struct {
-[; ;pic16lf1704.h: 5345: unsigned CCP1M :4;
-[; ;pic16lf1704.h: 5346: unsigned DC1B :2;
-[; ;pic16lf1704.h: 5347: };
-[; ;pic16lf1704.h: 5348: struct {
-[; ;pic16lf1704.h: 5349: unsigned CCP1M0 :1;
-[; ;pic16lf1704.h: 5350: unsigned CCP1M1 :1;
-[; ;pic16lf1704.h: 5351: unsigned CCP1M2 :1;
-[; ;pic16lf1704.h: 5352: unsigned CCP1M3 :1;
-[; ;pic16lf1704.h: 5353: unsigned DC1B0 :1;
-[; ;pic16lf1704.h: 5354: unsigned DC1B1 :1;
-[; ;pic16lf1704.h: 5355: };
-[; ;pic16lf1704.h: 5356: struct {
-[; ;pic16lf1704.h: 5357: unsigned :4;
-[; ;pic16lf1704.h: 5358: unsigned CCP1Y :1;
-[; ;pic16lf1704.h: 5359: unsigned CCP1X :1;
-[; ;pic16lf1704.h: 5360: };
-[; ;pic16lf1704.h: 5361: } CCP1CONbits_t;
-[; ;pic16lf1704.h: 5362: extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
-[; ;pic16lf1704.h: 5415: typedef union {
-[; ;pic16lf1704.h: 5416: struct {
-[; ;pic16lf1704.h: 5417: unsigned CCP1M :4;
-[; ;pic16lf1704.h: 5418: unsigned DC1B :2;
-[; ;pic16lf1704.h: 5419: };
-[; ;pic16lf1704.h: 5420: struct {
-[; ;pic16lf1704.h: 5421: unsigned CCP1M0 :1;
-[; ;pic16lf1704.h: 5422: unsigned CCP1M1 :1;
-[; ;pic16lf1704.h: 5423: unsigned CCP1M2 :1;
-[; ;pic16lf1704.h: 5424: unsigned CCP1M3 :1;
-[; ;pic16lf1704.h: 5425: unsigned DC1B0 :1;
-[; ;pic16lf1704.h: 5426: unsigned DC1B1 :1;
-[; ;pic16lf1704.h: 5427: };
-[; ;pic16lf1704.h: 5428: struct {
-[; ;pic16lf1704.h: 5429: unsigned :4;
-[; ;pic16lf1704.h: 5430: unsigned CCP1Y :1;
-[; ;pic16lf1704.h: 5431: unsigned CCP1X :1;
-[; ;pic16lf1704.h: 5432: };
-[; ;pic16lf1704.h: 5433: } ECCP1CONbits_t;
-[; ;pic16lf1704.h: 5434: extern volatile ECCP1CONbits_t ECCP1CONbits @ 0x293;
-[; ;pic16lf1704.h: 5488: extern volatile unsigned short CCPR2 @ 0x298;
-"5490
-[; ;pic16lf1704.h: 5490: asm("CCPR2 equ 0298h");
-[; <" CCPR2 equ 0298h ;# ">
-[; ;pic16lf1704.h: 5494: extern volatile unsigned char CCPR2L @ 0x298;
-"5496
-[; ;pic16lf1704.h: 5496: asm("CCPR2L equ 0298h");
-[; <" CCPR2L equ 0298h ;# ">
-[; ;pic16lf1704.h: 5499: typedef union {
-[; ;pic16lf1704.h: 5500: struct {
-[; ;pic16lf1704.h: 5501: unsigned CCPR2L :8;
-[; ;pic16lf1704.h: 5502: };
-[; ;pic16lf1704.h: 5503: } CCPR2Lbits_t;
-[; ;pic16lf1704.h: 5504: extern volatile CCPR2Lbits_t CCPR2Lbits @ 0x298;
-[; ;pic16lf1704.h: 5513: extern volatile unsigned char CCPR2H @ 0x299;
-"5515
-[; ;pic16lf1704.h: 5515: asm("CCPR2H equ 0299h");
-[; <" CCPR2H equ 0299h ;# ">
-[; ;pic16lf1704.h: 5518: typedef union {
-[; ;pic16lf1704.h: 5519: struct {
-[; ;pic16lf1704.h: 5520: unsigned CCPR2H :8;
-[; ;pic16lf1704.h: 5521: };
-[; ;pic16lf1704.h: 5522: } CCPR2Hbits_t;
-[; ;pic16lf1704.h: 5523: extern volatile CCPR2Hbits_t CCPR2Hbits @ 0x299;
-[; ;pic16lf1704.h: 5532: extern volatile unsigned char CCP2CON @ 0x29A;
-"5534
-[; ;pic16lf1704.h: 5534: asm("CCP2CON equ 029Ah");
-[; <" CCP2CON equ 029Ah ;# ">
-[; ;pic16lf1704.h: 5537: extern volatile unsigned char ECCP2CON @ 0x29A;
-"5539
-[; ;pic16lf1704.h: 5539: asm("ECCP2CON equ 029Ah");
-[; <" ECCP2CON equ 029Ah ;# ">
-[; ;pic16lf1704.h: 5542: typedef union {
-[; ;pic16lf1704.h: 5543: struct {
-[; ;pic16lf1704.h: 5544: unsigned CCP2M :4;
-[; ;pic16lf1704.h: 5545: unsigned DC2B :2;
-[; ;pic16lf1704.h: 5546: };
-[; ;pic16lf1704.h: 5547: struct {
-[; ;pic16lf1704.h: 5548: unsigned CCP2M0 :1;
-[; ;pic16lf1704.h: 5549: unsigned CCP2M1 :1;
-[; ;pic16lf1704.h: 5550: unsigned CCP2M2 :1;
-[; ;pic16lf1704.h: 5551: unsigned CCP2M3 :1;
-[; ;pic16lf1704.h: 5552: unsigned DC2B0 :1;
-[; ;pic16lf1704.h: 5553: unsigned DC2B1 :1;
-[; ;pic16lf1704.h: 5554: };
-[; ;pic16lf1704.h: 5555: struct {
-[; ;pic16lf1704.h: 5556: unsigned :4;
-[; ;pic16lf1704.h: 5557: unsigned CCP2Y :1;
-[; ;pic16lf1704.h: 5558: unsigned CCP2X :1;
-[; ;pic16lf1704.h: 5559: };
-[; ;pic16lf1704.h: 5560: } CCP2CONbits_t;
-[; ;pic16lf1704.h: 5561: extern volatile CCP2CONbits_t CCP2CONbits @ 0x29A;
-[; ;pic16lf1704.h: 5614: typedef union {
-[; ;pic16lf1704.h: 5615: struct {
-[; ;pic16lf1704.h: 5616: unsigned CCP2M :4;
-[; ;pic16lf1704.h: 5617: unsigned DC2B :2;
-[; ;pic16lf1704.h: 5618: };
-[; ;pic16lf1704.h: 5619: struct {
-[; ;pic16lf1704.h: 5620: unsigned CCP2M0 :1;
-[; ;pic16lf1704.h: 5621: unsigned CCP2M1 :1;
-[; ;pic16lf1704.h: 5622: unsigned CCP2M2 :1;
-[; ;pic16lf1704.h: 5623: unsigned CCP2M3 :1;
-[; ;pic16lf1704.h: 5624: unsigned DC2B0 :1;
-[; ;pic16lf1704.h: 5625: unsigned DC2B1 :1;
-[; ;pic16lf1704.h: 5626: };
-[; ;pic16lf1704.h: 5627: struct {
-[; ;pic16lf1704.h: 5628: unsigned :4;
-[; ;pic16lf1704.h: 5629: unsigned CCP2Y :1;
-[; ;pic16lf1704.h: 5630: unsigned CCP2X :1;
-[; ;pic16lf1704.h: 5631: };
-[; ;pic16lf1704.h: 5632: } ECCP2CONbits_t;
-[; ;pic16lf1704.h: 5633: extern volatile ECCP2CONbits_t ECCP2CONbits @ 0x29A;
-[; ;pic16lf1704.h: 5687: extern volatile unsigned char CCPTMRS @ 0x29E;
-"5689
-[; ;pic16lf1704.h: 5689: asm("CCPTMRS equ 029Eh");
-[; <" CCPTMRS equ 029Eh ;# ">
-[; ;pic16lf1704.h: 5692: typedef union {
-[; ;pic16lf1704.h: 5693: struct {
-[; ;pic16lf1704.h: 5694: unsigned C1TSEL :2;
-[; ;pic16lf1704.h: 5695: unsigned C2TSEL :2;
-[; ;pic16lf1704.h: 5696: unsigned P3TSEL :2;
-[; ;pic16lf1704.h: 5697: unsigned P4TSEL :2;
-[; ;pic16lf1704.h: 5698: };
-[; ;pic16lf1704.h: 5699: struct {
-[; ;pic16lf1704.h: 5700: unsigned C1TSEL0 :1;
-[; ;pic16lf1704.h: 5701: unsigned C1TSEL1 :1;
-[; ;pic16lf1704.h: 5702: unsigned C2TSEL0 :1;
-[; ;pic16lf1704.h: 5703: unsigned C2TSEL1 :1;
-[; ;pic16lf1704.h: 5704: unsigned P3TSEL0 :1;
-[; ;pic16lf1704.h: 5705: unsigned P3TSEL1 :1;
-[; ;pic16lf1704.h: 5706: unsigned P4TSEL0 :1;
-[; ;pic16lf1704.h: 5707: unsigned P4TSEL1 :1;
-[; ;pic16lf1704.h: 5708: };
-[; ;pic16lf1704.h: 5709: } CCPTMRSbits_t;
-[; ;pic16lf1704.h: 5710: extern volatile CCPTMRSbits_t CCPTMRSbits @ 0x29E;
-[; ;pic16lf1704.h: 5774: extern volatile unsigned char SLRCONA @ 0x30C;
-"5776
-[; ;pic16lf1704.h: 5776: asm("SLRCONA equ 030Ch");
-[; <" SLRCONA equ 030Ch ;# ">
-[; ;pic16lf1704.h: 5779: typedef union {
-[; ;pic16lf1704.h: 5780: struct {
-[; ;pic16lf1704.h: 5781: unsigned SLRA0 :1;
-[; ;pic16lf1704.h: 5782: unsigned SLRA1 :1;
-[; ;pic16lf1704.h: 5783: unsigned SLRA2 :1;
-[; ;pic16lf1704.h: 5784: unsigned :1;
-[; ;pic16lf1704.h: 5785: unsigned SLRA4 :1;
-[; ;pic16lf1704.h: 5786: unsigned SLRA5 :1;
-[; ;pic16lf1704.h: 5787: };
-[; ;pic16lf1704.h: 5788: } SLRCONAbits_t;
-[; ;pic16lf1704.h: 5789: extern volatile SLRCONAbits_t SLRCONAbits @ 0x30C;
-[; ;pic16lf1704.h: 5818: extern volatile unsigned char SLRCONC @ 0x30E;
-"5820
-[; ;pic16lf1704.h: 5820: asm("SLRCONC equ 030Eh");
-[; <" SLRCONC equ 030Eh ;# ">
-[; ;pic16lf1704.h: 5823: typedef union {
-[; ;pic16lf1704.h: 5824: struct {
-[; ;pic16lf1704.h: 5825: unsigned SLRC0 :1;
-[; ;pic16lf1704.h: 5826: unsigned SLRC1 :1;
-[; ;pic16lf1704.h: 5827: unsigned SLRC2 :1;
-[; ;pic16lf1704.h: 5828: unsigned SLRC3 :1;
-[; ;pic16lf1704.h: 5829: unsigned SLRC4 :1;
-[; ;pic16lf1704.h: 5830: unsigned SLRC5 :1;
-[; ;pic16lf1704.h: 5831: };
-[; ;pic16lf1704.h: 5832: } SLRCONCbits_t;
-[; ;pic16lf1704.h: 5833: extern volatile SLRCONCbits_t SLRCONCbits @ 0x30E;
-[; ;pic16lf1704.h: 5867: extern volatile unsigned char INLVLA @ 0x38C;
-"5869
-[; ;pic16lf1704.h: 5869: asm("INLVLA equ 038Ch");
-[; <" INLVLA equ 038Ch ;# ">
-[; ;pic16lf1704.h: 5872: typedef union {
-[; ;pic16lf1704.h: 5873: struct {
-[; ;pic16lf1704.h: 5874: unsigned INLVLA0 :1;
-[; ;pic16lf1704.h: 5875: unsigned INLVLA1 :1;
-[; ;pic16lf1704.h: 5876: unsigned INLVLA2 :1;
-[; ;pic16lf1704.h: 5877: unsigned INLVLA3 :1;
-[; ;pic16lf1704.h: 5878: unsigned INLVLA4 :1;
-[; ;pic16lf1704.h: 5879: unsigned INLVLA5 :1;
-[; ;pic16lf1704.h: 5880: };
-[; ;pic16lf1704.h: 5881: } INLVLAbits_t;
-[; ;pic16lf1704.h: 5882: extern volatile INLVLAbits_t INLVLAbits @ 0x38C;
-[; ;pic16lf1704.h: 5916: extern volatile unsigned char INLVLC @ 0x38E;
-"5918
-[; ;pic16lf1704.h: 5918: asm("INLVLC equ 038Eh");
-[; <" INLVLC equ 038Eh ;# ">
-[; ;pic16lf1704.h: 5921: typedef union {
-[; ;pic16lf1704.h: 5922: struct {
-[; ;pic16lf1704.h: 5923: unsigned INLVLC0 :1;
-[; ;pic16lf1704.h: 5924: unsigned INLVLC1 :1;
-[; ;pic16lf1704.h: 5925: unsigned INLVLC2 :1;
-[; ;pic16lf1704.h: 5926: unsigned INLVLC3 :1;
-[; ;pic16lf1704.h: 5927: unsigned INLVLC4 :1;
-[; ;pic16lf1704.h: 5928: unsigned INLVLC5 :1;
-[; ;pic16lf1704.h: 5929: };
-[; ;pic16lf1704.h: 5930: } INLVLCbits_t;
-[; ;pic16lf1704.h: 5931: extern volatile INLVLCbits_t INLVLCbits @ 0x38E;
-[; ;pic16lf1704.h: 5965: extern volatile unsigned char IOCAP @ 0x391;
-"5967
-[; ;pic16lf1704.h: 5967: asm("IOCAP equ 0391h");
-[; <" IOCAP equ 0391h ;# ">
-[; ;pic16lf1704.h: 5970: typedef union {
-[; ;pic16lf1704.h: 5971: struct {
-[; ;pic16lf1704.h: 5972: unsigned IOCAP0 :1;
-[; ;pic16lf1704.h: 5973: unsigned IOCAP1 :1;
-[; ;pic16lf1704.h: 5974: unsigned IOCAP2 :1;
-[; ;pic16lf1704.h: 5975: unsigned IOCAP3 :1;
-[; ;pic16lf1704.h: 5976: unsigned IOCAP4 :1;
-[; ;pic16lf1704.h: 5977: unsigned IOCAP5 :1;
-[; ;pic16lf1704.h: 5978: };
-[; ;pic16lf1704.h: 5979: } IOCAPbits_t;
-[; ;pic16lf1704.h: 5980: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
-[; ;pic16lf1704.h: 6014: extern volatile unsigned char IOCAN @ 0x392;
-"6016
-[; ;pic16lf1704.h: 6016: asm("IOCAN equ 0392h");
-[; <" IOCAN equ 0392h ;# ">
-[; ;pic16lf1704.h: 6019: typedef union {
-[; ;pic16lf1704.h: 6020: struct {
-[; ;pic16lf1704.h: 6021: unsigned IOCAN0 :1;
-[; ;pic16lf1704.h: 6022: unsigned IOCAN1 :1;
-[; ;pic16lf1704.h: 6023: unsigned IOCAN2 :1;
-[; ;pic16lf1704.h: 6024: unsigned IOCAN3 :1;
-[; ;pic16lf1704.h: 6025: unsigned IOCAN4 :1;
-[; ;pic16lf1704.h: 6026: unsigned IOCAN5 :1;
-[; ;pic16lf1704.h: 6027: };
-[; ;pic16lf1704.h: 6028: } IOCANbits_t;
-[; ;pic16lf1704.h: 6029: extern volatile IOCANbits_t IOCANbits @ 0x392;
-[; ;pic16lf1704.h: 6063: extern volatile unsigned char IOCAF @ 0x393;
-"6065
-[; ;pic16lf1704.h: 6065: asm("IOCAF equ 0393h");
-[; <" IOCAF equ 0393h ;# ">
-[; ;pic16lf1704.h: 6068: typedef union {
-[; ;pic16lf1704.h: 6069: struct {
-[; ;pic16lf1704.h: 6070: unsigned IOCAF0 :1;
-[; ;pic16lf1704.h: 6071: unsigned IOCAF1 :1;
-[; ;pic16lf1704.h: 6072: unsigned IOCAF2 :1;
-[; ;pic16lf1704.h: 6073: unsigned IOCAF3 :1;
-[; ;pic16lf1704.h: 6074: unsigned IOCAF4 :1;
-[; ;pic16lf1704.h: 6075: unsigned IOCAF5 :1;
-[; ;pic16lf1704.h: 6076: };
-[; ;pic16lf1704.h: 6077: } IOCAFbits_t;
-[; ;pic16lf1704.h: 6078: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
-[; ;pic16lf1704.h: 6112: extern volatile unsigned char IOCCP @ 0x397;
-"6114
-[; ;pic16lf1704.h: 6114: asm("IOCCP equ 0397h");
-[; <" IOCCP equ 0397h ;# ">
-[; ;pic16lf1704.h: 6117: typedef union {
-[; ;pic16lf1704.h: 6118: struct {
-[; ;pic16lf1704.h: 6119: unsigned IOCCP0 :1;
-[; ;pic16lf1704.h: 6120: unsigned IOCCP1 :1;
-[; ;pic16lf1704.h: 6121: unsigned IOCCP2 :1;
-[; ;pic16lf1704.h: 6122: unsigned IOCCP3 :1;
-[; ;pic16lf1704.h: 6123: unsigned IOCCP4 :1;
-[; ;pic16lf1704.h: 6124: unsigned IOCCP5 :1;
-[; ;pic16lf1704.h: 6125: };
-[; ;pic16lf1704.h: 6126: } IOCCPbits_t;
-[; ;pic16lf1704.h: 6127: extern volatile IOCCPbits_t IOCCPbits @ 0x397;
-[; ;pic16lf1704.h: 6161: extern volatile unsigned char IOCCN @ 0x398;
-"6163
-[; ;pic16lf1704.h: 6163: asm("IOCCN equ 0398h");
-[; <" IOCCN equ 0398h ;# ">
-[; ;pic16lf1704.h: 6166: typedef union {
-[; ;pic16lf1704.h: 6167: struct {
-[; ;pic16lf1704.h: 6168: unsigned IOCCN0 :1;
-[; ;pic16lf1704.h: 6169: unsigned IOCCN1 :1;
-[; ;pic16lf1704.h: 6170: unsigned IOCCN2 :1;
-[; ;pic16lf1704.h: 6171: unsigned IOCCN3 :1;
-[; ;pic16lf1704.h: 6172: unsigned IOCCN4 :1;
-[; ;pic16lf1704.h: 6173: unsigned IOCCN5 :1;
-[; ;pic16lf1704.h: 6174: };
-[; ;pic16lf1704.h: 6175: } IOCCNbits_t;
-[; ;pic16lf1704.h: 6176: extern volatile IOCCNbits_t IOCCNbits @ 0x398;
-[; ;pic16lf1704.h: 6210: extern volatile unsigned char IOCCF @ 0x399;
-"6212
-[; ;pic16lf1704.h: 6212: asm("IOCCF equ 0399h");
-[; <" IOCCF equ 0399h ;# ">
-[; ;pic16lf1704.h: 6215: typedef union {
-[; ;pic16lf1704.h: 6216: struct {
-[; ;pic16lf1704.h: 6217: unsigned IOCCF0 :1;
-[; ;pic16lf1704.h: 6218: unsigned IOCCF1 :1;
-[; ;pic16lf1704.h: 6219: unsigned IOCCF2 :1;
-[; ;pic16lf1704.h: 6220: unsigned IOCCF3 :1;
-[; ;pic16lf1704.h: 6221: unsigned IOCCF4 :1;
-[; ;pic16lf1704.h: 6222: unsigned IOCCF5 :1;
-[; ;pic16lf1704.h: 6223: };
-[; ;pic16lf1704.h: 6224: } IOCCFbits_t;
-[; ;pic16lf1704.h: 6225: extern volatile IOCCFbits_t IOCCFbits @ 0x399;
-[; ;pic16lf1704.h: 6259: extern volatile unsigned char TMR4 @ 0x415;
-"6261
-[; ;pic16lf1704.h: 6261: asm("TMR4 equ 0415h");
-[; <" TMR4 equ 0415h ;# ">
-[; ;pic16lf1704.h: 6264: typedef union {
-[; ;pic16lf1704.h: 6265: struct {
-[; ;pic16lf1704.h: 6266: unsigned TMR4 :8;
-[; ;pic16lf1704.h: 6267: };
-[; ;pic16lf1704.h: 6268: } TMR4bits_t;
-[; ;pic16lf1704.h: 6269: extern volatile TMR4bits_t TMR4bits @ 0x415;
-[; ;pic16lf1704.h: 6278: extern volatile unsigned char PR4 @ 0x416;
-"6280
-[; ;pic16lf1704.h: 6280: asm("PR4 equ 0416h");
-[; <" PR4 equ 0416h ;# ">
-[; ;pic16lf1704.h: 6283: typedef union {
-[; ;pic16lf1704.h: 6284: struct {
-[; ;pic16lf1704.h: 6285: unsigned PR4 :8;
-[; ;pic16lf1704.h: 6286: };
-[; ;pic16lf1704.h: 6287: } PR4bits_t;
-[; ;pic16lf1704.h: 6288: extern volatile PR4bits_t PR4bits @ 0x416;
-[; ;pic16lf1704.h: 6297: extern volatile unsigned char T4CON @ 0x417;
-"6299
-[; ;pic16lf1704.h: 6299: asm("T4CON equ 0417h");
-[; <" T4CON equ 0417h ;# ">
-[; ;pic16lf1704.h: 6302: typedef union {
-[; ;pic16lf1704.h: 6303: struct {
-[; ;pic16lf1704.h: 6304: unsigned T4CKPS :2;
-[; ;pic16lf1704.h: 6305: unsigned TMR4ON :1;
-[; ;pic16lf1704.h: 6306: unsigned T4OUTPS :4;
-[; ;pic16lf1704.h: 6307: };
-[; ;pic16lf1704.h: 6308: struct {
-[; ;pic16lf1704.h: 6309: unsigned T4CKPS0 :1;
-[; ;pic16lf1704.h: 6310: unsigned T4CKPS1 :1;
-[; ;pic16lf1704.h: 6311: unsigned :1;
-[; ;pic16lf1704.h: 6312: unsigned T4OUTPS0 :1;
-[; ;pic16lf1704.h: 6313: unsigned T4OUTPS1 :1;
-[; ;pic16lf1704.h: 6314: unsigned T4OUTPS2 :1;
-[; ;pic16lf1704.h: 6315: unsigned T4OUTPS3 :1;
-[; ;pic16lf1704.h: 6316: };
-[; ;pic16lf1704.h: 6317: } T4CONbits_t;
-[; ;pic16lf1704.h: 6318: extern volatile T4CONbits_t T4CONbits @ 0x417;
-[; ;pic16lf1704.h: 6367: extern volatile unsigned char TMR6 @ 0x41C;
-"6369
-[; ;pic16lf1704.h: 6369: asm("TMR6 equ 041Ch");
-[; <" TMR6 equ 041Ch ;# ">
-[; ;pic16lf1704.h: 6372: typedef union {
-[; ;pic16lf1704.h: 6373: struct {
-[; ;pic16lf1704.h: 6374: unsigned TMR6 :8;
-[; ;pic16lf1704.h: 6375: };
-[; ;pic16lf1704.h: 6376: } TMR6bits_t;
-[; ;pic16lf1704.h: 6377: extern volatile TMR6bits_t TMR6bits @ 0x41C;
-[; ;pic16lf1704.h: 6386: extern volatile unsigned char PR6 @ 0x41D;
-"6388
-[; ;pic16lf1704.h: 6388: asm("PR6 equ 041Dh");
-[; <" PR6 equ 041Dh ;# ">
-[; ;pic16lf1704.h: 6391: typedef union {
-[; ;pic16lf1704.h: 6392: struct {
-[; ;pic16lf1704.h: 6393: unsigned PR6 :8;
-[; ;pic16lf1704.h: 6394: };
-[; ;pic16lf1704.h: 6395: } PR6bits_t;
-[; ;pic16lf1704.h: 6396: extern volatile PR6bits_t PR6bits @ 0x41D;
-[; ;pic16lf1704.h: 6405: extern volatile unsigned char T6CON @ 0x41E;
-"6407
-[; ;pic16lf1704.h: 6407: asm("T6CON equ 041Eh");
-[; <" T6CON equ 041Eh ;# ">
-[; ;pic16lf1704.h: 6410: typedef union {
-[; ;pic16lf1704.h: 6411: struct {
-[; ;pic16lf1704.h: 6412: unsigned T6CKPS :2;
-[; ;pic16lf1704.h: 6413: unsigned TMR6ON :1;
-[; ;pic16lf1704.h: 6414: unsigned T6OUTPS :4;
-[; ;pic16lf1704.h: 6415: };
-[; ;pic16lf1704.h: 6416: struct {
-[; ;pic16lf1704.h: 6417: unsigned T6CKPS0 :1;
-[; ;pic16lf1704.h: 6418: unsigned T6CKPS1 :1;
-[; ;pic16lf1704.h: 6419: unsigned :1;
-[; ;pic16lf1704.h: 6420: unsigned T6OUTPS0 :1;
-[; ;pic16lf1704.h: 6421: unsigned T6OUTPS1 :1;
-[; ;pic16lf1704.h: 6422: unsigned T6OUTPS2 :1;
-[; ;pic16lf1704.h: 6423: unsigned T6OUTPS3 :1;
-[; ;pic16lf1704.h: 6424: };
-[; ;pic16lf1704.h: 6425: } T6CONbits_t;
-[; ;pic16lf1704.h: 6426: extern volatile T6CONbits_t T6CONbits @ 0x41E;
-[; ;pic16lf1704.h: 6475: extern volatile unsigned char OPA1CON @ 0x511;
-"6477
-[; ;pic16lf1704.h: 6477: asm("OPA1CON equ 0511h");
-[; <" OPA1CON equ 0511h ;# ">
-[; ;pic16lf1704.h: 6480: typedef union {
-[; ;pic16lf1704.h: 6481: struct {
-[; ;pic16lf1704.h: 6482: unsigned OPA1PCH :2;
-[; ;pic16lf1704.h: 6483: unsigned :2;
-[; ;pic16lf1704.h: 6484: unsigned OPA1UG :1;
-[; ;pic16lf1704.h: 6485: unsigned :1;
-[; ;pic16lf1704.h: 6486: unsigned OPA1SP :1;
-[; ;pic16lf1704.h: 6487: unsigned OPA1EN :1;
-[; ;pic16lf1704.h: 6488: };
-[; ;pic16lf1704.h: 6489: struct {
-[; ;pic16lf1704.h: 6490: unsigned OPA1PCH0 :1;
-[; ;pic16lf1704.h: 6491: unsigned OPA1PCH1 :1;
-[; ;pic16lf1704.h: 6492: };
-[; ;pic16lf1704.h: 6493: } OPA1CONbits_t;
-[; ;pic16lf1704.h: 6494: extern volatile OPA1CONbits_t OPA1CONbits @ 0x511;
-[; ;pic16lf1704.h: 6528: extern volatile unsigned char OPA2CON @ 0x515;
-"6530
-[; ;pic16lf1704.h: 6530: asm("OPA2CON equ 0515h");
-[; <" OPA2CON equ 0515h ;# ">
-[; ;pic16lf1704.h: 6533: typedef union {
-[; ;pic16lf1704.h: 6534: struct {
-[; ;pic16lf1704.h: 6535: unsigned OPA2PCH :2;
-[; ;pic16lf1704.h: 6536: unsigned :2;
-[; ;pic16lf1704.h: 6537: unsigned OPA2UG :1;
-[; ;pic16lf1704.h: 6538: unsigned :1;
-[; ;pic16lf1704.h: 6539: unsigned OPA2SP :1;
-[; ;pic16lf1704.h: 6540: unsigned OPA2EN :1;
-[; ;pic16lf1704.h: 6541: };
-[; ;pic16lf1704.h: 6542: struct {
-[; ;pic16lf1704.h: 6543: unsigned OPA2PCH0 :1;
-[; ;pic16lf1704.h: 6544: unsigned OPA2PCH1 :1;
-[; ;pic16lf1704.h: 6545: };
-[; ;pic16lf1704.h: 6546: } OPA2CONbits_t;
-[; ;pic16lf1704.h: 6547: extern volatile OPA2CONbits_t OPA2CONbits @ 0x515;
-[; ;pic16lf1704.h: 6581: extern volatile unsigned char PWM3DCL @ 0x617;
-"6583
-[; ;pic16lf1704.h: 6583: asm("PWM3DCL equ 0617h");
-[; <" PWM3DCL equ 0617h ;# ">
-[; ;pic16lf1704.h: 6586: typedef union {
-[; ;pic16lf1704.h: 6587: struct {
-[; ;pic16lf1704.h: 6588: unsigned :6;
-[; ;pic16lf1704.h: 6589: unsigned PWM3DCL :2;
-[; ;pic16lf1704.h: 6590: };
-[; ;pic16lf1704.h: 6591: struct {
-[; ;pic16lf1704.h: 6592: unsigned :6;
-[; ;pic16lf1704.h: 6593: unsigned PWM3DCL0 :1;
-[; ;pic16lf1704.h: 6594: unsigned PWM3DCL1 :1;
-[; ;pic16lf1704.h: 6595: };
-[; ;pic16lf1704.h: 6596: } PWM3DCLbits_t;
-[; ;pic16lf1704.h: 6597: extern volatile PWM3DCLbits_t PWM3DCLbits @ 0x617;
-[; ;pic16lf1704.h: 6616: extern volatile unsigned char PWM3DCH @ 0x618;
-"6618
-[; ;pic16lf1704.h: 6618: asm("PWM3DCH equ 0618h");
-[; <" PWM3DCH equ 0618h ;# ">
-[; ;pic16lf1704.h: 6621: typedef union {
-[; ;pic16lf1704.h: 6622: struct {
-[; ;pic16lf1704.h: 6623: unsigned PWM3DCH :8;
-[; ;pic16lf1704.h: 6624: };
-[; ;pic16lf1704.h: 6625: struct {
-[; ;pic16lf1704.h: 6626: unsigned PWM3DCH0 :1;
-[; ;pic16lf1704.h: 6627: unsigned PWM3DCH1 :1;
-[; ;pic16lf1704.h: 6628: unsigned PWM3DCH2 :1;
-[; ;pic16lf1704.h: 6629: unsigned PWM3DCH3 :1;
-[; ;pic16lf1704.h: 6630: unsigned PWM3DCH4 :1;
-[; ;pic16lf1704.h: 6631: unsigned PWM3DCH5 :1;
-[; ;pic16lf1704.h: 6632: unsigned PWM3DCH6 :1;
-[; ;pic16lf1704.h: 6633: unsigned PWM3DCH7 :1;
-[; ;pic16lf1704.h: 6634: };
-[; ;pic16lf1704.h: 6635: } PWM3DCHbits_t;
-[; ;pic16lf1704.h: 6636: extern volatile PWM3DCHbits_t PWM3DCHbits @ 0x618;
-[; ;pic16lf1704.h: 6685: extern volatile unsigned char PWM3CON @ 0x619;
-"6687
-[; ;pic16lf1704.h: 6687: asm("PWM3CON equ 0619h");
-[; <" PWM3CON equ 0619h ;# ">
-[; ;pic16lf1704.h: 6690: extern volatile unsigned char PWM3CON0 @ 0x619;
-"6692
-[; ;pic16lf1704.h: 6692: asm("PWM3CON0 equ 0619h");
-[; <" PWM3CON0 equ 0619h ;# ">
-[; ;pic16lf1704.h: 6695: typedef union {
-[; ;pic16lf1704.h: 6696: struct {
-[; ;pic16lf1704.h: 6697: unsigned :4;
-[; ;pic16lf1704.h: 6698: unsigned PWM3POL :1;
-[; ;pic16lf1704.h: 6699: unsigned PWM3OUT :1;
-[; ;pic16lf1704.h: 6700: unsigned :1;
-[; ;pic16lf1704.h: 6701: unsigned PWM3EN :1;
-[; ;pic16lf1704.h: 6702: };
-[; ;pic16lf1704.h: 6703: } PWM3CONbits_t;
-[; ;pic16lf1704.h: 6704: extern volatile PWM3CONbits_t PWM3CONbits @ 0x619;
-[; ;pic16lf1704.h: 6722: typedef union {
-[; ;pic16lf1704.h: 6723: struct {
-[; ;pic16lf1704.h: 6724: unsigned :4;
-[; ;pic16lf1704.h: 6725: unsigned PWM3POL :1;
-[; ;pic16lf1704.h: 6726: unsigned PWM3OUT :1;
-[; ;pic16lf1704.h: 6727: unsigned :1;
-[; ;pic16lf1704.h: 6728: unsigned PWM3EN :1;
-[; ;pic16lf1704.h: 6729: };
-[; ;pic16lf1704.h: 6730: } PWM3CON0bits_t;
-[; ;pic16lf1704.h: 6731: extern volatile PWM3CON0bits_t PWM3CON0bits @ 0x619;
-[; ;pic16lf1704.h: 6750: extern volatile unsigned char PWM4DCL @ 0x61A;
-"6752
-[; ;pic16lf1704.h: 6752: asm("PWM4DCL equ 061Ah");
-[; <" PWM4DCL equ 061Ah ;# ">
-[; ;pic16lf1704.h: 6755: typedef union {
-[; ;pic16lf1704.h: 6756: struct {
-[; ;pic16lf1704.h: 6757: unsigned :6;
-[; ;pic16lf1704.h: 6758: unsigned PWM4DCL :2;
-[; ;pic16lf1704.h: 6759: };
-[; ;pic16lf1704.h: 6760: struct {
-[; ;pic16lf1704.h: 6761: unsigned :6;
-[; ;pic16lf1704.h: 6762: unsigned PWM4DCL0 :1;
-[; ;pic16lf1704.h: 6763: unsigned PWM4DCL1 :1;
-[; ;pic16lf1704.h: 6764: };
-[; ;pic16lf1704.h: 6765: } PWM4DCLbits_t;
-[; ;pic16lf1704.h: 6766: extern volatile PWM4DCLbits_t PWM4DCLbits @ 0x61A;
-[; ;pic16lf1704.h: 6785: extern volatile unsigned char PWM4DCH @ 0x61B;
-"6787
-[; ;pic16lf1704.h: 6787: asm("PWM4DCH equ 061Bh");
-[; <" PWM4DCH equ 061Bh ;# ">
-[; ;pic16lf1704.h: 6790: typedef union {
-[; ;pic16lf1704.h: 6791: struct {
-[; ;pic16lf1704.h: 6792: unsigned PWM4DCH :8;
-[; ;pic16lf1704.h: 6793: };
-[; ;pic16lf1704.h: 6794: struct {
-[; ;pic16lf1704.h: 6795: unsigned PWM4DCH0 :1;
-[; ;pic16lf1704.h: 6796: unsigned PWM4DCH1 :1;
-[; ;pic16lf1704.h: 6797: unsigned PWM4DCH2 :1;
-[; ;pic16lf1704.h: 6798: unsigned PWM4DCH3 :1;
-[; ;pic16lf1704.h: 6799: unsigned PWM4DCH4 :1;
-[; ;pic16lf1704.h: 6800: unsigned PWM4DCH5 :1;
-[; ;pic16lf1704.h: 6801: unsigned PWM4DCH6 :1;
-[; ;pic16lf1704.h: 6802: unsigned PWM4DCH7 :1;
-[; ;pic16lf1704.h: 6803: };
-[; ;pic16lf1704.h: 6804: } PWM4DCHbits_t;
-[; ;pic16lf1704.h: 6805: extern volatile PWM4DCHbits_t PWM4DCHbits @ 0x61B;
-[; ;pic16lf1704.h: 6854: extern volatile unsigned char PWM4CON @ 0x61C;
-"6856
-[; ;pic16lf1704.h: 6856: asm("PWM4CON equ 061Ch");
-[; <" PWM4CON equ 061Ch ;# ">
-[; ;pic16lf1704.h: 6859: extern volatile unsigned char PWM4CON0 @ 0x61C;
-"6861
-[; ;pic16lf1704.h: 6861: asm("PWM4CON0 equ 061Ch");
-[; <" PWM4CON0 equ 061Ch ;# ">
-[; ;pic16lf1704.h: 6864: typedef union {
-[; ;pic16lf1704.h: 6865: struct {
-[; ;pic16lf1704.h: 6866: unsigned :4;
-[; ;pic16lf1704.h: 6867: unsigned PWM4POL :1;
-[; ;pic16lf1704.h: 6868: unsigned PWM4OUT :1;
-[; ;pic16lf1704.h: 6869: unsigned :1;
-[; ;pic16lf1704.h: 6870: unsigned PWM4EN :1;
-[; ;pic16lf1704.h: 6871: };
-[; ;pic16lf1704.h: 6872: } PWM4CONbits_t;
-[; ;pic16lf1704.h: 6873: extern volatile PWM4CONbits_t PWM4CONbits @ 0x61C;
-[; ;pic16lf1704.h: 6891: typedef union {
-[; ;pic16lf1704.h: 6892: struct {
-[; ;pic16lf1704.h: 6893: unsigned :4;
-[; ;pic16lf1704.h: 6894: unsigned PWM4POL :1;
-[; ;pic16lf1704.h: 6895: unsigned PWM4OUT :1;
-[; ;pic16lf1704.h: 6896: unsigned :1;
-[; ;pic16lf1704.h: 6897: unsigned PWM4EN :1;
-[; ;pic16lf1704.h: 6898: };
-[; ;pic16lf1704.h: 6899: } PWM4CON0bits_t;
-[; ;pic16lf1704.h: 6900: extern volatile PWM4CON0bits_t PWM4CON0bits @ 0x61C;
-[; ;pic16lf1704.h: 6919: extern volatile unsigned char COG1PHR @ 0x691;
-"6921
-[; ;pic16lf1704.h: 6921: asm("COG1PHR equ 0691h");
-[; <" COG1PHR equ 0691h ;# ">
-[; ;pic16lf1704.h: 6924: typedef union {
-[; ;pic16lf1704.h: 6925: struct {
-[; ;pic16lf1704.h: 6926: unsigned G1PHR :6;
-[; ;pic16lf1704.h: 6927: };
-[; ;pic16lf1704.h: 6928: struct {
-[; ;pic16lf1704.h: 6929: unsigned G1PHR0 :1;
-[; ;pic16lf1704.h: 6930: unsigned G1PHR1 :1;
-[; ;pic16lf1704.h: 6931: unsigned G1PHR2 :1;
-[; ;pic16lf1704.h: 6932: unsigned G1PHR3 :1;
-[; ;pic16lf1704.h: 6933: unsigned G1PHR4 :1;
-[; ;pic16lf1704.h: 6934: unsigned G1PHR5 :1;
-[; ;pic16lf1704.h: 6935: };
-[; ;pic16lf1704.h: 6936: } COG1PHRbits_t;
-[; ;pic16lf1704.h: 6937: extern volatile COG1PHRbits_t COG1PHRbits @ 0x691;
-[; ;pic16lf1704.h: 6976: extern volatile unsigned char COG1PHF @ 0x692;
-"6978
-[; ;pic16lf1704.h: 6978: asm("COG1PHF equ 0692h");
-[; <" COG1PHF equ 0692h ;# ">
-[; ;pic16lf1704.h: 6981: typedef union {
-[; ;pic16lf1704.h: 6982: struct {
-[; ;pic16lf1704.h: 6983: unsigned G1PHF :6;
-[; ;pic16lf1704.h: 6984: };
-[; ;pic16lf1704.h: 6985: struct {
-[; ;pic16lf1704.h: 6986: unsigned G1PHF0 :1;
-[; ;pic16lf1704.h: 6987: unsigned G1PHF1 :1;
-[; ;pic16lf1704.h: 6988: unsigned G1PHF2 :1;
-[; ;pic16lf1704.h: 6989: unsigned G1PHF3 :1;
-[; ;pic16lf1704.h: 6990: unsigned G1PHF4 :1;
-[; ;pic16lf1704.h: 6991: unsigned G1PHF5 :1;
-[; ;pic16lf1704.h: 6992: };
-[; ;pic16lf1704.h: 6993: } COG1PHFbits_t;
-[; ;pic16lf1704.h: 6994: extern volatile COG1PHFbits_t COG1PHFbits @ 0x692;
-[; ;pic16lf1704.h: 7033: extern volatile unsigned char COG1BLKR @ 0x693;
-"7035
-[; ;pic16lf1704.h: 7035: asm("COG1BLKR equ 0693h");
-[; <" COG1BLKR equ 0693h ;# ">
-[; ;pic16lf1704.h: 7038: typedef union {
-[; ;pic16lf1704.h: 7039: struct {
-[; ;pic16lf1704.h: 7040: unsigned G1BLKR :6;
-[; ;pic16lf1704.h: 7041: };
-[; ;pic16lf1704.h: 7042: struct {
-[; ;pic16lf1704.h: 7043: unsigned G1BLKR0 :1;
-[; ;pic16lf1704.h: 7044: unsigned G1BLKR1 :1;
-[; ;pic16lf1704.h: 7045: unsigned G1BLKR2 :1;
-[; ;pic16lf1704.h: 7046: unsigned G1BLKR3 :1;
-[; ;pic16lf1704.h: 7047: unsigned G1BLKR4 :1;
-[; ;pic16lf1704.h: 7048: unsigned G1BLKR5 :1;
-[; ;pic16lf1704.h: 7049: };
-[; ;pic16lf1704.h: 7050: } COG1BLKRbits_t;
-[; ;pic16lf1704.h: 7051: extern volatile COG1BLKRbits_t COG1BLKRbits @ 0x693;
-[; ;pic16lf1704.h: 7090: extern volatile unsigned char COG1BLKF @ 0x694;
-"7092
-[; ;pic16lf1704.h: 7092: asm("COG1BLKF equ 0694h");
-[; <" COG1BLKF equ 0694h ;# ">
-[; ;pic16lf1704.h: 7095: typedef union {
-[; ;pic16lf1704.h: 7096: struct {
-[; ;pic16lf1704.h: 7097: unsigned G1BLKF :6;
-[; ;pic16lf1704.h: 7098: };
-[; ;pic16lf1704.h: 7099: struct {
-[; ;pic16lf1704.h: 7100: unsigned G1BLKF0 :1;
-[; ;pic16lf1704.h: 7101: unsigned G1BLKF1 :1;
-[; ;pic16lf1704.h: 7102: unsigned G1BLKF2 :1;
-[; ;pic16lf1704.h: 7103: unsigned G1BLKF3 :1;
-[; ;pic16lf1704.h: 7104: unsigned G1BLKF4 :1;
-[; ;pic16lf1704.h: 7105: unsigned G1BLKF5 :1;
-[; ;pic16lf1704.h: 7106: };
-[; ;pic16lf1704.h: 7107: } COG1BLKFbits_t;
-[; ;pic16lf1704.h: 7108: extern volatile COG1BLKFbits_t COG1BLKFbits @ 0x694;
-[; ;pic16lf1704.h: 7147: extern volatile unsigned char COG1DBR @ 0x695;
-"7149
-[; ;pic16lf1704.h: 7149: asm("COG1DBR equ 0695h");
-[; <" COG1DBR equ 0695h ;# ">
-[; ;pic16lf1704.h: 7152: typedef union {
-[; ;pic16lf1704.h: 7153: struct {
-[; ;pic16lf1704.h: 7154: unsigned G1DBR :6;
-[; ;pic16lf1704.h: 7155: };
-[; ;pic16lf1704.h: 7156: struct {
-[; ;pic16lf1704.h: 7157: unsigned G1DBR0 :1;
-[; ;pic16lf1704.h: 7158: unsigned G1DBR1 :1;
-[; ;pic16lf1704.h: 7159: unsigned G1DBR2 :1;
-[; ;pic16lf1704.h: 7160: unsigned G1DBR3 :1;
-[; ;pic16lf1704.h: 7161: unsigned G1DBR4 :1;
-[; ;pic16lf1704.h: 7162: unsigned G1DBR5 :1;
-[; ;pic16lf1704.h: 7163: };
-[; ;pic16lf1704.h: 7164: } COG1DBRbits_t;
-[; ;pic16lf1704.h: 7165: extern volatile COG1DBRbits_t COG1DBRbits @ 0x695;
-[; ;pic16lf1704.h: 7204: extern volatile unsigned char COG1DBF @ 0x696;
-"7206
-[; ;pic16lf1704.h: 7206: asm("COG1DBF equ 0696h");
-[; <" COG1DBF equ 0696h ;# ">
-[; ;pic16lf1704.h: 7209: typedef union {
-[; ;pic16lf1704.h: 7210: struct {
-[; ;pic16lf1704.h: 7211: unsigned G1DBF :6;
-[; ;pic16lf1704.h: 7212: };
-[; ;pic16lf1704.h: 7213: struct {
-[; ;pic16lf1704.h: 7214: unsigned G1DBF0 :1;
-[; ;pic16lf1704.h: 7215: unsigned G1DBF1 :1;
-[; ;pic16lf1704.h: 7216: unsigned G1DBF2 :1;
-[; ;pic16lf1704.h: 7217: unsigned G1DBF3 :1;
-[; ;pic16lf1704.h: 7218: unsigned G1DBF4 :1;
-[; ;pic16lf1704.h: 7219: unsigned G1DBF5 :1;
-[; ;pic16lf1704.h: 7220: };
-[; ;pic16lf1704.h: 7221: } COG1DBFbits_t;
-[; ;pic16lf1704.h: 7222: extern volatile COG1DBFbits_t COG1DBFbits @ 0x696;
-[; ;pic16lf1704.h: 7261: extern volatile unsigned char COG1CON0 @ 0x697;
-"7263
-[; ;pic16lf1704.h: 7263: asm("COG1CON0 equ 0697h");
-[; <" COG1CON0 equ 0697h ;# ">
-[; ;pic16lf1704.h: 7266: typedef union {
-[; ;pic16lf1704.h: 7267: struct {
-[; ;pic16lf1704.h: 7268: unsigned G1MD :3;
-[; ;pic16lf1704.h: 7269: unsigned G1CS :2;
-[; ;pic16lf1704.h: 7270: unsigned :1;
-[; ;pic16lf1704.h: 7271: unsigned G1LD :1;
-[; ;pic16lf1704.h: 7272: unsigned G1EN :1;
-[; ;pic16lf1704.h: 7273: };
-[; ;pic16lf1704.h: 7274: struct {
-[; ;pic16lf1704.h: 7275: unsigned G1MD0 :1;
-[; ;pic16lf1704.h: 7276: unsigned G1MD1 :1;
-[; ;pic16lf1704.h: 7277: unsigned G1MD2 :1;
-[; ;pic16lf1704.h: 7278: unsigned G1CS0 :1;
-[; ;pic16lf1704.h: 7279: unsigned G1CS1 :1;
-[; ;pic16lf1704.h: 7280: };
-[; ;pic16lf1704.h: 7281: } COG1CON0bits_t;
-[; ;pic16lf1704.h: 7282: extern volatile COG1CON0bits_t COG1CON0bits @ 0x697;
-[; ;pic16lf1704.h: 7331: extern volatile unsigned char COG1CON1 @ 0x698;
-"7333
-[; ;pic16lf1704.h: 7333: asm("COG1CON1 equ 0698h");
-[; <" COG1CON1 equ 0698h ;# ">
-[; ;pic16lf1704.h: 7336: typedef union {
-[; ;pic16lf1704.h: 7337: struct {
-[; ;pic16lf1704.h: 7338: unsigned G1POLA :1;
-[; ;pic16lf1704.h: 7339: unsigned G1POLB :1;
-[; ;pic16lf1704.h: 7340: unsigned G1POLC :1;
-[; ;pic16lf1704.h: 7341: unsigned G1POLD :1;
-[; ;pic16lf1704.h: 7342: unsigned :2;
-[; ;pic16lf1704.h: 7343: unsigned G1FDBS :1;
-[; ;pic16lf1704.h: 7344: unsigned G1RDBS :1;
-[; ;pic16lf1704.h: 7345: };
-[; ;pic16lf1704.h: 7346: } COG1CON1bits_t;
-[; ;pic16lf1704.h: 7347: extern volatile COG1CON1bits_t COG1CON1bits @ 0x698;
-[; ;pic16lf1704.h: 7381: extern volatile unsigned char COG1RIS @ 0x699;
-"7383
-[; ;pic16lf1704.h: 7383: asm("COG1RIS equ 0699h");
-[; <" COG1RIS equ 0699h ;# ">
-[; ;pic16lf1704.h: 7386: typedef union {
-[; ;pic16lf1704.h: 7387: struct {
-[; ;pic16lf1704.h: 7388: unsigned G1RIS0 :1;
-[; ;pic16lf1704.h: 7389: unsigned G1RIS1 :1;
-[; ;pic16lf1704.h: 7390: unsigned G1RIS2 :1;
-[; ;pic16lf1704.h: 7391: unsigned G1RIS3 :1;
-[; ;pic16lf1704.h: 7392: unsigned G1RIS4 :1;
-[; ;pic16lf1704.h: 7393: unsigned G1RIS5 :1;
-[; ;pic16lf1704.h: 7394: unsigned G1RIS6 :1;
-[; ;pic16lf1704.h: 7395: };
-[; ;pic16lf1704.h: 7396: } COG1RISbits_t;
-[; ;pic16lf1704.h: 7397: extern volatile COG1RISbits_t COG1RISbits @ 0x699;
-[; ;pic16lf1704.h: 7436: extern volatile unsigned char COG1RSIM @ 0x69A;
-"7438
-[; ;pic16lf1704.h: 7438: asm("COG1RSIM equ 069Ah");
-[; <" COG1RSIM equ 069Ah ;# ">
-[; ;pic16lf1704.h: 7441: typedef union {
-[; ;pic16lf1704.h: 7442: struct {
-[; ;pic16lf1704.h: 7443: unsigned G1RSIM0 :1;
-[; ;pic16lf1704.h: 7444: unsigned G1RSIM1 :1;
-[; ;pic16lf1704.h: 7445: unsigned G1RSIM2 :1;
-[; ;pic16lf1704.h: 7446: unsigned G1RSIM3 :1;
-[; ;pic16lf1704.h: 7447: unsigned G1RSIM4 :1;
-[; ;pic16lf1704.h: 7448: unsigned G1RSIM5 :1;
-[; ;pic16lf1704.h: 7449: unsigned G1RSIM6 :1;
-[; ;pic16lf1704.h: 7450: };
-[; ;pic16lf1704.h: 7451: } COG1RSIMbits_t;
-[; ;pic16lf1704.h: 7452: extern volatile COG1RSIMbits_t COG1RSIMbits @ 0x69A;
-[; ;pic16lf1704.h: 7491: extern volatile unsigned char COG1FIS @ 0x69B;
-"7493
-[; ;pic16lf1704.h: 7493: asm("COG1FIS equ 069Bh");
-[; <" COG1FIS equ 069Bh ;# ">
-[; ;pic16lf1704.h: 7496: typedef union {
-[; ;pic16lf1704.h: 7497: struct {
-[; ;pic16lf1704.h: 7498: unsigned G1FIS0 :1;
-[; ;pic16lf1704.h: 7499: unsigned G1FIS1 :1;
-[; ;pic16lf1704.h: 7500: unsigned G1FIS2 :1;
-[; ;pic16lf1704.h: 7501: unsigned G1FIS3 :1;
-[; ;pic16lf1704.h: 7502: unsigned G1FIS4 :1;
-[; ;pic16lf1704.h: 7503: unsigned G1FIS5 :1;
-[; ;pic16lf1704.h: 7504: unsigned G1FIS6 :1;
-[; ;pic16lf1704.h: 7505: };
-[; ;pic16lf1704.h: 7506: } COG1FISbits_t;
-[; ;pic16lf1704.h: 7507: extern volatile COG1FISbits_t COG1FISbits @ 0x69B;
-[; ;pic16lf1704.h: 7546: extern volatile unsigned char COG1FSIM @ 0x69C;
-"7548
-[; ;pic16lf1704.h: 7548: asm("COG1FSIM equ 069Ch");
-[; <" COG1FSIM equ 069Ch ;# ">
-[; ;pic16lf1704.h: 7551: typedef union {
-[; ;pic16lf1704.h: 7552: struct {
-[; ;pic16lf1704.h: 7553: unsigned G1FSIM0 :1;
-[; ;pic16lf1704.h: 7554: unsigned G1FSIM1 :1;
-[; ;pic16lf1704.h: 7555: unsigned G1FSIM2 :1;
-[; ;pic16lf1704.h: 7556: unsigned G1FSIM3 :1;
-[; ;pic16lf1704.h: 7557: unsigned G1FSIM4 :1;
-[; ;pic16lf1704.h: 7558: unsigned G1FSIM5 :1;
-[; ;pic16lf1704.h: 7559: unsigned G1FSIM6 :1;
-[; ;pic16lf1704.h: 7560: };
-[; ;pic16lf1704.h: 7561: } COG1FSIMbits_t;
-[; ;pic16lf1704.h: 7562: extern volatile COG1FSIMbits_t COG1FSIMbits @ 0x69C;
-[; ;pic16lf1704.h: 7601: extern volatile unsigned char COG1ASD0 @ 0x69D;
-"7603
-[; ;pic16lf1704.h: 7603: asm("COG1ASD0 equ 069Dh");
-[; <" COG1ASD0 equ 069Dh ;# ">
-[; ;pic16lf1704.h: 7606: typedef union {
-[; ;pic16lf1704.h: 7607: struct {
-[; ;pic16lf1704.h: 7608: unsigned :2;
-[; ;pic16lf1704.h: 7609: unsigned G1ASDAC :2;
-[; ;pic16lf1704.h: 7610: unsigned G1ASDBD :2;
-[; ;pic16lf1704.h: 7611: unsigned G1ARSEN :1;
-[; ;pic16lf1704.h: 7612: unsigned G1ASE :1;
-[; ;pic16lf1704.h: 7613: };
-[; ;pic16lf1704.h: 7614: struct {
-[; ;pic16lf1704.h: 7615: unsigned :2;
-[; ;pic16lf1704.h: 7616: unsigned G1ASDAC0 :1;
-[; ;pic16lf1704.h: 7617: unsigned G1ASDAC1 :1;
-[; ;pic16lf1704.h: 7618: unsigned G1ASDBD0 :1;
-[; ;pic16lf1704.h: 7619: unsigned G1ASDBD1 :1;
-[; ;pic16lf1704.h: 7620: };
-[; ;pic16lf1704.h: 7621: } COG1ASD0bits_t;
-[; ;pic16lf1704.h: 7622: extern volatile COG1ASD0bits_t COG1ASD0bits @ 0x69D;
-[; ;pic16lf1704.h: 7666: extern volatile unsigned char COG1ASD1 @ 0x69E;
-"7668
-[; ;pic16lf1704.h: 7668: asm("COG1ASD1 equ 069Eh");
-[; <" COG1ASD1 equ 069Eh ;# ">
-[; ;pic16lf1704.h: 7671: typedef union {
-[; ;pic16lf1704.h: 7672: struct {
-[; ;pic16lf1704.h: 7673: unsigned G1AS0E :1;
-[; ;pic16lf1704.h: 7674: unsigned G1AS1E :1;
-[; ;pic16lf1704.h: 7675: unsigned G1AS2E :1;
-[; ;pic16lf1704.h: 7676: unsigned G1AS3E :1;
-[; ;pic16lf1704.h: 7677: };
-[; ;pic16lf1704.h: 7678: } COG1ASD1bits_t;
-[; ;pic16lf1704.h: 7679: extern volatile COG1ASD1bits_t COG1ASD1bits @ 0x69E;
-[; ;pic16lf1704.h: 7703: extern volatile unsigned char COG1STR @ 0x69F;
-"7705
-[; ;pic16lf1704.h: 7705: asm("COG1STR equ 069Fh");
-[; <" COG1STR equ 069Fh ;# ">
-[; ;pic16lf1704.h: 7708: typedef union {
-[; ;pic16lf1704.h: 7709: struct {
-[; ;pic16lf1704.h: 7710: unsigned G1STRA :1;
-[; ;pic16lf1704.h: 7711: unsigned G1STRB :1;
-[; ;pic16lf1704.h: 7712: unsigned G1STRC :1;
-[; ;pic16lf1704.h: 7713: unsigned G1STRD :1;
-[; ;pic16lf1704.h: 7714: unsigned G1SDATA :1;
-[; ;pic16lf1704.h: 7715: unsigned G1SDATB :1;
-[; ;pic16lf1704.h: 7716: unsigned G1SDATC :1;
-[; ;pic16lf1704.h: 7717: unsigned G1SDATD :1;
-[; ;pic16lf1704.h: 7718: };
-[; ;pic16lf1704.h: 7719: } COG1STRbits_t;
-[; ;pic16lf1704.h: 7720: extern volatile COG1STRbits_t COG1STRbits @ 0x69F;
-[; ;pic16lf1704.h: 7764: extern volatile unsigned char PPSLOCK @ 0xE0F;
-"7766
-[; ;pic16lf1704.h: 7766: asm("PPSLOCK equ 0E0Fh");
-[; <" PPSLOCK equ 0E0Fh ;# ">
-[; ;pic16lf1704.h: 7769: typedef union {
-[; ;pic16lf1704.h: 7770: struct {
-[; ;pic16lf1704.h: 7771: unsigned PPSLOCKED :1;
-[; ;pic16lf1704.h: 7772: };
-[; ;pic16lf1704.h: 7773: } PPSLOCKbits_t;
-[; ;pic16lf1704.h: 7774: extern volatile PPSLOCKbits_t PPSLOCKbits @ 0xE0F;
-[; ;pic16lf1704.h: 7783: extern volatile unsigned char INTPPS @ 0xE10;
-"7785
-[; ;pic16lf1704.h: 7785: asm("INTPPS equ 0E10h");
-[; <" INTPPS equ 0E10h ;# ">
-[; ;pic16lf1704.h: 7788: typedef union {
-[; ;pic16lf1704.h: 7789: struct {
-[; ;pic16lf1704.h: 7790: unsigned INTPPS :5;
-[; ;pic16lf1704.h: 7791: };
-[; ;pic16lf1704.h: 7792: } INTPPSbits_t;
-[; ;pic16lf1704.h: 7793: extern volatile INTPPSbits_t INTPPSbits @ 0xE10;
-[; ;pic16lf1704.h: 7802: extern volatile unsigned char T0CKIPPS @ 0xE11;
-"7804
-[; ;pic16lf1704.h: 7804: asm("T0CKIPPS equ 0E11h");
-[; <" T0CKIPPS equ 0E11h ;# ">
-[; ;pic16lf1704.h: 7807: typedef union {
-[; ;pic16lf1704.h: 7808: struct {
-[; ;pic16lf1704.h: 7809: unsigned T0CKIPPS :5;
-[; ;pic16lf1704.h: 7810: };
-[; ;pic16lf1704.h: 7811: } T0CKIPPSbits_t;
-[; ;pic16lf1704.h: 7812: extern volatile T0CKIPPSbits_t T0CKIPPSbits @ 0xE11;
-[; ;pic16lf1704.h: 7821: extern volatile unsigned char T1CKIPPS @ 0xE12;
-"7823
-[; ;pic16lf1704.h: 7823: asm("T1CKIPPS equ 0E12h");
-[; <" T1CKIPPS equ 0E12h ;# ">
-[; ;pic16lf1704.h: 7826: typedef union {
-[; ;pic16lf1704.h: 7827: struct {
-[; ;pic16lf1704.h: 7828: unsigned T1CKIPPS :5;
-[; ;pic16lf1704.h: 7829: };
-[; ;pic16lf1704.h: 7830: } T1CKIPPSbits_t;
-[; ;pic16lf1704.h: 7831: extern volatile T1CKIPPSbits_t T1CKIPPSbits @ 0xE12;
-[; ;pic16lf1704.h: 7840: extern volatile unsigned char T1GPPS @ 0xE13;
-"7842
-[; ;pic16lf1704.h: 7842: asm("T1GPPS equ 0E13h");
-[; <" T1GPPS equ 0E13h ;# ">
-[; ;pic16lf1704.h: 7845: typedef union {
-[; ;pic16lf1704.h: 7846: struct {
-[; ;pic16lf1704.h: 7847: unsigned T1GPPS :5;
-[; ;pic16lf1704.h: 7848: };
-[; ;pic16lf1704.h: 7849: } T1GPPSbits_t;
-[; ;pic16lf1704.h: 7850: extern volatile T1GPPSbits_t T1GPPSbits @ 0xE13;
-[; ;pic16lf1704.h: 7859: extern volatile unsigned char CCP1PPS @ 0xE14;
-"7861
-[; ;pic16lf1704.h: 7861: asm("CCP1PPS equ 0E14h");
-[; <" CCP1PPS equ 0E14h ;# ">
-[; ;pic16lf1704.h: 7864: typedef union {
-[; ;pic16lf1704.h: 7865: struct {
-[; ;pic16lf1704.h: 7866: unsigned CCP1PPS :5;
-[; ;pic16lf1704.h: 7867: };
-[; ;pic16lf1704.h: 7868: } CCP1PPSbits_t;
-[; ;pic16lf1704.h: 7869: extern volatile CCP1PPSbits_t CCP1PPSbits @ 0xE14;
-[; ;pic16lf1704.h: 7878: extern volatile unsigned char CCP2PPS @ 0xE15;
-"7880
-[; ;pic16lf1704.h: 7880: asm("CCP2PPS equ 0E15h");
-[; <" CCP2PPS equ 0E15h ;# ">
-[; ;pic16lf1704.h: 7883: typedef union {
-[; ;pic16lf1704.h: 7884: struct {
-[; ;pic16lf1704.h: 7885: unsigned CCP2PPS :5;
-[; ;pic16lf1704.h: 7886: };
-[; ;pic16lf1704.h: 7887: } CCP2PPSbits_t;
-[; ;pic16lf1704.h: 7888: extern volatile CCP2PPSbits_t CCP2PPSbits @ 0xE15;
-[; ;pic16lf1704.h: 7897: extern volatile unsigned char COGINPPS @ 0xE17;
-"7899
-[; ;pic16lf1704.h: 7899: asm("COGINPPS equ 0E17h");
-[; <" COGINPPS equ 0E17h ;# ">
-[; ;pic16lf1704.h: 7902: typedef union {
-[; ;pic16lf1704.h: 7903: struct {
-[; ;pic16lf1704.h: 7904: unsigned COGINPPS :5;
-[; ;pic16lf1704.h: 7905: };
-[; ;pic16lf1704.h: 7906: } COGINPPSbits_t;
-[; ;pic16lf1704.h: 7907: extern volatile COGINPPSbits_t COGINPPSbits @ 0xE17;
-[; ;pic16lf1704.h: 7916: extern volatile unsigned char SSPCLKPPS @ 0xE20;
-"7918
-[; ;pic16lf1704.h: 7918: asm("SSPCLKPPS equ 0E20h");
-[; <" SSPCLKPPS equ 0E20h ;# ">
-[; ;pic16lf1704.h: 7921: typedef union {
-[; ;pic16lf1704.h: 7922: struct {
-[; ;pic16lf1704.h: 7923: unsigned SSPCLKPPS :5;
-[; ;pic16lf1704.h: 7924: };
-[; ;pic16lf1704.h: 7925: } SSPCLKPPSbits_t;
-[; ;pic16lf1704.h: 7926: extern volatile SSPCLKPPSbits_t SSPCLKPPSbits @ 0xE20;
-[; ;pic16lf1704.h: 7935: extern volatile unsigned char SSPDATPPS @ 0xE21;
-"7937
-[; ;pic16lf1704.h: 7937: asm("SSPDATPPS equ 0E21h");
-[; <" SSPDATPPS equ 0E21h ;# ">
-[; ;pic16lf1704.h: 7940: typedef union {
-[; ;pic16lf1704.h: 7941: struct {
-[; ;pic16lf1704.h: 7942: unsigned SSPDATPPS :5;
-[; ;pic16lf1704.h: 7943: };
-[; ;pic16lf1704.h: 7944: } SSPDATPPSbits_t;
-[; ;pic16lf1704.h: 7945: extern volatile SSPDATPPSbits_t SSPDATPPSbits @ 0xE21;
-[; ;pic16lf1704.h: 7954: extern volatile unsigned char SSPSSPPS @ 0xE22;
-"7956
-[; ;pic16lf1704.h: 7956: asm("SSPSSPPS equ 0E22h");
-[; <" SSPSSPPS equ 0E22h ;# ">
-[; ;pic16lf1704.h: 7959: typedef union {
-[; ;pic16lf1704.h: 7960: struct {
-[; ;pic16lf1704.h: 7961: unsigned SSPSSPPS :5;
-[; ;pic16lf1704.h: 7962: };
-[; ;pic16lf1704.h: 7963: } SSPSSPPSbits_t;
-[; ;pic16lf1704.h: 7964: extern volatile SSPSSPPSbits_t SSPSSPPSbits @ 0xE22;
-[; ;pic16lf1704.h: 7973: extern volatile unsigned char RXPPS @ 0xE24;
-"7975
-[; ;pic16lf1704.h: 7975: asm("RXPPS equ 0E24h");
-[; <" RXPPS equ 0E24h ;# ">
-[; ;pic16lf1704.h: 7978: typedef union {
-[; ;pic16lf1704.h: 7979: struct {
-[; ;pic16lf1704.h: 7980: unsigned RXPPS :5;
-[; ;pic16lf1704.h: 7981: };
-[; ;pic16lf1704.h: 7982: } RXPPSbits_t;
-[; ;pic16lf1704.h: 7983: extern volatile RXPPSbits_t RXPPSbits @ 0xE24;
-[; ;pic16lf1704.h: 7992: extern volatile unsigned char CKPPS @ 0xE25;
-"7994
-[; ;pic16lf1704.h: 7994: asm("CKPPS equ 0E25h");
-[; <" CKPPS equ 0E25h ;# ">
-[; ;pic16lf1704.h: 7997: typedef union {
-[; ;pic16lf1704.h: 7998: struct {
-[; ;pic16lf1704.h: 7999: unsigned CKPPS :5;
-[; ;pic16lf1704.h: 8000: };
-[; ;pic16lf1704.h: 8001: } CKPPSbits_t;
-[; ;pic16lf1704.h: 8002: extern volatile CKPPSbits_t CKPPSbits @ 0xE25;
-[; ;pic16lf1704.h: 8011: extern volatile unsigned char CLCIN0PPS @ 0xE28;
-"8013
-[; ;pic16lf1704.h: 8013: asm("CLCIN0PPS equ 0E28h");
-[; <" CLCIN0PPS equ 0E28h ;# ">
-[; ;pic16lf1704.h: 8016: typedef union {
-[; ;pic16lf1704.h: 8017: struct {
-[; ;pic16lf1704.h: 8018: unsigned CLCIN0PPS :5;
-[; ;pic16lf1704.h: 8019: };
-[; ;pic16lf1704.h: 8020: } CLCIN0PPSbits_t;
-[; ;pic16lf1704.h: 8021: extern volatile CLCIN0PPSbits_t CLCIN0PPSbits @ 0xE28;
-[; ;pic16lf1704.h: 8030: extern volatile unsigned char CLCIN1PPS @ 0xE29;
-"8032
-[; ;pic16lf1704.h: 8032: asm("CLCIN1PPS equ 0E29h");
-[; <" CLCIN1PPS equ 0E29h ;# ">
-[; ;pic16lf1704.h: 8035: typedef union {
-[; ;pic16lf1704.h: 8036: struct {
-[; ;pic16lf1704.h: 8037: unsigned CLCIN1PPS :5;
-[; ;pic16lf1704.h: 8038: };
-[; ;pic16lf1704.h: 8039: } CLCIN1PPSbits_t;
-[; ;pic16lf1704.h: 8040: extern volatile CLCIN1PPSbits_t CLCIN1PPSbits @ 0xE29;
-[; ;pic16lf1704.h: 8049: extern volatile unsigned char CLCIN2PPS @ 0xE2A;
-"8051
-[; ;pic16lf1704.h: 8051: asm("CLCIN2PPS equ 0E2Ah");
-[; <" CLCIN2PPS equ 0E2Ah ;# ">
-[; ;pic16lf1704.h: 8054: typedef union {
-[; ;pic16lf1704.h: 8055: struct {
-[; ;pic16lf1704.h: 8056: unsigned CLCIN2PPS :5;
-[; ;pic16lf1704.h: 8057: };
-[; ;pic16lf1704.h: 8058: } CLCIN2PPSbits_t;
-[; ;pic16lf1704.h: 8059: extern volatile CLCIN2PPSbits_t CLCIN2PPSbits @ 0xE2A;
-[; ;pic16lf1704.h: 8068: extern volatile unsigned char CLCIN3PPS @ 0xE2B;
-"8070
-[; ;pic16lf1704.h: 8070: asm("CLCIN3PPS equ 0E2Bh");
-[; <" CLCIN3PPS equ 0E2Bh ;# ">
-[; ;pic16lf1704.h: 8073: typedef union {
-[; ;pic16lf1704.h: 8074: struct {
-[; ;pic16lf1704.h: 8075: unsigned CLCIN3PPS :5;
-[; ;pic16lf1704.h: 8076: };
-[; ;pic16lf1704.h: 8077: } CLCIN3PPSbits_t;
-[; ;pic16lf1704.h: 8078: extern volatile CLCIN3PPSbits_t CLCIN3PPSbits @ 0xE2B;
-[; ;pic16lf1704.h: 8087: extern volatile unsigned char RA0PPS @ 0xE90;
-"8089
-[; ;pic16lf1704.h: 8089: asm("RA0PPS equ 0E90h");
-[; <" RA0PPS equ 0E90h ;# ">
-[; ;pic16lf1704.h: 8092: typedef union {
-[; ;pic16lf1704.h: 8093: struct {
-[; ;pic16lf1704.h: 8094: unsigned RA0PPS :5;
-[; ;pic16lf1704.h: 8095: };
-[; ;pic16lf1704.h: 8096: } RA0PPSbits_t;
-[; ;pic16lf1704.h: 8097: extern volatile RA0PPSbits_t RA0PPSbits @ 0xE90;
-[; ;pic16lf1704.h: 8106: extern volatile unsigned char RA1PPS @ 0xE91;
-"8108
-[; ;pic16lf1704.h: 8108: asm("RA1PPS equ 0E91h");
-[; <" RA1PPS equ 0E91h ;# ">
-[; ;pic16lf1704.h: 8111: typedef union {
-[; ;pic16lf1704.h: 8112: struct {
-[; ;pic16lf1704.h: 8113: unsigned RA1PPS :5;
-[; ;pic16lf1704.h: 8114: };
-[; ;pic16lf1704.h: 8115: } RA1PPSbits_t;
-[; ;pic16lf1704.h: 8116: extern volatile RA1PPSbits_t RA1PPSbits @ 0xE91;
-[; ;pic16lf1704.h: 8125: extern volatile unsigned char RA2PPS @ 0xE92;
-"8127
-[; ;pic16lf1704.h: 8127: asm("RA2PPS equ 0E92h");
-[; <" RA2PPS equ 0E92h ;# ">
-[; ;pic16lf1704.h: 8130: typedef union {
-[; ;pic16lf1704.h: 8131: struct {
-[; ;pic16lf1704.h: 8132: unsigned RA2PPS :5;
-[; ;pic16lf1704.h: 8133: };
-[; ;pic16lf1704.h: 8134: } RA2PPSbits_t;
-[; ;pic16lf1704.h: 8135: extern volatile RA2PPSbits_t RA2PPSbits @ 0xE92;
-[; ;pic16lf1704.h: 8144: extern volatile unsigned char RA4PPS @ 0xE94;
-"8146
-[; ;pic16lf1704.h: 8146: asm("RA4PPS equ 0E94h");
-[; <" RA4PPS equ 0E94h ;# ">
-[; ;pic16lf1704.h: 8149: typedef union {
-[; ;pic16lf1704.h: 8150: struct {
-[; ;pic16lf1704.h: 8151: unsigned RA4PPS :5;
-[; ;pic16lf1704.h: 8152: };
-[; ;pic16lf1704.h: 8153: } RA4PPSbits_t;
-[; ;pic16lf1704.h: 8154: extern volatile RA4PPSbits_t RA4PPSbits @ 0xE94;
-[; ;pic16lf1704.h: 8163: extern volatile unsigned char RA5PPS @ 0xE95;
-"8165
-[; ;pic16lf1704.h: 8165: asm("RA5PPS equ 0E95h");
-[; <" RA5PPS equ 0E95h ;# ">
-[; ;pic16lf1704.h: 8168: typedef union {
-[; ;pic16lf1704.h: 8169: struct {
-[; ;pic16lf1704.h: 8170: unsigned RA5PPS :5;
-[; ;pic16lf1704.h: 8171: };
-[; ;pic16lf1704.h: 8172: } RA5PPSbits_t;
-[; ;pic16lf1704.h: 8173: extern volatile RA5PPSbits_t RA5PPSbits @ 0xE95;
-[; ;pic16lf1704.h: 8182: extern volatile unsigned char RC0PPS @ 0xEA0;
-"8184
-[; ;pic16lf1704.h: 8184: asm("RC0PPS equ 0EA0h");
-[; <" RC0PPS equ 0EA0h ;# ">
-[; ;pic16lf1704.h: 8187: typedef union {
-[; ;pic16lf1704.h: 8188: struct {
-[; ;pic16lf1704.h: 8189: unsigned RC0PPS :5;
-[; ;pic16lf1704.h: 8190: };
-[; ;pic16lf1704.h: 8191: } RC0PPSbits_t;
-[; ;pic16lf1704.h: 8192: extern volatile RC0PPSbits_t RC0PPSbits @ 0xEA0;
-[; ;pic16lf1704.h: 8201: extern volatile unsigned char RC1PPS @ 0xEA1;
-"8203
-[; ;pic16lf1704.h: 8203: asm("RC1PPS equ 0EA1h");
-[; <" RC1PPS equ 0EA1h ;# ">
-[; ;pic16lf1704.h: 8206: typedef union {
-[; ;pic16lf1704.h: 8207: struct {
-[; ;pic16lf1704.h: 8208: unsigned RC1PPS :5;
-[; ;pic16lf1704.h: 8209: };
-[; ;pic16lf1704.h: 8210: } RC1PPSbits_t;
-[; ;pic16lf1704.h: 8211: extern volatile RC1PPSbits_t RC1PPSbits @ 0xEA1;
-[; ;pic16lf1704.h: 8220: extern volatile unsigned char RC2PPS @ 0xEA2;
-"8222
-[; ;pic16lf1704.h: 8222: asm("RC2PPS equ 0EA2h");
-[; <" RC2PPS equ 0EA2h ;# ">
-[; ;pic16lf1704.h: 8225: typedef union {
-[; ;pic16lf1704.h: 8226: struct {
-[; ;pic16lf1704.h: 8227: unsigned RC2PPS :5;
-[; ;pic16lf1704.h: 8228: };
-[; ;pic16lf1704.h: 8229: } RC2PPSbits_t;
-[; ;pic16lf1704.h: 8230: extern volatile RC2PPSbits_t RC2PPSbits @ 0xEA2;
-[; ;pic16lf1704.h: 8239: extern volatile unsigned char RC3PPS @ 0xEA3;
-"8241
-[; ;pic16lf1704.h: 8241: asm("RC3PPS equ 0EA3h");
-[; <" RC3PPS equ 0EA3h ;# ">
-[; ;pic16lf1704.h: 8244: typedef union {
-[; ;pic16lf1704.h: 8245: struct {
-[; ;pic16lf1704.h: 8246: unsigned RC3PPS :5;
-[; ;pic16lf1704.h: 8247: };
-[; ;pic16lf1704.h: 8248: } RC3PPSbits_t;
-[; ;pic16lf1704.h: 8249: extern volatile RC3PPSbits_t RC3PPSbits @ 0xEA3;
-[; ;pic16lf1704.h: 8258: extern volatile unsigned char RC4PPS @ 0xEA4;
-"8260
-[; ;pic16lf1704.h: 8260: asm("RC4PPS equ 0EA4h");
-[; <" RC4PPS equ 0EA4h ;# ">
-[; ;pic16lf1704.h: 8263: typedef union {
-[; ;pic16lf1704.h: 8264: struct {
-[; ;pic16lf1704.h: 8265: unsigned RC4PPS :5;
-[; ;pic16lf1704.h: 8266: };
-[; ;pic16lf1704.h: 8267: } RC4PPSbits_t;
-[; ;pic16lf1704.h: 8268: extern volatile RC4PPSbits_t RC4PPSbits @ 0xEA4;
-[; ;pic16lf1704.h: 8277: extern volatile unsigned char RC5PPS @ 0xEA5;
-"8279
-[; ;pic16lf1704.h: 8279: asm("RC5PPS equ 0EA5h");
-[; <" RC5PPS equ 0EA5h ;# ">
-[; ;pic16lf1704.h: 8282: typedef union {
-[; ;pic16lf1704.h: 8283: struct {
-[; ;pic16lf1704.h: 8284: unsigned RC5PPS :5;
-[; ;pic16lf1704.h: 8285: };
-[; ;pic16lf1704.h: 8286: } RC5PPSbits_t;
-[; ;pic16lf1704.h: 8287: extern volatile RC5PPSbits_t RC5PPSbits @ 0xEA5;
-[; ;pic16lf1704.h: 8296: extern volatile unsigned char CLCDATA @ 0xF0F;
-"8298
-[; ;pic16lf1704.h: 8298: asm("CLCDATA equ 0F0Fh");
-[; <" CLCDATA equ 0F0Fh ;# ">
-[; ;pic16lf1704.h: 8301: typedef union {
-[; ;pic16lf1704.h: 8302: struct {
-[; ;pic16lf1704.h: 8303: unsigned MCLC1OUT :1;
-[; ;pic16lf1704.h: 8304: unsigned MCLC2OUT :1;
-[; ;pic16lf1704.h: 8305: unsigned MCLC3OUT :1;
-[; ;pic16lf1704.h: 8306: };
-[; ;pic16lf1704.h: 8307: } CLCDATAbits_t;
-[; ;pic16lf1704.h: 8308: extern volatile CLCDATAbits_t CLCDATAbits @ 0xF0F;
-[; ;pic16lf1704.h: 8327: extern volatile unsigned char CLC1CON @ 0xF10;
-"8329
-[; ;pic16lf1704.h: 8329: asm("CLC1CON equ 0F10h");
-[; <" CLC1CON equ 0F10h ;# ">
-[; ;pic16lf1704.h: 8332: typedef union {
-[; ;pic16lf1704.h: 8333: struct {
-[; ;pic16lf1704.h: 8334: unsigned LC1MODE :3;
-[; ;pic16lf1704.h: 8335: unsigned LC1INTN :1;
-[; ;pic16lf1704.h: 8336: unsigned LC1INTP :1;
-[; ;pic16lf1704.h: 8337: unsigned LC1OUT :1;
-[; ;pic16lf1704.h: 8338: unsigned :1;
-[; ;pic16lf1704.h: 8339: unsigned LC1EN :1;
-[; ;pic16lf1704.h: 8340: };
-[; ;pic16lf1704.h: 8341: struct {
-[; ;pic16lf1704.h: 8342: unsigned LC1MODE0 :1;
-[; ;pic16lf1704.h: 8343: unsigned LC1MODE1 :1;
-[; ;pic16lf1704.h: 8344: unsigned LC1MODE2 :1;
-[; ;pic16lf1704.h: 8345: };
-[; ;pic16lf1704.h: 8346: struct {
-[; ;pic16lf1704.h: 8347: unsigned MODE :3;
-[; ;pic16lf1704.h: 8348: unsigned INTN :1;
-[; ;pic16lf1704.h: 8349: unsigned INTP :1;
-[; ;pic16lf1704.h: 8350: unsigned OUT :1;
-[; ;pic16lf1704.h: 8351: unsigned :1;
-[; ;pic16lf1704.h: 8352: unsigned EN :1;
-[; ;pic16lf1704.h: 8353: };
-[; ;pic16lf1704.h: 8354: struct {
-[; ;pic16lf1704.h: 8355: unsigned MODE0 :1;
-[; ;pic16lf1704.h: 8356: unsigned MODE1 :1;
-[; ;pic16lf1704.h: 8357: unsigned MODE2 :1;
-[; ;pic16lf1704.h: 8358: };
-[; ;pic16lf1704.h: 8359: } CLC1CONbits_t;
-[; ;pic16lf1704.h: 8360: extern volatile CLC1CONbits_t CLC1CONbits @ 0xF10;
-[; ;pic16lf1704.h: 8444: extern volatile unsigned char CLC1POL @ 0xF11;
-"8446
-[; ;pic16lf1704.h: 8446: asm("CLC1POL equ 0F11h");
-[; <" CLC1POL equ 0F11h ;# ">
-[; ;pic16lf1704.h: 8449: typedef union {
-[; ;pic16lf1704.h: 8450: struct {
-[; ;pic16lf1704.h: 8451: unsigned LC1G1POL :1;
-[; ;pic16lf1704.h: 8452: unsigned LC1G2POL :1;
-[; ;pic16lf1704.h: 8453: unsigned LC1G3POL :1;
-[; ;pic16lf1704.h: 8454: unsigned LC1G4POL :1;
-[; ;pic16lf1704.h: 8455: unsigned :3;
-[; ;pic16lf1704.h: 8456: unsigned LC1POL :1;
-[; ;pic16lf1704.h: 8457: };
-[; ;pic16lf1704.h: 8458: struct {
-[; ;pic16lf1704.h: 8459: unsigned G1POL :1;
-[; ;pic16lf1704.h: 8460: unsigned G2POL :1;
-[; ;pic16lf1704.h: 8461: unsigned G3POL :1;
-[; ;pic16lf1704.h: 8462: unsigned G4POL :1;
-[; ;pic16lf1704.h: 8463: unsigned :3;
-[; ;pic16lf1704.h: 8464: unsigned POL :1;
-[; ;pic16lf1704.h: 8465: };
-[; ;pic16lf1704.h: 8466: } CLC1POLbits_t;
-[; ;pic16lf1704.h: 8467: extern volatile CLC1POLbits_t CLC1POLbits @ 0xF11;
-[; ;pic16lf1704.h: 8521: extern volatile unsigned char CLC1SEL0 @ 0xF12;
-"8523
-[; ;pic16lf1704.h: 8523: asm("CLC1SEL0 equ 0F12h");
-[; <" CLC1SEL0 equ 0F12h ;# ">
-[; ;pic16lf1704.h: 8526: typedef union {
-[; ;pic16lf1704.h: 8527: struct {
-[; ;pic16lf1704.h: 8528: unsigned LC1D1S0 :1;
-[; ;pic16lf1704.h: 8529: unsigned LC1D1S1 :1;
-[; ;pic16lf1704.h: 8530: unsigned LC1D1S2 :1;
-[; ;pic16lf1704.h: 8531: unsigned LC1D1S3 :1;
-[; ;pic16lf1704.h: 8532: unsigned LC1D1S4 :1;
-[; ;pic16lf1704.h: 8533: };
-[; ;pic16lf1704.h: 8534: struct {
-[; ;pic16lf1704.h: 8535: unsigned LC1D1S :8;
-[; ;pic16lf1704.h: 8536: };
-[; ;pic16lf1704.h: 8537: struct {
-[; ;pic16lf1704.h: 8538: unsigned D1S :8;
-[; ;pic16lf1704.h: 8539: };
-[; ;pic16lf1704.h: 8540: struct {
-[; ;pic16lf1704.h: 8541: unsigned D1S0 :1;
-[; ;pic16lf1704.h: 8542: unsigned D1S1 :1;
-[; ;pic16lf1704.h: 8543: unsigned D1S2 :1;
-[; ;pic16lf1704.h: 8544: unsigned D1S3 :1;
-[; ;pic16lf1704.h: 8545: unsigned D1S4 :1;
-[; ;pic16lf1704.h: 8546: };
-[; ;pic16lf1704.h: 8547: } CLC1SEL0bits_t;
-[; ;pic16lf1704.h: 8548: extern volatile CLC1SEL0bits_t CLC1SEL0bits @ 0xF12;
-[; ;pic16lf1704.h: 8612: extern volatile unsigned char CLC1SEL1 @ 0xF13;
-"8614
-[; ;pic16lf1704.h: 8614: asm("CLC1SEL1 equ 0F13h");
-[; <" CLC1SEL1 equ 0F13h ;# ">
-[; ;pic16lf1704.h: 8617: typedef union {
-[; ;pic16lf1704.h: 8618: struct {
-[; ;pic16lf1704.h: 8619: unsigned LC1D2S0 :1;
-[; ;pic16lf1704.h: 8620: unsigned LC1D2S1 :1;
-[; ;pic16lf1704.h: 8621: unsigned LC1D2S2 :1;
-[; ;pic16lf1704.h: 8622: unsigned LC1D2S3 :1;
-[; ;pic16lf1704.h: 8623: unsigned LC1D2S4 :1;
-[; ;pic16lf1704.h: 8624: };
-[; ;pic16lf1704.h: 8625: struct {
-[; ;pic16lf1704.h: 8626: unsigned LC1D2S :8;
-[; ;pic16lf1704.h: 8627: };
-[; ;pic16lf1704.h: 8628: struct {
-[; ;pic16lf1704.h: 8629: unsigned D2S :8;
-[; ;pic16lf1704.h: 8630: };
-[; ;pic16lf1704.h: 8631: struct {
-[; ;pic16lf1704.h: 8632: unsigned D2S0 :1;
-[; ;pic16lf1704.h: 8633: unsigned D2S1 :1;
-[; ;pic16lf1704.h: 8634: unsigned D2S2 :1;
-[; ;pic16lf1704.h: 8635: unsigned D2S3 :1;
-[; ;pic16lf1704.h: 8636: unsigned D2S4 :1;
-[; ;pic16lf1704.h: 8637: };
-[; ;pic16lf1704.h: 8638: } CLC1SEL1bits_t;
-[; ;pic16lf1704.h: 8639: extern volatile CLC1SEL1bits_t CLC1SEL1bits @ 0xF13;
-[; ;pic16lf1704.h: 8703: extern volatile unsigned char CLC1SEL2 @ 0xF14;
-"8705
-[; ;pic16lf1704.h: 8705: asm("CLC1SEL2 equ 0F14h");
-[; <" CLC1SEL2 equ 0F14h ;# ">
-[; ;pic16lf1704.h: 8708: typedef union {
-[; ;pic16lf1704.h: 8709: struct {
-[; ;pic16lf1704.h: 8710: unsigned LC1D3S0 :1;
-[; ;pic16lf1704.h: 8711: unsigned LC1D3S1 :1;
-[; ;pic16lf1704.h: 8712: unsigned LC1D3S2 :1;
-[; ;pic16lf1704.h: 8713: unsigned LC1D3S3 :1;
-[; ;pic16lf1704.h: 8714: unsigned LC1D3S4 :1;
-[; ;pic16lf1704.h: 8715: };
-[; ;pic16lf1704.h: 8716: struct {
-[; ;pic16lf1704.h: 8717: unsigned LC1D3S :8;
-[; ;pic16lf1704.h: 8718: };
-[; ;pic16lf1704.h: 8719: struct {
-[; ;pic16lf1704.h: 8720: unsigned D3S :8;
-[; ;pic16lf1704.h: 8721: };
-[; ;pic16lf1704.h: 8722: struct {
-[; ;pic16lf1704.h: 8723: unsigned D3S0 :1;
-[; ;pic16lf1704.h: 8724: unsigned D3S1 :1;
-[; ;pic16lf1704.h: 8725: unsigned D3S2 :1;
-[; ;pic16lf1704.h: 8726: unsigned D3S3 :1;
-[; ;pic16lf1704.h: 8727: unsigned D3S4 :1;
-[; ;pic16lf1704.h: 8728: };
-[; ;pic16lf1704.h: 8729: } CLC1SEL2bits_t;
-[; ;pic16lf1704.h: 8730: extern volatile CLC1SEL2bits_t CLC1SEL2bits @ 0xF14;
-[; ;pic16lf1704.h: 8794: extern volatile unsigned char CLC1SEL3 @ 0xF15;
-"8796
-[; ;pic16lf1704.h: 8796: asm("CLC1SEL3 equ 0F15h");
-[; <" CLC1SEL3 equ 0F15h ;# ">
-[; ;pic16lf1704.h: 8799: typedef union {
-[; ;pic16lf1704.h: 8800: struct {
-[; ;pic16lf1704.h: 8801: unsigned LC1D4S0 :1;
-[; ;pic16lf1704.h: 8802: unsigned LC1D4S1 :1;
-[; ;pic16lf1704.h: 8803: unsigned LC1D4S2 :1;
-[; ;pic16lf1704.h: 8804: unsigned LC1D4S3 :1;
-[; ;pic16lf1704.h: 8805: unsigned LC1D4S4 :1;
-[; ;pic16lf1704.h: 8806: };
-[; ;pic16lf1704.h: 8807: struct {
-[; ;pic16lf1704.h: 8808: unsigned LC1D4S :8;
-[; ;pic16lf1704.h: 8809: };
-[; ;pic16lf1704.h: 8810: struct {
-[; ;pic16lf1704.h: 8811: unsigned D4S :8;
-[; ;pic16lf1704.h: 8812: };
-[; ;pic16lf1704.h: 8813: struct {
-[; ;pic16lf1704.h: 8814: unsigned D4S0 :1;
-[; ;pic16lf1704.h: 8815: unsigned D4S1 :1;
-[; ;pic16lf1704.h: 8816: unsigned D4S2 :1;
-[; ;pic16lf1704.h: 8817: unsigned D4S3 :1;
-[; ;pic16lf1704.h: 8818: unsigned D4S4 :1;
-[; ;pic16lf1704.h: 8819: };
-[; ;pic16lf1704.h: 8820: } CLC1SEL3bits_t;
-[; ;pic16lf1704.h: 8821: extern volatile CLC1SEL3bits_t CLC1SEL3bits @ 0xF15;
-[; ;pic16lf1704.h: 8885: extern volatile unsigned char CLC1GLS0 @ 0xF16;
-"8887
-[; ;pic16lf1704.h: 8887: asm("CLC1GLS0 equ 0F16h");
-[; <" CLC1GLS0 equ 0F16h ;# ">
-[; ;pic16lf1704.h: 8890: typedef union {
-[; ;pic16lf1704.h: 8891: struct {
-[; ;pic16lf1704.h: 8892: unsigned LC1G1D1N :1;
-[; ;pic16lf1704.h: 8893: unsigned LC1G1D1T :1;
-[; ;pic16lf1704.h: 8894: unsigned LC1G1D2N :1;
-[; ;pic16lf1704.h: 8895: unsigned LC1G1D2T :1;
-[; ;pic16lf1704.h: 8896: unsigned LC1G1D3N :1;
-[; ;pic16lf1704.h: 8897: unsigned LC1G1D3T :1;
-[; ;pic16lf1704.h: 8898: unsigned LC1G1D4N :1;
-[; ;pic16lf1704.h: 8899: unsigned LC1G1D4T :1;
-[; ;pic16lf1704.h: 8900: };
-[; ;pic16lf1704.h: 8901: struct {
-[; ;pic16lf1704.h: 8902: unsigned D1N :1;
-[; ;pic16lf1704.h: 8903: unsigned D1T :1;
-[; ;pic16lf1704.h: 8904: unsigned D2N :1;
-[; ;pic16lf1704.h: 8905: unsigned D2T :1;
-[; ;pic16lf1704.h: 8906: unsigned D3N :1;
-[; ;pic16lf1704.h: 8907: unsigned D3T :1;
-[; ;pic16lf1704.h: 8908: unsigned D4N :1;
-[; ;pic16lf1704.h: 8909: unsigned D4T :1;
-[; ;pic16lf1704.h: 8910: };
-[; ;pic16lf1704.h: 8911: } CLC1GLS0bits_t;
-[; ;pic16lf1704.h: 8912: extern volatile CLC1GLS0bits_t CLC1GLS0bits @ 0xF16;
-[; ;pic16lf1704.h: 8996: extern volatile unsigned char CLC1GLS1 @ 0xF17;
-"8998
-[; ;pic16lf1704.h: 8998: asm("CLC1GLS1 equ 0F17h");
-[; <" CLC1GLS1 equ 0F17h ;# ">
-[; ;pic16lf1704.h: 9001: typedef union {
-[; ;pic16lf1704.h: 9002: struct {
-[; ;pic16lf1704.h: 9003: unsigned LC1G2D1N :1;
-[; ;pic16lf1704.h: 9004: unsigned LC1G2D1T :1;
-[; ;pic16lf1704.h: 9005: unsigned LC1G2D2N :1;
-[; ;pic16lf1704.h: 9006: unsigned LC1G2D2T :1;
-[; ;pic16lf1704.h: 9007: unsigned LC1G2D3N :1;
-[; ;pic16lf1704.h: 9008: unsigned LC1G2D3T :1;
-[; ;pic16lf1704.h: 9009: unsigned LC1G2D4N :1;
-[; ;pic16lf1704.h: 9010: unsigned LC1G2D4T :1;
-[; ;pic16lf1704.h: 9011: };
-[; ;pic16lf1704.h: 9012: struct {
-[; ;pic16lf1704.h: 9013: unsigned D1N :1;
-[; ;pic16lf1704.h: 9014: unsigned D1T :1;
-[; ;pic16lf1704.h: 9015: unsigned D2N :1;
-[; ;pic16lf1704.h: 9016: unsigned D2T :1;
-[; ;pic16lf1704.h: 9017: unsigned D3N :1;
-[; ;pic16lf1704.h: 9018: unsigned D3T :1;
-[; ;pic16lf1704.h: 9019: unsigned D4N :1;
-[; ;pic16lf1704.h: 9020: unsigned D4T :1;
-[; ;pic16lf1704.h: 9021: };
-[; ;pic16lf1704.h: 9022: } CLC1GLS1bits_t;
-[; ;pic16lf1704.h: 9023: extern volatile CLC1GLS1bits_t CLC1GLS1bits @ 0xF17;
-[; ;pic16lf1704.h: 9107: extern volatile unsigned char CLC1GLS2 @ 0xF18;
-"9109
-[; ;pic16lf1704.h: 9109: asm("CLC1GLS2 equ 0F18h");
-[; <" CLC1GLS2 equ 0F18h ;# ">
-[; ;pic16lf1704.h: 9112: typedef union {
-[; ;pic16lf1704.h: 9113: struct {
-[; ;pic16lf1704.h: 9114: unsigned LC1G3D1N :1;
-[; ;pic16lf1704.h: 9115: unsigned LC1G3D1T :1;
-[; ;pic16lf1704.h: 9116: unsigned LC1G3D2N :1;
-[; ;pic16lf1704.h: 9117: unsigned LC1G3D2T :1;
-[; ;pic16lf1704.h: 9118: unsigned LC1G3D3N :1;
-[; ;pic16lf1704.h: 9119: unsigned LC1G3D3T :1;
-[; ;pic16lf1704.h: 9120: unsigned LC1G3D4N :1;
-[; ;pic16lf1704.h: 9121: unsigned LC1G3D4T :1;
-[; ;pic16lf1704.h: 9122: };
-[; ;pic16lf1704.h: 9123: struct {
-[; ;pic16lf1704.h: 9124: unsigned D1N :1;
-[; ;pic16lf1704.h: 9125: unsigned D1T :1;
-[; ;pic16lf1704.h: 9126: unsigned D2N :1;
-[; ;pic16lf1704.h: 9127: unsigned D2T :1;
-[; ;pic16lf1704.h: 9128: unsigned D3N :1;
-[; ;pic16lf1704.h: 9129: unsigned D3T :1;
-[; ;pic16lf1704.h: 9130: unsigned D4N :1;
-[; ;pic16lf1704.h: 9131: unsigned D4T :1;
-[; ;pic16lf1704.h: 9132: };
-[; ;pic16lf1704.h: 9133: } CLC1GLS2bits_t;
-[; ;pic16lf1704.h: 9134: extern volatile CLC1GLS2bits_t CLC1GLS2bits @ 0xF18;
-[; ;pic16lf1704.h: 9218: extern volatile unsigned char CLC1GLS3 @ 0xF19;
-"9220
-[; ;pic16lf1704.h: 9220: asm("CLC1GLS3 equ 0F19h");
-[; <" CLC1GLS3 equ 0F19h ;# ">
-[; ;pic16lf1704.h: 9223: typedef union {
-[; ;pic16lf1704.h: 9224: struct {
-[; ;pic16lf1704.h: 9225: unsigned LC1G4D1N :1;
-[; ;pic16lf1704.h: 9226: unsigned LC1G4D1T :1;
-[; ;pic16lf1704.h: 9227: unsigned LC1G4D2N :1;
-[; ;pic16lf1704.h: 9228: unsigned LC1G4D2T :1;
-[; ;pic16lf1704.h: 9229: unsigned LC1G4D3N :1;
-[; ;pic16lf1704.h: 9230: unsigned LC1G4D3T :1;
-[; ;pic16lf1704.h: 9231: unsigned LC1G4D4N :1;
-[; ;pic16lf1704.h: 9232: unsigned LC1G4D4T :1;
-[; ;pic16lf1704.h: 9233: };
-[; ;pic16lf1704.h: 9234: struct {
-[; ;pic16lf1704.h: 9235: unsigned G4D1N :1;
-[; ;pic16lf1704.h: 9236: unsigned G4D1T :1;
-[; ;pic16lf1704.h: 9237: unsigned G4D2N :1;
-[; ;pic16lf1704.h: 9238: unsigned G4D2T :1;
-[; ;pic16lf1704.h: 9239: unsigned G4D3N :1;
-[; ;pic16lf1704.h: 9240: unsigned G4D3T :1;
-[; ;pic16lf1704.h: 9241: unsigned G4D4N :1;
-[; ;pic16lf1704.h: 9242: unsigned G4D4T :1;
-[; ;pic16lf1704.h: 9243: };
-[; ;pic16lf1704.h: 9244: } CLC1GLS3bits_t;
-[; ;pic16lf1704.h: 9245: extern volatile CLC1GLS3bits_t CLC1GLS3bits @ 0xF19;
-[; ;pic16lf1704.h: 9329: extern volatile unsigned char CLC2CON @ 0xF1A;
-"9331
-[; ;pic16lf1704.h: 9331: asm("CLC2CON equ 0F1Ah");
-[; <" CLC2CON equ 0F1Ah ;# ">
-[; ;pic16lf1704.h: 9334: typedef union {
-[; ;pic16lf1704.h: 9335: struct {
-[; ;pic16lf1704.h: 9336: unsigned LC2MODE :3;
-[; ;pic16lf1704.h: 9337: unsigned LC2INTN :1;
-[; ;pic16lf1704.h: 9338: unsigned LC2INTP :1;
-[; ;pic16lf1704.h: 9339: unsigned LC2OUT :1;
-[; ;pic16lf1704.h: 9340: unsigned :1;
-[; ;pic16lf1704.h: 9341: unsigned LC2EN :1;
-[; ;pic16lf1704.h: 9342: };
-[; ;pic16lf1704.h: 9343: struct {
-[; ;pic16lf1704.h: 9344: unsigned LC2MODE0 :1;
-[; ;pic16lf1704.h: 9345: unsigned LC2MODE1 :1;
-[; ;pic16lf1704.h: 9346: unsigned LC2MODE2 :1;
-[; ;pic16lf1704.h: 9347: };
-[; ;pic16lf1704.h: 9348: struct {
-[; ;pic16lf1704.h: 9349: unsigned MODE :3;
-[; ;pic16lf1704.h: 9350: unsigned INTN :1;
-[; ;pic16lf1704.h: 9351: unsigned INTP :1;
-[; ;pic16lf1704.h: 9352: unsigned OUT :1;
-[; ;pic16lf1704.h: 9353: unsigned :1;
-[; ;pic16lf1704.h: 9354: unsigned EN :1;
-[; ;pic16lf1704.h: 9355: };
-[; ;pic16lf1704.h: 9356: struct {
-[; ;pic16lf1704.h: 9357: unsigned MODE0 :1;
-[; ;pic16lf1704.h: 9358: unsigned MODE1 :1;
-[; ;pic16lf1704.h: 9359: unsigned MODE2 :1;
-[; ;pic16lf1704.h: 9360: };
-[; ;pic16lf1704.h: 9361: } CLC2CONbits_t;
-[; ;pic16lf1704.h: 9362: extern volatile CLC2CONbits_t CLC2CONbits @ 0xF1A;
-[; ;pic16lf1704.h: 9446: extern volatile unsigned char CLC2POL @ 0xF1B;
-"9448
-[; ;pic16lf1704.h: 9448: asm("CLC2POL equ 0F1Bh");
-[; <" CLC2POL equ 0F1Bh ;# ">
-[; ;pic16lf1704.h: 9451: typedef union {
-[; ;pic16lf1704.h: 9452: struct {
-[; ;pic16lf1704.h: 9453: unsigned LC2G1POL :1;
-[; ;pic16lf1704.h: 9454: unsigned LC2G2POL :1;
-[; ;pic16lf1704.h: 9455: unsigned LC2G3POL :1;
-[; ;pic16lf1704.h: 9456: unsigned LC2G4POL :1;
-[; ;pic16lf1704.h: 9457: unsigned :3;
-[; ;pic16lf1704.h: 9458: unsigned LC2POL :1;
-[; ;pic16lf1704.h: 9459: };
-[; ;pic16lf1704.h: 9460: struct {
-[; ;pic16lf1704.h: 9461: unsigned G1POL :1;
-[; ;pic16lf1704.h: 9462: unsigned G2POL :1;
-[; ;pic16lf1704.h: 9463: unsigned G3POL :1;
-[; ;pic16lf1704.h: 9464: unsigned G4POL :1;
-[; ;pic16lf1704.h: 9465: unsigned :3;
-[; ;pic16lf1704.h: 9466: unsigned POL :1;
-[; ;pic16lf1704.h: 9467: };
-[; ;pic16lf1704.h: 9468: } CLC2POLbits_t;
-[; ;pic16lf1704.h: 9469: extern volatile CLC2POLbits_t CLC2POLbits @ 0xF1B;
-[; ;pic16lf1704.h: 9523: extern volatile unsigned char CLC2SEL0 @ 0xF1C;
-"9525
-[; ;pic16lf1704.h: 9525: asm("CLC2SEL0 equ 0F1Ch");
-[; <" CLC2SEL0 equ 0F1Ch ;# ">
-[; ;pic16lf1704.h: 9528: typedef union {
-[; ;pic16lf1704.h: 9529: struct {
-[; ;pic16lf1704.h: 9530: unsigned LC2D1S0 :1;
-[; ;pic16lf1704.h: 9531: unsigned LC2D1S1 :1;
-[; ;pic16lf1704.h: 9532: unsigned LC2D1S2 :1;
-[; ;pic16lf1704.h: 9533: unsigned LC2D1S3 :1;
-[; ;pic16lf1704.h: 9534: unsigned LC2D1S4 :1;
-[; ;pic16lf1704.h: 9535: };
-[; ;pic16lf1704.h: 9536: struct {
-[; ;pic16lf1704.h: 9537: unsigned LC2D1S :8;
-[; ;pic16lf1704.h: 9538: };
-[; ;pic16lf1704.h: 9539: struct {
-[; ;pic16lf1704.h: 9540: unsigned D1S :8;
-[; ;pic16lf1704.h: 9541: };
-[; ;pic16lf1704.h: 9542: struct {
-[; ;pic16lf1704.h: 9543: unsigned D1S0 :1;
-[; ;pic16lf1704.h: 9544: unsigned D1S1 :1;
-[; ;pic16lf1704.h: 9545: unsigned D1S2 :1;
-[; ;pic16lf1704.h: 9546: unsigned D1S3 :1;
-[; ;pic16lf1704.h: 9547: unsigned D1S4 :1;
-[; ;pic16lf1704.h: 9548: };
-[; ;pic16lf1704.h: 9549: } CLC2SEL0bits_t;
-[; ;pic16lf1704.h: 9550: extern volatile CLC2SEL0bits_t CLC2SEL0bits @ 0xF1C;
-[; ;pic16lf1704.h: 9614: extern volatile unsigned char CLC2SEL1 @ 0xF1D;
-"9616
-[; ;pic16lf1704.h: 9616: asm("CLC2SEL1 equ 0F1Dh");
-[; <" CLC2SEL1 equ 0F1Dh ;# ">
-[; ;pic16lf1704.h: 9619: typedef union {
-[; ;pic16lf1704.h: 9620: struct {
-[; ;pic16lf1704.h: 9621: unsigned LC2D2S0 :1;
-[; ;pic16lf1704.h: 9622: unsigned LC2D2S1 :1;
-[; ;pic16lf1704.h: 9623: unsigned LC2D2S2 :1;
-[; ;pic16lf1704.h: 9624: unsigned LC2D2S3 :1;
-[; ;pic16lf1704.h: 9625: unsigned LC2D2S4 :1;
-[; ;pic16lf1704.h: 9626: };
-[; ;pic16lf1704.h: 9627: struct {
-[; ;pic16lf1704.h: 9628: unsigned LC2D2S :8;
-[; ;pic16lf1704.h: 9629: };
-[; ;pic16lf1704.h: 9630: struct {
-[; ;pic16lf1704.h: 9631: unsigned D2S :8;
-[; ;pic16lf1704.h: 9632: };
-[; ;pic16lf1704.h: 9633: struct {
-[; ;pic16lf1704.h: 9634: unsigned D2S0 :1;
-[; ;pic16lf1704.h: 9635: unsigned D2S1 :1;
-[; ;pic16lf1704.h: 9636: unsigned D2S2 :1;
-[; ;pic16lf1704.h: 9637: unsigned D2S3 :1;
-[; ;pic16lf1704.h: 9638: unsigned D2S4 :1;
-[; ;pic16lf1704.h: 9639: };
-[; ;pic16lf1704.h: 9640: } CLC2SEL1bits_t;
-[; ;pic16lf1704.h: 9641: extern volatile CLC2SEL1bits_t CLC2SEL1bits @ 0xF1D;
-[; ;pic16lf1704.h: 9705: extern volatile unsigned char CLC2SEL2 @ 0xF1E;
-"9707
-[; ;pic16lf1704.h: 9707: asm("CLC2SEL2 equ 0F1Eh");
-[; <" CLC2SEL2 equ 0F1Eh ;# ">
-[; ;pic16lf1704.h: 9710: typedef union {
-[; ;pic16lf1704.h: 9711: struct {
-[; ;pic16lf1704.h: 9712: unsigned LC2D3S0 :1;
-[; ;pic16lf1704.h: 9713: unsigned LC2D3S1 :1;
-[; ;pic16lf1704.h: 9714: unsigned LC2D3S2 :1;
-[; ;pic16lf1704.h: 9715: unsigned LC2D3S3 :1;
-[; ;pic16lf1704.h: 9716: unsigned LC2D3S4 :1;
-[; ;pic16lf1704.h: 9717: };
-[; ;pic16lf1704.h: 9718: struct {
-[; ;pic16lf1704.h: 9719: unsigned LC2D3S :8;
-[; ;pic16lf1704.h: 9720: };
-[; ;pic16lf1704.h: 9721: struct {
-[; ;pic16lf1704.h: 9722: unsigned D3S :8;
-[; ;pic16lf1704.h: 9723: };
-[; ;pic16lf1704.h: 9724: struct {
-[; ;pic16lf1704.h: 9725: unsigned D3S0 :1;
-[; ;pic16lf1704.h: 9726: unsigned D3S1 :1;
-[; ;pic16lf1704.h: 9727: unsigned D3S2 :1;
-[; ;pic16lf1704.h: 9728: unsigned D3S3 :1;
-[; ;pic16lf1704.h: 9729: unsigned D3S4 :1;
-[; ;pic16lf1704.h: 9730: };
-[; ;pic16lf1704.h: 9731: } CLC2SEL2bits_t;
-[; ;pic16lf1704.h: 9732: extern volatile CLC2SEL2bits_t CLC2SEL2bits @ 0xF1E;
-[; ;pic16lf1704.h: 9796: extern volatile unsigned char CLC2SEL3 @ 0xF1F;
-"9798
-[; ;pic16lf1704.h: 9798: asm("CLC2SEL3 equ 0F1Fh");
-[; <" CLC2SEL3 equ 0F1Fh ;# ">
-[; ;pic16lf1704.h: 9801: typedef union {
-[; ;pic16lf1704.h: 9802: struct {
-[; ;pic16lf1704.h: 9803: unsigned LC2D4S0 :1;
-[; ;pic16lf1704.h: 9804: unsigned LC2D4S1 :1;
-[; ;pic16lf1704.h: 9805: unsigned LC2D4S2 :1;
-[; ;pic16lf1704.h: 9806: unsigned LC2D4S3 :1;
-[; ;pic16lf1704.h: 9807: unsigned LC2D4S4 :1;
-[; ;pic16lf1704.h: 9808: };
-[; ;pic16lf1704.h: 9809: struct {
-[; ;pic16lf1704.h: 9810: unsigned LC2D4S :8;
-[; ;pic16lf1704.h: 9811: };
-[; ;pic16lf1704.h: 9812: struct {
-[; ;pic16lf1704.h: 9813: unsigned D4S :8;
-[; ;pic16lf1704.h: 9814: };
-[; ;pic16lf1704.h: 9815: struct {
-[; ;pic16lf1704.h: 9816: unsigned D4S0 :1;
-[; ;pic16lf1704.h: 9817: unsigned D4S1 :1;
-[; ;pic16lf1704.h: 9818: unsigned D4S2 :1;
-[; ;pic16lf1704.h: 9819: unsigned D4S3 :1;
-[; ;pic16lf1704.h: 9820: unsigned D4S4 :1;
-[; ;pic16lf1704.h: 9821: };
-[; ;pic16lf1704.h: 9822: } CLC2SEL3bits_t;
-[; ;pic16lf1704.h: 9823: extern volatile CLC2SEL3bits_t CLC2SEL3bits @ 0xF1F;
-[; ;pic16lf1704.h: 9887: extern volatile unsigned char CLC2GLS0 @ 0xF20;
-"9889
-[; ;pic16lf1704.h: 9889: asm("CLC2GLS0 equ 0F20h");
-[; <" CLC2GLS0 equ 0F20h ;# ">
-[; ;pic16lf1704.h: 9892: typedef union {
-[; ;pic16lf1704.h: 9893: struct {
-[; ;pic16lf1704.h: 9894: unsigned LC2G1D1N :1;
-[; ;pic16lf1704.h: 9895: unsigned LC2G1D1T :1;
-[; ;pic16lf1704.h: 9896: unsigned LC2G1D2N :1;
-[; ;pic16lf1704.h: 9897: unsigned LC2G1D2T :1;
-[; ;pic16lf1704.h: 9898: unsigned LC2G1D3N :1;
-[; ;pic16lf1704.h: 9899: unsigned LC2G1D3T :1;
-[; ;pic16lf1704.h: 9900: unsigned LC2G1D4N :1;
-[; ;pic16lf1704.h: 9901: unsigned LC2G1D4T :1;
-[; ;pic16lf1704.h: 9902: };
-[; ;pic16lf1704.h: 9903: struct {
-[; ;pic16lf1704.h: 9904: unsigned D1N :1;
-[; ;pic16lf1704.h: 9905: unsigned D1T :1;
-[; ;pic16lf1704.h: 9906: unsigned D2N :1;
-[; ;pic16lf1704.h: 9907: unsigned D2T :1;
-[; ;pic16lf1704.h: 9908: unsigned D3N :1;
-[; ;pic16lf1704.h: 9909: unsigned D3T :1;
-[; ;pic16lf1704.h: 9910: unsigned D4N :1;
-[; ;pic16lf1704.h: 9911: unsigned D4T :1;
-[; ;pic16lf1704.h: 9912: };
-[; ;pic16lf1704.h: 9913: } CLC2GLS0bits_t;
-[; ;pic16lf1704.h: 9914: extern volatile CLC2GLS0bits_t CLC2GLS0bits @ 0xF20;
-[; ;pic16lf1704.h: 9998: extern volatile unsigned char CLC2GLS1 @ 0xF21;
-"10000
-[; ;pic16lf1704.h: 10000: asm("CLC2GLS1 equ 0F21h");
-[; <" CLC2GLS1 equ 0F21h ;# ">
-[; ;pic16lf1704.h: 10003: typedef union {
-[; ;pic16lf1704.h: 10004: struct {
-[; ;pic16lf1704.h: 10005: unsigned LC2G2D1N :1;
-[; ;pic16lf1704.h: 10006: unsigned LC2G2D1T :1;
-[; ;pic16lf1704.h: 10007: unsigned LC2G2D2N :1;
-[; ;pic16lf1704.h: 10008: unsigned LC2G2D2T :1;
-[; ;pic16lf1704.h: 10009: unsigned LC2G2D3N :1;
-[; ;pic16lf1704.h: 10010: unsigned LC2G2D3T :1;
-[; ;pic16lf1704.h: 10011: unsigned LC2G2D4N :1;
-[; ;pic16lf1704.h: 10012: unsigned LC2G2D4T :1;
-[; ;pic16lf1704.h: 10013: };
-[; ;pic16lf1704.h: 10014: struct {
-[; ;pic16lf1704.h: 10015: unsigned D1N :1;
-[; ;pic16lf1704.h: 10016: unsigned D1T :1;
-[; ;pic16lf1704.h: 10017: unsigned D2N :1;
-[; ;pic16lf1704.h: 10018: unsigned D2T :1;
-[; ;pic16lf1704.h: 10019: unsigned D3N :1;
-[; ;pic16lf1704.h: 10020: unsigned D3T :1;
-[; ;pic16lf1704.h: 10021: unsigned D4N :1;
-[; ;pic16lf1704.h: 10022: unsigned D4T :1;
-[; ;pic16lf1704.h: 10023: };
-[; ;pic16lf1704.h: 10024: } CLC2GLS1bits_t;
-[; ;pic16lf1704.h: 10025: extern volatile CLC2GLS1bits_t CLC2GLS1bits @ 0xF21;
-[; ;pic16lf1704.h: 10109: extern volatile unsigned char CLC2GLS2 @ 0xF22;
-"10111
-[; ;pic16lf1704.h: 10111: asm("CLC2GLS2 equ 0F22h");
-[; <" CLC2GLS2 equ 0F22h ;# ">
-[; ;pic16lf1704.h: 10114: typedef union {
-[; ;pic16lf1704.h: 10115: struct {
-[; ;pic16lf1704.h: 10116: unsigned LC2G3D1N :1;
-[; ;pic16lf1704.h: 10117: unsigned LC2G3D1T :1;
-[; ;pic16lf1704.h: 10118: unsigned LC2G3D2N :1;
-[; ;pic16lf1704.h: 10119: unsigned LC2G3D2T :1;
-[; ;pic16lf1704.h: 10120: unsigned LC2G3D3N :1;
-[; ;pic16lf1704.h: 10121: unsigned LC2G3D3T :1;
-[; ;pic16lf1704.h: 10122: unsigned LC2G3D4N :1;
-[; ;pic16lf1704.h: 10123: unsigned LC2G3D4T :1;
-[; ;pic16lf1704.h: 10124: };
-[; ;pic16lf1704.h: 10125: struct {
-[; ;pic16lf1704.h: 10126: unsigned D1N :1;
-[; ;pic16lf1704.h: 10127: unsigned D1T :1;
-[; ;pic16lf1704.h: 10128: unsigned D2N :1;
-[; ;pic16lf1704.h: 10129: unsigned D2T :1;
-[; ;pic16lf1704.h: 10130: unsigned D3N :1;
-[; ;pic16lf1704.h: 10131: unsigned D3T :1;
-[; ;pic16lf1704.h: 10132: unsigned D4N :1;
-[; ;pic16lf1704.h: 10133: unsigned D4T :1;
-[; ;pic16lf1704.h: 10134: };
-[; ;pic16lf1704.h: 10135: } CLC2GLS2bits_t;
-[; ;pic16lf1704.h: 10136: extern volatile CLC2GLS2bits_t CLC2GLS2bits @ 0xF22;
-[; ;pic16lf1704.h: 10220: extern volatile unsigned char CLC2GLS3 @ 0xF23;
-"10222
-[; ;pic16lf1704.h: 10222: asm("CLC2GLS3 equ 0F23h");
-[; <" CLC2GLS3 equ 0F23h ;# ">
-[; ;pic16lf1704.h: 10225: typedef union {
-[; ;pic16lf1704.h: 10226: struct {
-[; ;pic16lf1704.h: 10227: unsigned LC2G4D1N :1;
-[; ;pic16lf1704.h: 10228: unsigned LC2G4D1T :1;
-[; ;pic16lf1704.h: 10229: unsigned LC2G4D2N :1;
-[; ;pic16lf1704.h: 10230: unsigned LC2G4D2T :1;
-[; ;pic16lf1704.h: 10231: unsigned LC2G4D3N :1;
-[; ;pic16lf1704.h: 10232: unsigned LC2G4D3T :1;
-[; ;pic16lf1704.h: 10233: unsigned LC2G4D4N :1;
-[; ;pic16lf1704.h: 10234: unsigned LC2G4D4T :1;
-[; ;pic16lf1704.h: 10235: };
-[; ;pic16lf1704.h: 10236: struct {
-[; ;pic16lf1704.h: 10237: unsigned G4D1N :1;
-[; ;pic16lf1704.h: 10238: unsigned G4D1T :1;
-[; ;pic16lf1704.h: 10239: unsigned G4D2N :1;
-[; ;pic16lf1704.h: 10240: unsigned G4D2T :1;
-[; ;pic16lf1704.h: 10241: unsigned G4D3N :1;
-[; ;pic16lf1704.h: 10242: unsigned G4D3T :1;
-[; ;pic16lf1704.h: 10243: unsigned G4D4N :1;
-[; ;pic16lf1704.h: 10244: unsigned G4D4T :1;
-[; ;pic16lf1704.h: 10245: };
-[; ;pic16lf1704.h: 10246: } CLC2GLS3bits_t;
-[; ;pic16lf1704.h: 10247: extern volatile CLC2GLS3bits_t CLC2GLS3bits @ 0xF23;
-[; ;pic16lf1704.h: 10331: extern volatile unsigned char CLC3CON @ 0xF24;
-"10333
-[; ;pic16lf1704.h: 10333: asm("CLC3CON equ 0F24h");
-[; <" CLC3CON equ 0F24h ;# ">
-[; ;pic16lf1704.h: 10336: typedef union {
-[; ;pic16lf1704.h: 10337: struct {
-[; ;pic16lf1704.h: 10338: unsigned LC3MODE :3;
-[; ;pic16lf1704.h: 10339: unsigned LC3INTN :1;
-[; ;pic16lf1704.h: 10340: unsigned LC3INTP :1;
-[; ;pic16lf1704.h: 10341: unsigned LC3OUT :1;
-[; ;pic16lf1704.h: 10342: unsigned :1;
-[; ;pic16lf1704.h: 10343: unsigned LC3EN :1;
-[; ;pic16lf1704.h: 10344: };
-[; ;pic16lf1704.h: 10345: struct {
-[; ;pic16lf1704.h: 10346: unsigned LC3MODE0 :1;
-[; ;pic16lf1704.h: 10347: unsigned LC3MODE1 :1;
-[; ;pic16lf1704.h: 10348: unsigned LC3MODE2 :1;
-[; ;pic16lf1704.h: 10349: };
-[; ;pic16lf1704.h: 10350: struct {
-[; ;pic16lf1704.h: 10351: unsigned MODE :3;
-[; ;pic16lf1704.h: 10352: unsigned INTN :1;
-[; ;pic16lf1704.h: 10353: unsigned INTP :1;
-[; ;pic16lf1704.h: 10354: unsigned OUT :1;
-[; ;pic16lf1704.h: 10355: unsigned :1;
-[; ;pic16lf1704.h: 10356: unsigned EN :1;
-[; ;pic16lf1704.h: 10357: };
-[; ;pic16lf1704.h: 10358: struct {
-[; ;pic16lf1704.h: 10359: unsigned MODE0 :1;
-[; ;pic16lf1704.h: 10360: unsigned MODE1 :1;
-[; ;pic16lf1704.h: 10361: unsigned MODE2 :1;
-[; ;pic16lf1704.h: 10362: };
-[; ;pic16lf1704.h: 10363: } CLC3CONbits_t;
-[; ;pic16lf1704.h: 10364: extern volatile CLC3CONbits_t CLC3CONbits @ 0xF24;
-[; ;pic16lf1704.h: 10448: extern volatile unsigned char CLC3POL @ 0xF25;
-"10450
-[; ;pic16lf1704.h: 10450: asm("CLC3POL equ 0F25h");
-[; <" CLC3POL equ 0F25h ;# ">
-[; ;pic16lf1704.h: 10453: typedef union {
-[; ;pic16lf1704.h: 10454: struct {
-[; ;pic16lf1704.h: 10455: unsigned LC3G1POL :1;
-[; ;pic16lf1704.h: 10456: unsigned LC3G2POL :1;
-[; ;pic16lf1704.h: 10457: unsigned LC3G3POL :1;
-[; ;pic16lf1704.h: 10458: unsigned LC3G4POL :1;
-[; ;pic16lf1704.h: 10459: unsigned :3;
-[; ;pic16lf1704.h: 10460: unsigned LC3POL :1;
-[; ;pic16lf1704.h: 10461: };
-[; ;pic16lf1704.h: 10462: struct {
-[; ;pic16lf1704.h: 10463: unsigned G1POL :1;
-[; ;pic16lf1704.h: 10464: unsigned G2POL :1;
-[; ;pic16lf1704.h: 10465: unsigned G3POL :1;
-[; ;pic16lf1704.h: 10466: unsigned G4POL :1;
-[; ;pic16lf1704.h: 10467: unsigned :3;
-[; ;pic16lf1704.h: 10468: unsigned POL :1;
-[; ;pic16lf1704.h: 10469: };
-[; ;pic16lf1704.h: 10470: } CLC3POLbits_t;
-[; ;pic16lf1704.h: 10471: extern volatile CLC3POLbits_t CLC3POLbits @ 0xF25;
-[; ;pic16lf1704.h: 10525: extern volatile unsigned char CLC3SEL0 @ 0xF26;
-"10527
-[; ;pic16lf1704.h: 10527: asm("CLC3SEL0 equ 0F26h");
-[; <" CLC3SEL0 equ 0F26h ;# ">
-[; ;pic16lf1704.h: 10530: typedef union {
-[; ;pic16lf1704.h: 10531: struct {
-[; ;pic16lf1704.h: 10532: unsigned LC3D1S0 :1;
-[; ;pic16lf1704.h: 10533: unsigned LC3D1S1 :1;
-[; ;pic16lf1704.h: 10534: unsigned LC3D1S2 :1;
-[; ;pic16lf1704.h: 10535: unsigned LC3D1S3 :1;
-[; ;pic16lf1704.h: 10536: unsigned LC3D1S4 :1;
-[; ;pic16lf1704.h: 10537: };
-[; ;pic16lf1704.h: 10538: struct {
-[; ;pic16lf1704.h: 10539: unsigned LC3D1S :8;
-[; ;pic16lf1704.h: 10540: };
-[; ;pic16lf1704.h: 10541: struct {
-[; ;pic16lf1704.h: 10542: unsigned D1S :8;
-[; ;pic16lf1704.h: 10543: };
-[; ;pic16lf1704.h: 10544: struct {
-[; ;pic16lf1704.h: 10545: unsigned D1S0 :1;
-[; ;pic16lf1704.h: 10546: unsigned D1S1 :1;
-[; ;pic16lf1704.h: 10547: unsigned D1S2 :1;
-[; ;pic16lf1704.h: 10548: unsigned D1S3 :1;
-[; ;pic16lf1704.h: 10549: unsigned D1S4 :1;
-[; ;pic16lf1704.h: 10550: };
-[; ;pic16lf1704.h: 10551: } CLC3SEL0bits_t;
-[; ;pic16lf1704.h: 10552: extern volatile CLC3SEL0bits_t CLC3SEL0bits @ 0xF26;
-[; ;pic16lf1704.h: 10616: extern volatile unsigned char CLC3SEL1 @ 0xF27;
-"10618
-[; ;pic16lf1704.h: 10618: asm("CLC3SEL1 equ 0F27h");
-[; <" CLC3SEL1 equ 0F27h ;# ">
-[; ;pic16lf1704.h: 10621: typedef union {
-[; ;pic16lf1704.h: 10622: struct {
-[; ;pic16lf1704.h: 10623: unsigned LC3D2S0 :1;
-[; ;pic16lf1704.h: 10624: unsigned LC3D2S1 :1;
-[; ;pic16lf1704.h: 10625: unsigned LC3D2S2 :1;
-[; ;pic16lf1704.h: 10626: unsigned LC3D2S3 :1;
-[; ;pic16lf1704.h: 10627: unsigned LC3D2S4 :1;
-[; ;pic16lf1704.h: 10628: };
-[; ;pic16lf1704.h: 10629: struct {
-[; ;pic16lf1704.h: 10630: unsigned LC3D2S :8;
-[; ;pic16lf1704.h: 10631: };
-[; ;pic16lf1704.h: 10632: struct {
-[; ;pic16lf1704.h: 10633: unsigned D2S :8;
-[; ;pic16lf1704.h: 10634: };
-[; ;pic16lf1704.h: 10635: struct {
-[; ;pic16lf1704.h: 10636: unsigned D2S0 :1;
-[; ;pic16lf1704.h: 10637: unsigned D2S1 :1;
-[; ;pic16lf1704.h: 10638: unsigned D2S2 :1;
-[; ;pic16lf1704.h: 10639: unsigned D2S3 :1;
-[; ;pic16lf1704.h: 10640: unsigned D2S4 :1;
-[; ;pic16lf1704.h: 10641: };
-[; ;pic16lf1704.h: 10642: } CLC3SEL1bits_t;
-[; ;pic16lf1704.h: 10643: extern volatile CLC3SEL1bits_t CLC3SEL1bits @ 0xF27;
-[; ;pic16lf1704.h: 10707: extern volatile unsigned char CLC3SEL2 @ 0xF28;
-"10709
-[; ;pic16lf1704.h: 10709: asm("CLC3SEL2 equ 0F28h");
-[; <" CLC3SEL2 equ 0F28h ;# ">
-[; ;pic16lf1704.h: 10712: typedef union {
-[; ;pic16lf1704.h: 10713: struct {
-[; ;pic16lf1704.h: 10714: unsigned LC3D3S0 :1;
-[; ;pic16lf1704.h: 10715: unsigned LC3D3S1 :1;
-[; ;pic16lf1704.h: 10716: unsigned LC3D3S2 :1;
-[; ;pic16lf1704.h: 10717: unsigned LC3D3S3 :1;
-[; ;pic16lf1704.h: 10718: unsigned LC3D3S4 :1;
-[; ;pic16lf1704.h: 10719: };
-[; ;pic16lf1704.h: 10720: struct {
-[; ;pic16lf1704.h: 10721: unsigned LC3D3S :8;
-[; ;pic16lf1704.h: 10722: };
-[; ;pic16lf1704.h: 10723: struct {
-[; ;pic16lf1704.h: 10724: unsigned D3S :8;
-[; ;pic16lf1704.h: 10725: };
-[; ;pic16lf1704.h: 10726: struct {
-[; ;pic16lf1704.h: 10727: unsigned D3S0 :1;
-[; ;pic16lf1704.h: 10728: unsigned D3S1 :1;
-[; ;pic16lf1704.h: 10729: unsigned D3S2 :1;
-[; ;pic16lf1704.h: 10730: unsigned D3S3 :1;
-[; ;pic16lf1704.h: 10731: unsigned D3S4 :1;
-[; ;pic16lf1704.h: 10732: };
-[; ;pic16lf1704.h: 10733: } CLC3SEL2bits_t;
-[; ;pic16lf1704.h: 10734: extern volatile CLC3SEL2bits_t CLC3SEL2bits @ 0xF28;
-[; ;pic16lf1704.h: 10798: extern volatile unsigned char CLC3SEL3 @ 0xF29;
-"10800
-[; ;pic16lf1704.h: 10800: asm("CLC3SEL3 equ 0F29h");
-[; <" CLC3SEL3 equ 0F29h ;# ">
-[; ;pic16lf1704.h: 10803: typedef union {
-[; ;pic16lf1704.h: 10804: struct {
-[; ;pic16lf1704.h: 10805: unsigned LC3D4S0 :1;
-[; ;pic16lf1704.h: 10806: unsigned LC3D4S1 :1;
-[; ;pic16lf1704.h: 10807: unsigned LC3D4S2 :1;
-[; ;pic16lf1704.h: 10808: unsigned LC3D4S3 :1;
-[; ;pic16lf1704.h: 10809: unsigned LC3D4S4 :1;
-[; ;pic16lf1704.h: 10810: };
-[; ;pic16lf1704.h: 10811: struct {
-[; ;pic16lf1704.h: 10812: unsigned LC3D4S :8;
-[; ;pic16lf1704.h: 10813: };
-[; ;pic16lf1704.h: 10814: struct {
-[; ;pic16lf1704.h: 10815: unsigned D4S :8;
-[; ;pic16lf1704.h: 10816: };
-[; ;pic16lf1704.h: 10817: struct {
-[; ;pic16lf1704.h: 10818: unsigned D4S0 :1;
-[; ;pic16lf1704.h: 10819: unsigned D4S1 :1;
-[; ;pic16lf1704.h: 10820: unsigned D4S2 :1;
-[; ;pic16lf1704.h: 10821: unsigned D4S3 :1;
-[; ;pic16lf1704.h: 10822: unsigned D4S4 :1;
-[; ;pic16lf1704.h: 10823: };
-[; ;pic16lf1704.h: 10824: } CLC3SEL3bits_t;
-[; ;pic16lf1704.h: 10825: extern volatile CLC3SEL3bits_t CLC3SEL3bits @ 0xF29;
-[; ;pic16lf1704.h: 10889: extern volatile unsigned char CLC3GLS0 @ 0xF2A;
-"10891
-[; ;pic16lf1704.h: 10891: asm("CLC3GLS0 equ 0F2Ah");
-[; <" CLC3GLS0 equ 0F2Ah ;# ">
-[; ;pic16lf1704.h: 10894: typedef union {
-[; ;pic16lf1704.h: 10895: struct {
-[; ;pic16lf1704.h: 10896: unsigned LC3G1D1N :1;
-[; ;pic16lf1704.h: 10897: unsigned LC3G1D1T :1;
-[; ;pic16lf1704.h: 10898: unsigned LC3G1D2N :1;
-[; ;pic16lf1704.h: 10899: unsigned LC3G1D2T :1;
-[; ;pic16lf1704.h: 10900: unsigned LC3G1D3N :1;
-[; ;pic16lf1704.h: 10901: unsigned LC3G1D3T :1;
-[; ;pic16lf1704.h: 10902: unsigned LC3G1D4N :1;
-[; ;pic16lf1704.h: 10903: unsigned LC3G1D4T :1;
-[; ;pic16lf1704.h: 10904: };
-[; ;pic16lf1704.h: 10905: struct {
-[; ;pic16lf1704.h: 10906: unsigned D1N :1;
-[; ;pic16lf1704.h: 10907: unsigned D1T :1;
-[; ;pic16lf1704.h: 10908: unsigned D2N :1;
-[; ;pic16lf1704.h: 10909: unsigned D2T :1;
-[; ;pic16lf1704.h: 10910: unsigned D3N :1;
-[; ;pic16lf1704.h: 10911: unsigned D3T :1;
-[; ;pic16lf1704.h: 10912: unsigned D4N :1;
-[; ;pic16lf1704.h: 10913: unsigned D4T :1;
-[; ;pic16lf1704.h: 10914: };
-[; ;pic16lf1704.h: 10915: } CLC3GLS0bits_t;
-[; ;pic16lf1704.h: 10916: extern volatile CLC3GLS0bits_t CLC3GLS0bits @ 0xF2A;
-[; ;pic16lf1704.h: 11000: extern volatile unsigned char CLC3GLS1 @ 0xF2B;
-"11002
-[; ;pic16lf1704.h: 11002: asm("CLC3GLS1 equ 0F2Bh");
-[; <" CLC3GLS1 equ 0F2Bh ;# ">
-[; ;pic16lf1704.h: 11005: typedef union {
-[; ;pic16lf1704.h: 11006: struct {
-[; ;pic16lf1704.h: 11007: unsigned LC3G2D1N :1;
-[; ;pic16lf1704.h: 11008: unsigned LC3G2D1T :1;
-[; ;pic16lf1704.h: 11009: unsigned LC3G2D2N :1;
-[; ;pic16lf1704.h: 11010: unsigned LC3G2D2T :1;
-[; ;pic16lf1704.h: 11011: unsigned LC3G2D3N :1;
-[; ;pic16lf1704.h: 11012: unsigned LC3G2D3T :1;
-[; ;pic16lf1704.h: 11013: unsigned LC3G2D4N :1;
-[; ;pic16lf1704.h: 11014: unsigned LC3G2D4T :1;
-[; ;pic16lf1704.h: 11015: };
-[; ;pic16lf1704.h: 11016: struct {
-[; ;pic16lf1704.h: 11017: unsigned D1N :1;
-[; ;pic16lf1704.h: 11018: unsigned D1T :1;
-[; ;pic16lf1704.h: 11019: unsigned D2N :1;
-[; ;pic16lf1704.h: 11020: unsigned D2T :1;
-[; ;pic16lf1704.h: 11021: unsigned D3N :1;
-[; ;pic16lf1704.h: 11022: unsigned D3T :1;
-[; ;pic16lf1704.h: 11023: unsigned D4N :1;
-[; ;pic16lf1704.h: 11024: unsigned D4T :1;
-[; ;pic16lf1704.h: 11025: };
-[; ;pic16lf1704.h: 11026: } CLC3GLS1bits_t;
-[; ;pic16lf1704.h: 11027: extern volatile CLC3GLS1bits_t CLC3GLS1bits @ 0xF2B;
-[; ;pic16lf1704.h: 11111: extern volatile unsigned char CLC3GLS2 @ 0xF2C;
-"11113
-[; ;pic16lf1704.h: 11113: asm("CLC3GLS2 equ 0F2Ch");
-[; <" CLC3GLS2 equ 0F2Ch ;# ">
-[; ;pic16lf1704.h: 11116: typedef union {
-[; ;pic16lf1704.h: 11117: struct {
-[; ;pic16lf1704.h: 11118: unsigned LC3G3D1N :1;
-[; ;pic16lf1704.h: 11119: unsigned LC3G3D1T :1;
-[; ;pic16lf1704.h: 11120: unsigned LC3G3D2N :1;
-[; ;pic16lf1704.h: 11121: unsigned LC3G3D2T :1;
-[; ;pic16lf1704.h: 11122: unsigned LC3G3D3N :1;
-[; ;pic16lf1704.h: 11123: unsigned LC3G3D3T :1;
-[; ;pic16lf1704.h: 11124: unsigned LC3G3D4N :1;
-[; ;pic16lf1704.h: 11125: unsigned LC3G3D4T :1;
-[; ;pic16lf1704.h: 11126: };
-[; ;pic16lf1704.h: 11127: struct {
-[; ;pic16lf1704.h: 11128: unsigned D1N :1;
-[; ;pic16lf1704.h: 11129: unsigned D1T :1;
-[; ;pic16lf1704.h: 11130: unsigned D2N :1;
-[; ;pic16lf1704.h: 11131: unsigned D2T :1;
-[; ;pic16lf1704.h: 11132: unsigned D3N :1;
-[; ;pic16lf1704.h: 11133: unsigned D3T :1;
-[; ;pic16lf1704.h: 11134: unsigned D4N :1;
-[; ;pic16lf1704.h: 11135: unsigned D4T :1;
-[; ;pic16lf1704.h: 11136: };
-[; ;pic16lf1704.h: 11137: } CLC3GLS2bits_t;
-[; ;pic16lf1704.h: 11138: extern volatile CLC3GLS2bits_t CLC3GLS2bits @ 0xF2C;
-[; ;pic16lf1704.h: 11222: extern volatile unsigned char CLC3GLS3 @ 0xF2D;
-"11224
-[; ;pic16lf1704.h: 11224: asm("CLC3GLS3 equ 0F2Dh");
-[; <" CLC3GLS3 equ 0F2Dh ;# ">
-[; ;pic16lf1704.h: 11227: typedef union {
-[; ;pic16lf1704.h: 11228: struct {
-[; ;pic16lf1704.h: 11229: unsigned LC3G4D1N :1;
-[; ;pic16lf1704.h: 11230: unsigned LC3G4D1T :1;
-[; ;pic16lf1704.h: 11231: unsigned LC3G4D2N :1;
-[; ;pic16lf1704.h: 11232: unsigned LC3G4D2T :1;
-[; ;pic16lf1704.h: 11233: unsigned LC3G4D3N :1;
-[; ;pic16lf1704.h: 11234: unsigned LC3G4D3T :1;
-[; ;pic16lf1704.h: 11235: unsigned LC3G4D4N :1;
-[; ;pic16lf1704.h: 11236: unsigned LC3G4D4T :1;
-[; ;pic16lf1704.h: 11237: };
-[; ;pic16lf1704.h: 11238: struct {
-[; ;pic16lf1704.h: 11239: unsigned G4D1N :1;
-[; ;pic16lf1704.h: 11240: unsigned G4D1T :1;
-[; ;pic16lf1704.h: 11241: unsigned G4D2N :1;
-[; ;pic16lf1704.h: 11242: unsigned G4D2T :1;
-[; ;pic16lf1704.h: 11243: unsigned G4D3N :1;
-[; ;pic16lf1704.h: 11244: unsigned G4D3T :1;
-[; ;pic16lf1704.h: 11245: unsigned G4D4N :1;
-[; ;pic16lf1704.h: 11246: unsigned G4D4T :1;
-[; ;pic16lf1704.h: 11247: };
-[; ;pic16lf1704.h: 11248: } CLC3GLS3bits_t;
-[; ;pic16lf1704.h: 11249: extern volatile CLC3GLS3bits_t CLC3GLS3bits @ 0xF2D;
-[; ;pic16lf1704.h: 11333: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
-"11335
-[; ;pic16lf1704.h: 11335: asm("STATUS_SHAD equ 0FE4h");
-[; <" STATUS_SHAD equ 0FE4h ;# ">
-[; ;pic16lf1704.h: 11338: typedef union {
-[; ;pic16lf1704.h: 11339: struct {
-[; ;pic16lf1704.h: 11340: unsigned C_SHAD :1;
-[; ;pic16lf1704.h: 11341: unsigned DC_SHAD :1;
-[; ;pic16lf1704.h: 11342: unsigned Z_SHAD :1;
-[; ;pic16lf1704.h: 11343: };
-[; ;pic16lf1704.h: 11344: } STATUS_SHADbits_t;
-[; ;pic16lf1704.h: 11345: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
-[; ;pic16lf1704.h: 11364: extern volatile unsigned char WREG_SHAD @ 0xFE5;
-"11366
-[; ;pic16lf1704.h: 11366: asm("WREG_SHAD equ 0FE5h");
-[; <" WREG_SHAD equ 0FE5h ;# ">
-[; ;pic16lf1704.h: 11369: typedef union {
-[; ;pic16lf1704.h: 11370: struct {
-[; ;pic16lf1704.h: 11371: unsigned WREG_SHAD :8;
-[; ;pic16lf1704.h: 11372: };
-[; ;pic16lf1704.h: 11373: } WREG_SHADbits_t;
-[; ;pic16lf1704.h: 11374: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
-[; ;pic16lf1704.h: 11383: extern volatile unsigned char BSR_SHAD @ 0xFE6;
-"11385
-[; ;pic16lf1704.h: 11385: asm("BSR_SHAD equ 0FE6h");
-[; <" BSR_SHAD equ 0FE6h ;# ">
-[; ;pic16lf1704.h: 11388: typedef union {
-[; ;pic16lf1704.h: 11389: struct {
-[; ;pic16lf1704.h: 11390: unsigned BSR_SHAD :5;
-[; ;pic16lf1704.h: 11391: };
-[; ;pic16lf1704.h: 11392: } BSR_SHADbits_t;
-[; ;pic16lf1704.h: 11393: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
-[; ;pic16lf1704.h: 11402: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
-"11404
-[; ;pic16lf1704.h: 11404: asm("PCLATH_SHAD equ 0FE7h");
-[; <" PCLATH_SHAD equ 0FE7h ;# ">
-[; ;pic16lf1704.h: 11407: typedef union {
-[; ;pic16lf1704.h: 11408: struct {
-[; ;pic16lf1704.h: 11409: unsigned PCLATH_SHAD :7;
-[; ;pic16lf1704.h: 11410: };
-[; ;pic16lf1704.h: 11411: } PCLATH_SHADbits_t;
-[; ;pic16lf1704.h: 11412: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
-[; ;pic16lf1704.h: 11421: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
-"11423
-[; ;pic16lf1704.h: 11423: asm("FSR0L_SHAD equ 0FE8h");
-[; <" FSR0L_SHAD equ 0FE8h ;# ">
-[; ;pic16lf1704.h: 11426: typedef union {
-[; ;pic16lf1704.h: 11427: struct {
-[; ;pic16lf1704.h: 11428: unsigned FSR0L_SHAD :8;
-[; ;pic16lf1704.h: 11429: };
-[; ;pic16lf1704.h: 11430: } FSR0L_SHADbits_t;
-[; ;pic16lf1704.h: 11431: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
-[; ;pic16lf1704.h: 11440: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
-"11442
-[; ;pic16lf1704.h: 11442: asm("FSR0H_SHAD equ 0FE9h");
-[; <" FSR0H_SHAD equ 0FE9h ;# ">
-[; ;pic16lf1704.h: 11445: typedef union {
-[; ;pic16lf1704.h: 11446: struct {
-[; ;pic16lf1704.h: 11447: unsigned FSR0H_SHAD :8;
-[; ;pic16lf1704.h: 11448: };
-[; ;pic16lf1704.h: 11449: } FSR0H_SHADbits_t;
-[; ;pic16lf1704.h: 11450: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
-[; ;pic16lf1704.h: 11459: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
-"11461
-[; ;pic16lf1704.h: 11461: asm("FSR1L_SHAD equ 0FEAh");
-[; <" FSR1L_SHAD equ 0FEAh ;# ">
-[; ;pic16lf1704.h: 11464: typedef union {
-[; ;pic16lf1704.h: 11465: struct {
-[; ;pic16lf1704.h: 11466: unsigned FSR1L_SHAD :8;
-[; ;pic16lf1704.h: 11467: };
-[; ;pic16lf1704.h: 11468: } FSR1L_SHADbits_t;
-[; ;pic16lf1704.h: 11469: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
-[; ;pic16lf1704.h: 11478: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
-"11480
-[; ;pic16lf1704.h: 11480: asm("FSR1H_SHAD equ 0FEBh");
-[; <" FSR1H_SHAD equ 0FEBh ;# ">
-[; ;pic16lf1704.h: 11483: typedef union {
-[; ;pic16lf1704.h: 11484: struct {
-[; ;pic16lf1704.h: 11485: unsigned FSR1H_SHAD :8;
-[; ;pic16lf1704.h: 11486: };
-[; ;pic16lf1704.h: 11487: } FSR1H_SHADbits_t;
-[; ;pic16lf1704.h: 11488: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
-[; ;pic16lf1704.h: 11497: extern volatile unsigned char STKPTR @ 0xFED;
-"11499
-[; ;pic16lf1704.h: 11499: asm("STKPTR equ 0FEDh");
-[; <" STKPTR equ 0FEDh ;# ">
-[; ;pic16lf1704.h: 11502: typedef union {
-[; ;pic16lf1704.h: 11503: struct {
-[; ;pic16lf1704.h: 11504: unsigned STKPTR :5;
-[; ;pic16lf1704.h: 11505: };
-[; ;pic16lf1704.h: 11506: } STKPTRbits_t;
-[; ;pic16lf1704.h: 11507: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
-[; ;pic16lf1704.h: 11516: extern volatile unsigned char TOSL @ 0xFEE;
-"11518
-[; ;pic16lf1704.h: 11518: asm("TOSL equ 0FEEh");
-[; <" TOSL equ 0FEEh ;# ">
-[; ;pic16lf1704.h: 11521: typedef union {
-[; ;pic16lf1704.h: 11522: struct {
-[; ;pic16lf1704.h: 11523: unsigned TOSL :8;
-[; ;pic16lf1704.h: 11524: };
-[; ;pic16lf1704.h: 11525: } TOSLbits_t;
-[; ;pic16lf1704.h: 11526: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
-[; ;pic16lf1704.h: 11535: extern volatile unsigned char TOSH @ 0xFEF;
-"11537
-[; ;pic16lf1704.h: 11537: asm("TOSH equ 0FEFh");
-[; <" TOSH equ 0FEFh ;# ">
-[; ;pic16lf1704.h: 11540: typedef union {
-[; ;pic16lf1704.h: 11541: struct {
-[; ;pic16lf1704.h: 11542: unsigned TOSH :7;
-[; ;pic16lf1704.h: 11543: };
-[; ;pic16lf1704.h: 11544: } TOSHbits_t;
-[; ;pic16lf1704.h: 11545: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
-[; ;pic16lf1704.h: 11560: extern volatile __bit ABDEN @ (((unsigned) &BAUD1CON)*8) + 0;
-[; ;pic16lf1704.h: 11562: extern volatile __bit ABDOVF @ (((unsigned) &BAUD1CON)*8) + 7;
-[; ;pic16lf1704.h: 11564: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
-[; ;pic16lf1704.h: 11566: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
-[; ;pic16lf1704.h: 11568: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
-[; ;pic16lf1704.h: 11570: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
-[; ;pic16lf1704.h: 11572: extern volatile __bit ADD0 @ (((unsigned) &SSP1ADD)*8) + 0;
-[; ;pic16lf1704.h: 11574: extern volatile __bit ADD1 @ (((unsigned) &SSP1ADD)*8) + 1;
-[; ;pic16lf1704.h: 11576: extern volatile __bit ADD2 @ (((unsigned) &SSP1ADD)*8) + 2;
-[; ;pic16lf1704.h: 11578: extern volatile __bit ADD3 @ (((unsigned) &SSP1ADD)*8) + 3;
-[; ;pic16lf1704.h: 11580: extern volatile __bit ADD4 @ (((unsigned) &SSP1ADD)*8) + 4;
-[; ;pic16lf1704.h: 11582: extern volatile __bit ADD5 @ (((unsigned) &SSP1ADD)*8) + 5;
-[; ;pic16lf1704.h: 11584: extern volatile __bit ADD6 @ (((unsigned) &SSP1ADD)*8) + 6;
-[; ;pic16lf1704.h: 11586: extern volatile __bit ADD7 @ (((unsigned) &SSP1ADD)*8) + 7;
-[; ;pic16lf1704.h: 11588: extern volatile __bit ADDEN @ (((unsigned) &RC1STA)*8) + 3;
-[; ;pic16lf1704.h: 11590: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
-[; ;pic16lf1704.h: 11592: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
-[; ;pic16lf1704.h: 11594: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
-[; ;pic16lf1704.h: 11596: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
-[; ;pic16lf1704.h: 11598: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
-[; ;pic16lf1704.h: 11600: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
-[; ;pic16lf1704.h: 11602: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
-[; ;pic16lf1704.h: 11604: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
-[; ;pic16lf1704.h: 11606: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
-[; ;pic16lf1704.h: 11608: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
-[; ;pic16lf1704.h: 11610: extern volatile __bit ANS5 @ (((unsigned) &ANSELA)*8) + 5;
-[; ;pic16lf1704.h: 11612: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
-[; ;pic16lf1704.h: 11614: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
-[; ;pic16lf1704.h: 11616: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
-[; ;pic16lf1704.h: 11618: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
-[; ;pic16lf1704.h: 11620: extern volatile __bit ANSC0 @ (((unsigned) &ANSELC)*8) + 0;
-[; ;pic16lf1704.h: 11622: extern volatile __bit ANSC1 @ (((unsigned) &ANSELC)*8) + 1;
-[; ;pic16lf1704.h: 11624: extern volatile __bit ANSC2 @ (((unsigned) &ANSELC)*8) + 2;
-[; ;pic16lf1704.h: 11626: extern volatile __bit ANSC3 @ (((unsigned) &ANSELC)*8) + 3;
-[; ;pic16lf1704.h: 11628: extern volatile __bit ANSC4 @ (((unsigned) &ANSELC)*8) + 4;
-[; ;pic16lf1704.h: 11630: extern volatile __bit ANSC5 @ (((unsigned) &ANSELC)*8) + 5;
-[; ;pic16lf1704.h: 11632: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
-[; ;pic16lf1704.h: 11634: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
-[; ;pic16lf1704.h: 11636: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
-[; ;pic16lf1704.h: 11638: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
-[; ;pic16lf1704.h: 11640: extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
-[; ;pic16lf1704.h: 11642: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
-[; ;pic16lf1704.h: 11644: extern volatile __bit BRG16 @ (((unsigned) &BAUD1CON)*8) + 3;
-[; ;pic16lf1704.h: 11646: extern volatile __bit BRGH @ (((unsigned) &TX1STA)*8) + 2;
-[; ;pic16lf1704.h: 11648: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
-[; ;pic16lf1704.h: 11650: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
-[; ;pic16lf1704.h: 11652: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
-[; ;pic16lf1704.h: 11654: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
-[; ;pic16lf1704.h: 11656: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
-[; ;pic16lf1704.h: 11658: extern volatile __bit BUF0 @ (((unsigned) &SSP1BUF)*8) + 0;
-[; ;pic16lf1704.h: 11660: extern volatile __bit BUF1 @ (((unsigned) &SSP1BUF)*8) + 1;
-[; ;pic16lf1704.h: 11662: extern volatile __bit BUF2 @ (((unsigned) &SSP1BUF)*8) + 2;
-[; ;pic16lf1704.h: 11664: extern volatile __bit BUF3 @ (((unsigned) &SSP1BUF)*8) + 3;
-[; ;pic16lf1704.h: 11666: extern volatile __bit BUF4 @ (((unsigned) &SSP1BUF)*8) + 4;
-[; ;pic16lf1704.h: 11668: extern volatile __bit BUF5 @ (((unsigned) &SSP1BUF)*8) + 5;
-[; ;pic16lf1704.h: 11670: extern volatile __bit BUF6 @ (((unsigned) &SSP1BUF)*8) + 6;
-[; ;pic16lf1704.h: 11672: extern volatile __bit BUF7 @ (((unsigned) &SSP1BUF)*8) + 7;
-[; ;pic16lf1704.h: 11674: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
-[; ;pic16lf1704.h: 11676: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
-[; ;pic16lf1704.h: 11678: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
-[; ;pic16lf1704.h: 11680: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
-[; ;pic16lf1704.h: 11682: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
-[; ;pic16lf1704.h: 11684: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
-[; ;pic16lf1704.h: 11686: extern volatile __bit C1NCH1 @ (((unsigned) &CM1CON1)*8) + 1;
-[; ;pic16lf1704.h: 11688: extern volatile __bit C1NCH2 @ (((unsigned) &CM1CON1)*8) + 2;
-[; ;pic16lf1704.h: 11690: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
-[; ;pic16lf1704.h: 11692: extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
-[; ;pic16lf1704.h: 11694: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 3;
-[; ;pic16lf1704.h: 11696: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 4;
-[; ;pic16lf1704.h: 11698: extern volatile __bit C1PCH2 @ (((unsigned) &CM1CON1)*8) + 5;
-[; ;pic16lf1704.h: 11700: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
-[; ;pic16lf1704.h: 11702: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
-[; ;pic16lf1704.h: 11704: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
-[; ;pic16lf1704.h: 11706: extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS)*8) + 0;
-[; ;pic16lf1704.h: 11708: extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS)*8) + 1;
-[; ;pic16lf1704.h: 11710: extern volatile __bit C1ZLF @ (((unsigned) &CM1CON0)*8) + 3;
-[; ;pic16lf1704.h: 11712: extern volatile __bit C2HYS @ (((unsigned) &CM2CON0)*8) + 1;
-[; ;pic16lf1704.h: 11714: extern volatile __bit C2IE @ (((unsigned) &PIE2)*8) + 6;
-[; ;pic16lf1704.h: 11716: extern volatile __bit C2IF @ (((unsigned) &PIR2)*8) + 6;
-[; ;pic16lf1704.h: 11718: extern volatile __bit C2INTN @ (((unsigned) &CM2CON1)*8) + 6;
-[; ;pic16lf1704.h: 11720: extern volatile __bit C2INTP @ (((unsigned) &CM2CON1)*8) + 7;
-[; ;pic16lf1704.h: 11722: extern volatile __bit C2NCH0 @ (((unsigned) &CM2CON1)*8) + 0;
-[; ;pic16lf1704.h: 11724: extern volatile __bit C2NCH1 @ (((unsigned) &CM2CON1)*8) + 1;
-[; ;pic16lf1704.h: 11726: extern volatile __bit C2NCH2 @ (((unsigned) &CM2CON1)*8) + 2;
-[; ;pic16lf1704.h: 11728: extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 7;
-[; ;pic16lf1704.h: 11730: extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 6;
-[; ;pic16lf1704.h: 11732: extern volatile __bit C2PCH0 @ (((unsigned) &CM2CON1)*8) + 3;
-[; ;pic16lf1704.h: 11734: extern volatile __bit C2PCH1 @ (((unsigned) &CM2CON1)*8) + 4;
-[; ;pic16lf1704.h: 11736: extern volatile __bit C2PCH2 @ (((unsigned) &CM2CON1)*8) + 5;
-[; ;pic16lf1704.h: 11738: extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 4;
-[; ;pic16lf1704.h: 11740: extern volatile __bit C2SP @ (((unsigned) &CM2CON0)*8) + 2;
-[; ;pic16lf1704.h: 11742: extern volatile __bit C2SYNC @ (((unsigned) &CM2CON0)*8) + 0;
-[; ;pic16lf1704.h: 11744: extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS)*8) + 2;
-[; ;pic16lf1704.h: 11746: extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS)*8) + 3;
-[; ;pic16lf1704.h: 11748: extern volatile __bit C2ZLF @ (((unsigned) &CM2CON0)*8) + 3;
-[; ;pic16lf1704.h: 11750: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
-[; ;pic16lf1704.h: 11752: extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
-[; ;pic16lf1704.h: 11754: extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
-[; ;pic16lf1704.h: 11756: extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
-[; ;pic16lf1704.h: 11758: extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
-[; ;pic16lf1704.h: 11760: extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
-[; ;pic16lf1704.h: 11762: extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
-[; ;pic16lf1704.h: 11764: extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
-[; ;pic16lf1704.h: 11766: extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
-[; ;pic16lf1704.h: 11768: extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
-[; ;pic16lf1704.h: 11770: extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
-[; ;pic16lf1704.h: 11772: extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
-[; ;pic16lf1704.h: 11774: extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
-[; ;pic16lf1704.h: 11776: extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
-[; ;pic16lf1704.h: 11778: extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
-[; ;pic16lf1704.h: 11780: extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
-[; ;pic16lf1704.h: 11782: extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
-[; ;pic16lf1704.h: 11784: extern volatile __bit CCPIE @ (((unsigned) &PIE1)*8) + 2;
-[; ;pic16lf1704.h: 11786: extern volatile __bit CCPIF @ (((unsigned) &PIR1)*8) + 2;
-[; ;pic16lf1704.h: 11788: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
-[; ;pic16lf1704.h: 11790: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
-[; ;pic16lf1704.h: 11792: extern volatile __bit CFGS @ (((unsigned) &PMCON1)*8) + 6;
-[; ;pic16lf1704.h: 11794: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
-[; ;pic16lf1704.h: 11796: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
-[; ;pic16lf1704.h: 11798: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
-[; ;pic16lf1704.h: 11800: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
-[; ;pic16lf1704.h: 11802: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
-[; ;pic16lf1704.h: 11804: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
-[; ;pic16lf1704.h: 11806: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
-[; ;pic16lf1704.h: 11808: extern volatile __bit CLC1IE @ (((unsigned) &PIE3)*8) + 0;
-[; ;pic16lf1704.h: 11810: extern volatile __bit CLC1IF @ (((unsigned) &PIR3)*8) + 0;
-[; ;pic16lf1704.h: 11812: extern volatile __bit CLC2IE @ (((unsigned) &PIE3)*8) + 1;
-[; ;pic16lf1704.h: 11814: extern volatile __bit CLC2IF @ (((unsigned) &PIR3)*8) + 1;
-[; ;pic16lf1704.h: 11816: extern volatile __bit CLC3IE @ (((unsigned) &PIE3)*8) + 2;
-[; ;pic16lf1704.h: 11818: extern volatile __bit CLC3IF @ (((unsigned) &PIR3)*8) + 2;
-[; ;pic16lf1704.h: 11820: extern volatile __bit COGIE @ (((unsigned) &PIE3)*8) + 5;
-[; ;pic16lf1704.h: 11822: extern volatile __bit COGIF @ (((unsigned) &PIR3)*8) + 5;
-[; ;pic16lf1704.h: 11824: extern volatile __bit CREN @ (((unsigned) &RC1STA)*8) + 4;
-[; ;pic16lf1704.h: 11826: extern volatile __bit CSRC @ (((unsigned) &TX1STA)*8) + 7;
-[; ;pic16lf1704.h: 11828: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
-[; ;pic16lf1704.h: 11830: extern volatile __bit DAC1EN @ (((unsigned) &DAC1CON0)*8) + 7;
-[; ;pic16lf1704.h: 11832: extern volatile __bit DAC1NSS @ (((unsigned) &DAC1CON0)*8) + 0;
-[; ;pic16lf1704.h: 11834: extern volatile __bit DAC1OE1 @ (((unsigned) &DAC1CON0)*8) + 5;
-[; ;pic16lf1704.h: 11836: extern volatile __bit DAC1OE2 @ (((unsigned) &DAC1CON0)*8) + 4;
-[; ;pic16lf1704.h: 11838: extern volatile __bit DAC1PSS0 @ (((unsigned) &DAC1CON0)*8) + 2;
-[; ;pic16lf1704.h: 11840: extern volatile __bit DAC1PSS1 @ (((unsigned) &DAC1CON0)*8) + 3;
-[; ;pic16lf1704.h: 11842: extern volatile __bit DAC1R0 @ (((unsigned) &DAC1CON1)*8) + 0;
-[; ;pic16lf1704.h: 11844: extern volatile __bit DAC1R1 @ (((unsigned) &DAC1CON1)*8) + 1;
-[; ;pic16lf1704.h: 11846: extern volatile __bit DAC1R2 @ (((unsigned) &DAC1CON1)*8) + 2;
-[; ;pic16lf1704.h: 11848: extern volatile __bit DAC1R3 @ (((unsigned) &DAC1CON1)*8) + 3;
-[; ;pic16lf1704.h: 11850: extern volatile __bit DAC1R4 @ (((unsigned) &DAC1CON1)*8) + 4;
-[; ;pic16lf1704.h: 11852: extern volatile __bit DAC1R5 @ (((unsigned) &DAC1CON1)*8) + 5;
-[; ;pic16lf1704.h: 11854: extern volatile __bit DAC1R6 @ (((unsigned) &DAC1CON1)*8) + 6;
-[; ;pic16lf1704.h: 11856: extern volatile __bit DAC1R7 @ (((unsigned) &DAC1CON1)*8) + 7;
-[; ;pic16lf1704.h: 11858: extern volatile __bit DACEN @ (((unsigned) &DAC1CON0)*8) + 7;
-[; ;pic16lf1704.h: 11860: extern volatile __bit DACNSS @ (((unsigned) &DAC1CON0)*8) + 0;
-[; ;pic16lf1704.h: 11862: extern volatile __bit DACOE0 @ (((unsigned) &DAC1CON0)*8) + 4;
-[; ;pic16lf1704.h: 11864: extern volatile __bit DACOE1 @ (((unsigned) &DAC1CON0)*8) + 5;
-[; ;pic16lf1704.h: 11866: extern volatile __bit DACPSS0 @ (((unsigned) &DAC1CON0)*8) + 2;
-[; ;pic16lf1704.h: 11868: extern volatile __bit DACPSS1 @ (((unsigned) &DAC1CON0)*8) + 3;
-[; ;pic16lf1704.h: 11870: extern volatile __bit DACR0 @ (((unsigned) &DAC1CON1)*8) + 0;
-[; ;pic16lf1704.h: 11872: extern volatile __bit DACR1 @ (((unsigned) &DAC1CON1)*8) + 1;
-[; ;pic16lf1704.h: 11874: extern volatile __bit DACR2 @ (((unsigned) &DAC1CON1)*8) + 2;
-[; ;pic16lf1704.h: 11876: extern volatile __bit DACR3 @ (((unsigned) &DAC1CON1)*8) + 3;
-[; ;pic16lf1704.h: 11878: extern volatile __bit DACR4 @ (((unsigned) &DAC1CON1)*8) + 4;
-[; ;pic16lf1704.h: 11880: extern volatile __bit DACR5 @ (((unsigned) &DAC1CON1)*8) + 5;
-[; ;pic16lf1704.h: 11882: extern volatile __bit DACR6 @ (((unsigned) &DAC1CON1)*8) + 6;
-[; ;pic16lf1704.h: 11884: extern volatile __bit DACR7 @ (((unsigned) &DAC1CON1)*8) + 7;
-[; ;pic16lf1704.h: 11886: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
-[; ;pic16lf1704.h: 11888: extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
-[; ;pic16lf1704.h: 11890: extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
-[; ;pic16lf1704.h: 11892: extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
-[; ;pic16lf1704.h: 11894: extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
-[; ;pic16lf1704.h: 11896: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
-[; ;pic16lf1704.h: 11898: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
-[; ;pic16lf1704.h: 11900: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
-[; ;pic16lf1704.h: 11902: extern volatile __bit FERR @ (((unsigned) &RC1STA)*8) + 2;
-[; ;pic16lf1704.h: 11904: extern volatile __bit FREE @ (((unsigned) &PMCON1)*8) + 4;
-[; ;pic16lf1704.h: 11906: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
-[; ;pic16lf1704.h: 11908: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
-[; ;pic16lf1704.h: 11910: extern volatile __bit G1ARSEN @ (((unsigned) &COG1ASD0)*8) + 6;
-[; ;pic16lf1704.h: 11912: extern volatile __bit G1AS0E @ (((unsigned) &COG1ASD1)*8) + 0;
-[; ;pic16lf1704.h: 11914: extern volatile __bit G1AS1E @ (((unsigned) &COG1ASD1)*8) + 1;
-[; ;pic16lf1704.h: 11916: extern volatile __bit G1AS2E @ (((unsigned) &COG1ASD1)*8) + 2;
-[; ;pic16lf1704.h: 11918: extern volatile __bit G1AS3E @ (((unsigned) &COG1ASD1)*8) + 3;
-[; ;pic16lf1704.h: 11920: extern volatile __bit G1ASDAC0 @ (((unsigned) &COG1ASD0)*8) + 2;
-[; ;pic16lf1704.h: 11922: extern volatile __bit G1ASDAC1 @ (((unsigned) &COG1ASD0)*8) + 3;
-[; ;pic16lf1704.h: 11924: extern volatile __bit G1ASDBD0 @ (((unsigned) &COG1ASD0)*8) + 4;
-[; ;pic16lf1704.h: 11926: extern volatile __bit G1ASDBD1 @ (((unsigned) &COG1ASD0)*8) + 5;
-[; ;pic16lf1704.h: 11928: extern volatile __bit G1ASE @ (((unsigned) &COG1ASD0)*8) + 7;
-[; ;pic16lf1704.h: 11930: extern volatile __bit G1BLKF0 @ (((unsigned) &COG1BLKF)*8) + 0;
-[; ;pic16lf1704.h: 11932: extern volatile __bit G1BLKF1 @ (((unsigned) &COG1BLKF)*8) + 1;
-[; ;pic16lf1704.h: 11934: extern volatile __bit G1BLKF2 @ (((unsigned) &COG1BLKF)*8) + 2;
-[; ;pic16lf1704.h: 11936: extern volatile __bit G1BLKF3 @ (((unsigned) &COG1BLKF)*8) + 3;
-[; ;pic16lf1704.h: 11938: extern volatile __bit G1BLKF4 @ (((unsigned) &COG1BLKF)*8) + 4;
-[; ;pic16lf1704.h: 11940: extern volatile __bit G1BLKF5 @ (((unsigned) &COG1BLKF)*8) + 5;
-[; ;pic16lf1704.h: 11942: extern volatile __bit G1BLKR0 @ (((unsigned) &COG1BLKR)*8) + 0;
-[; ;pic16lf1704.h: 11944: extern volatile __bit G1BLKR1 @ (((unsigned) &COG1BLKR)*8) + 1;
-[; ;pic16lf1704.h: 11946: extern volatile __bit G1BLKR2 @ (((unsigned) &COG1BLKR)*8) + 2;
-[; ;pic16lf1704.h: 11948: extern volatile __bit G1BLKR3 @ (((unsigned) &COG1BLKR)*8) + 3;
-[; ;pic16lf1704.h: 11950: extern volatile __bit G1BLKR4 @ (((unsigned) &COG1BLKR)*8) + 4;
-[; ;pic16lf1704.h: 11952: extern volatile __bit G1BLKR5 @ (((unsigned) &COG1BLKR)*8) + 5;
-[; ;pic16lf1704.h: 11954: extern volatile __bit G1CS0 @ (((unsigned) &COG1CON0)*8) + 3;
-[; ;pic16lf1704.h: 11956: extern volatile __bit G1CS1 @ (((unsigned) &COG1CON0)*8) + 4;
-[; ;pic16lf1704.h: 11958: extern volatile __bit G1DBF0 @ (((unsigned) &COG1DBF)*8) + 0;
-[; ;pic16lf1704.h: 11960: extern volatile __bit G1DBF1 @ (((unsigned) &COG1DBF)*8) + 1;
-[; ;pic16lf1704.h: 11962: extern volatile __bit G1DBF2 @ (((unsigned) &COG1DBF)*8) + 2;
-[; ;pic16lf1704.h: 11964: extern volatile __bit G1DBF3 @ (((unsigned) &COG1DBF)*8) + 3;
-[; ;pic16lf1704.h: 11966: extern volatile __bit G1DBF4 @ (((unsigned) &COG1DBF)*8) + 4;
-[; ;pic16lf1704.h: 11968: extern volatile __bit G1DBF5 @ (((unsigned) &COG1DBF)*8) + 5;
-[; ;pic16lf1704.h: 11970: extern volatile __bit G1DBR0 @ (((unsigned) &COG1DBR)*8) + 0;
-[; ;pic16lf1704.h: 11972: extern volatile __bit G1DBR1 @ (((unsigned) &COG1DBR)*8) + 1;
-[; ;pic16lf1704.h: 11974: extern volatile __bit G1DBR2 @ (((unsigned) &COG1DBR)*8) + 2;
-[; ;pic16lf1704.h: 11976: extern volatile __bit G1DBR3 @ (((unsigned) &COG1DBR)*8) + 3;
-[; ;pic16lf1704.h: 11978: extern volatile __bit G1DBR4 @ (((unsigned) &COG1DBR)*8) + 4;
-[; ;pic16lf1704.h: 11980: extern volatile __bit G1DBR5 @ (((unsigned) &COG1DBR)*8) + 5;
-[; ;pic16lf1704.h: 11982: extern volatile __bit G1EN @ (((unsigned) &COG1CON0)*8) + 7;
-[; ;pic16lf1704.h: 11984: extern volatile __bit G1FDBS @ (((unsigned) &COG1CON1)*8) + 6;
-[; ;pic16lf1704.h: 11986: extern volatile __bit G1FIS0 @ (((unsigned) &COG1FIS)*8) + 0;
-[; ;pic16lf1704.h: 11988: extern volatile __bit G1FIS1 @ (((unsigned) &COG1FIS)*8) + 1;
-[; ;pic16lf1704.h: 11990: extern volatile __bit G1FIS2 @ (((unsigned) &COG1FIS)*8) + 2;
-[; ;pic16lf1704.h: 11992: extern volatile __bit G1FIS3 @ (((unsigned) &COG1FIS)*8) + 3;
-[; ;pic16lf1704.h: 11994: extern volatile __bit G1FIS4 @ (((unsigned) &COG1FIS)*8) + 4;
-[; ;pic16lf1704.h: 11996: extern volatile __bit G1FIS5 @ (((unsigned) &COG1FIS)*8) + 5;
-[; ;pic16lf1704.h: 11998: extern volatile __bit G1FIS6 @ (((unsigned) &COG1FIS)*8) + 6;
-[; ;pic16lf1704.h: 12000: extern volatile __bit G1FSIM0 @ (((unsigned) &COG1FSIM)*8) + 0;
-[; ;pic16lf1704.h: 12002: extern volatile __bit G1FSIM1 @ (((unsigned) &COG1FSIM)*8) + 1;
-[; ;pic16lf1704.h: 12004: extern volatile __bit G1FSIM2 @ (((unsigned) &COG1FSIM)*8) + 2;
-[; ;pic16lf1704.h: 12006: extern volatile __bit G1FSIM3 @ (((unsigned) &COG1FSIM)*8) + 3;
-[; ;pic16lf1704.h: 12008: extern volatile __bit G1FSIM4 @ (((unsigned) &COG1FSIM)*8) + 4;
-[; ;pic16lf1704.h: 12010: extern volatile __bit G1FSIM5 @ (((unsigned) &COG1FSIM)*8) + 5;
-[; ;pic16lf1704.h: 12012: extern volatile __bit G1FSIM6 @ (((unsigned) &COG1FSIM)*8) + 6;
-[; ;pic16lf1704.h: 12014: extern volatile __bit G1LD @ (((unsigned) &COG1CON0)*8) + 6;
-[; ;pic16lf1704.h: 12016: extern volatile __bit G1MD0 @ (((unsigned) &COG1CON0)*8) + 0;
-[; ;pic16lf1704.h: 12018: extern volatile __bit G1MD1 @ (((unsigned) &COG1CON0)*8) + 1;
-[; ;pic16lf1704.h: 12020: extern volatile __bit G1MD2 @ (((unsigned) &COG1CON0)*8) + 2;
-[; ;pic16lf1704.h: 12022: extern volatile __bit G1PHF0 @ (((unsigned) &COG1PHF)*8) + 0;
-[; ;pic16lf1704.h: 12024: extern volatile __bit G1PHF1 @ (((unsigned) &COG1PHF)*8) + 1;
-[; ;pic16lf1704.h: 12026: extern volatile __bit G1PHF2 @ (((unsigned) &COG1PHF)*8) + 2;
-[; ;pic16lf1704.h: 12028: extern volatile __bit G1PHF3 @ (((unsigned) &COG1PHF)*8) + 3;
-[; ;pic16lf1704.h: 12030: extern volatile __bit G1PHF4 @ (((unsigned) &COG1PHF)*8) + 4;
-[; ;pic16lf1704.h: 12032: extern volatile __bit G1PHF5 @ (((unsigned) &COG1PHF)*8) + 5;
-[; ;pic16lf1704.h: 12034: extern volatile __bit G1PHR0 @ (((unsigned) &COG1PHR)*8) + 0;
-[; ;pic16lf1704.h: 12036: extern volatile __bit G1PHR1 @ (((unsigned) &COG1PHR)*8) + 1;
-[; ;pic16lf1704.h: 12038: extern volatile __bit G1PHR2 @ (((unsigned) &COG1PHR)*8) + 2;
-[; ;pic16lf1704.h: 12040: extern volatile __bit G1PHR3 @ (((unsigned) &COG1PHR)*8) + 3;
-[; ;pic16lf1704.h: 12042: extern volatile __bit G1PHR4 @ (((unsigned) &COG1PHR)*8) + 4;
-[; ;pic16lf1704.h: 12044: extern volatile __bit G1PHR5 @ (((unsigned) &COG1PHR)*8) + 5;
-[; ;pic16lf1704.h: 12046: extern volatile __bit G1POLA @ (((unsigned) &COG1CON1)*8) + 0;
-[; ;pic16lf1704.h: 12048: extern volatile __bit G1POLB @ (((unsigned) &COG1CON1)*8) + 1;
-[; ;pic16lf1704.h: 12050: extern volatile __bit G1POLC @ (((unsigned) &COG1CON1)*8) + 2;
-[; ;pic16lf1704.h: 12052: extern volatile __bit G1POLD @ (((unsigned) &COG1CON1)*8) + 3;
-[; ;pic16lf1704.h: 12054: extern volatile __bit G1RDBS @ (((unsigned) &COG1CON1)*8) + 7;
-[; ;pic16lf1704.h: 12056: extern volatile __bit G1RIS0 @ (((unsigned) &COG1RIS)*8) + 0;
-[; ;pic16lf1704.h: 12058: extern volatile __bit G1RIS1 @ (((unsigned) &COG1RIS)*8) + 1;
-[; ;pic16lf1704.h: 12060: extern volatile __bit G1RIS2 @ (((unsigned) &COG1RIS)*8) + 2;
-[; ;pic16lf1704.h: 12062: extern volatile __bit G1RIS3 @ (((unsigned) &COG1RIS)*8) + 3;
-[; ;pic16lf1704.h: 12064: extern volatile __bit G1RIS4 @ (((unsigned) &COG1RIS)*8) + 4;
-[; ;pic16lf1704.h: 12066: extern volatile __bit G1RIS5 @ (((unsigned) &COG1RIS)*8) + 5;
-[; ;pic16lf1704.h: 12068: extern volatile __bit G1RIS6 @ (((unsigned) &COG1RIS)*8) + 6;
-[; ;pic16lf1704.h: 12070: extern volatile __bit G1RSIM0 @ (((unsigned) &COG1RSIM)*8) + 0;
-[; ;pic16lf1704.h: 12072: extern volatile __bit G1RSIM1 @ (((unsigned) &COG1RSIM)*8) + 1;
-[; ;pic16lf1704.h: 12074: extern volatile __bit G1RSIM2 @ (((unsigned) &COG1RSIM)*8) + 2;
-[; ;pic16lf1704.h: 12076: extern volatile __bit G1RSIM3 @ (((unsigned) &COG1RSIM)*8) + 3;
-[; ;pic16lf1704.h: 12078: extern volatile __bit G1RSIM4 @ (((unsigned) &COG1RSIM)*8) + 4;
-[; ;pic16lf1704.h: 12080: extern volatile __bit G1RSIM5 @ (((unsigned) &COG1RSIM)*8) + 5;
-[; ;pic16lf1704.h: 12082: extern volatile __bit G1RSIM6 @ (((unsigned) &COG1RSIM)*8) + 6;
-[; ;pic16lf1704.h: 12084: extern volatile __bit G1SDATA @ (((unsigned) &COG1STR)*8) + 4;
-[; ;pic16lf1704.h: 12086: extern volatile __bit G1SDATB @ (((unsigned) &COG1STR)*8) + 5;
-[; ;pic16lf1704.h: 12088: extern volatile __bit G1SDATC @ (((unsigned) &COG1STR)*8) + 6;
-[; ;pic16lf1704.h: 12090: extern volatile __bit G1SDATD @ (((unsigned) &COG1STR)*8) + 7;
-[; ;pic16lf1704.h: 12092: extern volatile __bit G1STRA @ (((unsigned) &COG1STR)*8) + 0;
-[; ;pic16lf1704.h: 12094: extern volatile __bit G1STRB @ (((unsigned) &COG1STR)*8) + 1;
-[; ;pic16lf1704.h: 12096: extern volatile __bit G1STRC @ (((unsigned) &COG1STR)*8) + 2;
-[; ;pic16lf1704.h: 12098: extern volatile __bit G1STRD @ (((unsigned) &COG1STR)*8) + 3;
-[; ;pic16lf1704.h: 12100: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
-[; ;pic16lf1704.h: 12102: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
-[; ;pic16lf1704.h: 12104: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
-[; ;pic16lf1704.h: 12106: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
-[; ;pic16lf1704.h: 12108: extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
-[; ;pic16lf1704.h: 12110: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
-[; ;pic16lf1704.h: 12112: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
-[; ;pic16lf1704.h: 12114: extern volatile __bit INLVLA0 @ (((unsigned) &INLVLA)*8) + 0;
-[; ;pic16lf1704.h: 12116: extern volatile __bit INLVLA1 @ (((unsigned) &INLVLA)*8) + 1;
-[; ;pic16lf1704.h: 12118: extern volatile __bit INLVLA2 @ (((unsigned) &INLVLA)*8) + 2;
-[; ;pic16lf1704.h: 12120: extern volatile __bit INLVLA3 @ (((unsigned) &INLVLA)*8) + 3;
-[; ;pic16lf1704.h: 12122: extern volatile __bit INLVLA4 @ (((unsigned) &INLVLA)*8) + 4;
-[; ;pic16lf1704.h: 12124: extern volatile __bit INLVLA5 @ (((unsigned) &INLVLA)*8) + 5;
-[; ;pic16lf1704.h: 12126: extern volatile __bit INLVLC0 @ (((unsigned) &INLVLC)*8) + 0;
-[; ;pic16lf1704.h: 12128: extern volatile __bit INLVLC1 @ (((unsigned) &INLVLC)*8) + 1;
-[; ;pic16lf1704.h: 12130: extern volatile __bit INLVLC2 @ (((unsigned) &INLVLC)*8) + 2;
-[; ;pic16lf1704.h: 12132: extern volatile __bit INLVLC3 @ (((unsigned) &INLVLC)*8) + 3;
-[; ;pic16lf1704.h: 12134: extern volatile __bit INLVLC4 @ (((unsigned) &INLVLC)*8) + 4;
-[; ;pic16lf1704.h: 12136: extern volatile __bit INLVLC5 @ (((unsigned) &INLVLC)*8) + 5;
-[; ;pic16lf1704.h: 12138: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
-[; ;pic16lf1704.h: 12140: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
-[; ;pic16lf1704.h: 12142: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
-[; ;pic16lf1704.h: 12144: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
-[; ;pic16lf1704.h: 12146: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
-[; ;pic16lf1704.h: 12148: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
-[; ;pic16lf1704.h: 12150: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
-[; ;pic16lf1704.h: 12152: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
-[; ;pic16lf1704.h: 12154: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
-[; ;pic16lf1704.h: 12156: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
-[; ;pic16lf1704.h: 12158: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
-[; ;pic16lf1704.h: 12160: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
-[; ;pic16lf1704.h: 12162: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
-[; ;pic16lf1704.h: 12164: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
-[; ;pic16lf1704.h: 12166: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
-[; ;pic16lf1704.h: 12168: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
-[; ;pic16lf1704.h: 12170: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
-[; ;pic16lf1704.h: 12172: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
-[; ;pic16lf1704.h: 12174: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
-[; ;pic16lf1704.h: 12176: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
-[; ;pic16lf1704.h: 12178: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
-[; ;pic16lf1704.h: 12180: extern volatile __bit IOCCF0 @ (((unsigned) &IOCCF)*8) + 0;
-[; ;pic16lf1704.h: 12182: extern volatile __bit IOCCF1 @ (((unsigned) &IOCCF)*8) + 1;
-[; ;pic16lf1704.h: 12184: extern volatile __bit IOCCF2 @ (((unsigned) &IOCCF)*8) + 2;
-[; ;pic16lf1704.h: 12186: extern volatile __bit IOCCF3 @ (((unsigned) &IOCCF)*8) + 3;
-[; ;pic16lf1704.h: 12188: extern volatile __bit IOCCF4 @ (((unsigned) &IOCCF)*8) + 4;
-[; ;pic16lf1704.h: 12190: extern volatile __bit IOCCF5 @ (((unsigned) &IOCCF)*8) + 5;
-[; ;pic16lf1704.h: 12192: extern volatile __bit IOCCN0 @ (((unsigned) &IOCCN)*8) + 0;
-[; ;pic16lf1704.h: 12194: extern volatile __bit IOCCN1 @ (((unsigned) &IOCCN)*8) + 1;
-[; ;pic16lf1704.h: 12196: extern volatile __bit IOCCN2 @ (((unsigned) &IOCCN)*8) + 2;
-[; ;pic16lf1704.h: 12198: extern volatile __bit IOCCN3 @ (((unsigned) &IOCCN)*8) + 3;
-[; ;pic16lf1704.h: 12200: extern volatile __bit IOCCN4 @ (((unsigned) &IOCCN)*8) + 4;
-[; ;pic16lf1704.h: 12202: extern volatile __bit IOCCN5 @ (((unsigned) &IOCCN)*8) + 5;
-[; ;pic16lf1704.h: 12204: extern volatile __bit IOCCP0 @ (((unsigned) &IOCCP)*8) + 0;
-[; ;pic16lf1704.h: 12206: extern volatile __bit IOCCP1 @ (((unsigned) &IOCCP)*8) + 1;
-[; ;pic16lf1704.h: 12208: extern volatile __bit IOCCP2 @ (((unsigned) &IOCCP)*8) + 2;
-[; ;pic16lf1704.h: 12210: extern volatile __bit IOCCP3 @ (((unsigned) &IOCCP)*8) + 3;
-[; ;pic16lf1704.h: 12212: extern volatile __bit IOCCP4 @ (((unsigned) &IOCCP)*8) + 4;
-[; ;pic16lf1704.h: 12214: extern volatile __bit IOCCP5 @ (((unsigned) &IOCCP)*8) + 5;
-[; ;pic16lf1704.h: 12216: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
-[; ;pic16lf1704.h: 12218: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
-[; ;pic16lf1704.h: 12220: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
-[; ;pic16lf1704.h: 12222: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
-[; ;pic16lf1704.h: 12224: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
-[; ;pic16lf1704.h: 12226: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
-[; ;pic16lf1704.h: 12228: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
-[; ;pic16lf1704.h: 12230: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
-[; ;pic16lf1704.h: 12232: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
-[; ;pic16lf1704.h: 12234: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
-[; ;pic16lf1704.h: 12236: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
-[; ;pic16lf1704.h: 12238: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
-[; ;pic16lf1704.h: 12240: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
-[; ;pic16lf1704.h: 12242: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
-[; ;pic16lf1704.h: 12244: extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
-[; ;pic16lf1704.h: 12246: extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
-[; ;pic16lf1704.h: 12248: extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
-[; ;pic16lf1704.h: 12250: extern volatile __bit LC1D1S0 @ (((unsigned) &CLC1SEL0)*8) + 0;
-[; ;pic16lf1704.h: 12252: extern volatile __bit LC1D1S1 @ (((unsigned) &CLC1SEL0)*8) + 1;
-[; ;pic16lf1704.h: 12254: extern volatile __bit LC1D1S2 @ (((unsigned) &CLC1SEL0)*8) + 2;
-[; ;pic16lf1704.h: 12256: extern volatile __bit LC1D1S3 @ (((unsigned) &CLC1SEL0)*8) + 3;
-[; ;pic16lf1704.h: 12258: extern volatile __bit LC1D1S4 @ (((unsigned) &CLC1SEL0)*8) + 4;
-[; ;pic16lf1704.h: 12260: extern volatile __bit LC1D2S0 @ (((unsigned) &CLC1SEL1)*8) + 0;
-[; ;pic16lf1704.h: 12262: extern volatile __bit LC1D2S1 @ (((unsigned) &CLC1SEL1)*8) + 1;
-[; ;pic16lf1704.h: 12264: extern volatile __bit LC1D2S2 @ (((unsigned) &CLC1SEL1)*8) + 2;
-[; ;pic16lf1704.h: 12266: extern volatile __bit LC1D2S3 @ (((unsigned) &CLC1SEL1)*8) + 3;
-[; ;pic16lf1704.h: 12268: extern volatile __bit LC1D2S4 @ (((unsigned) &CLC1SEL1)*8) + 4;
-[; ;pic16lf1704.h: 12270: extern volatile __bit LC1D3S0 @ (((unsigned) &CLC1SEL2)*8) + 0;
-[; ;pic16lf1704.h: 12272: extern volatile __bit LC1D3S1 @ (((unsigned) &CLC1SEL2)*8) + 1;
-[; ;pic16lf1704.h: 12274: extern volatile __bit LC1D3S2 @ (((unsigned) &CLC1SEL2)*8) + 2;
-[; ;pic16lf1704.h: 12276: extern volatile __bit LC1D3S3 @ (((unsigned) &CLC1SEL2)*8) + 3;
-[; ;pic16lf1704.h: 12278: extern volatile __bit LC1D3S4 @ (((unsigned) &CLC1SEL2)*8) + 4;
-[; ;pic16lf1704.h: 12280: extern volatile __bit LC1D4S0 @ (((unsigned) &CLC1SEL3)*8) + 0;
-[; ;pic16lf1704.h: 12282: extern volatile __bit LC1D4S1 @ (((unsigned) &CLC1SEL3)*8) + 1;
-[; ;pic16lf1704.h: 12284: extern volatile __bit LC1D4S2 @ (((unsigned) &CLC1SEL3)*8) + 2;
-[; ;pic16lf1704.h: 12286: extern volatile __bit LC1D4S3 @ (((unsigned) &CLC1SEL3)*8) + 3;
-[; ;pic16lf1704.h: 12288: extern volatile __bit LC1D4S4 @ (((unsigned) &CLC1SEL3)*8) + 4;
-[; ;pic16lf1704.h: 12290: extern volatile __bit LC1EN @ (((unsigned) &CLC1CON)*8) + 7;
-[; ;pic16lf1704.h: 12292: extern volatile __bit LC1G1D1N @ (((unsigned) &CLC1GLS0)*8) + 0;
-[; ;pic16lf1704.h: 12294: extern volatile __bit LC1G1D1T @ (((unsigned) &CLC1GLS0)*8) + 1;
-[; ;pic16lf1704.h: 12296: extern volatile __bit LC1G1D2N @ (((unsigned) &CLC1GLS0)*8) + 2;
-[; ;pic16lf1704.h: 12298: extern volatile __bit LC1G1D2T @ (((unsigned) &CLC1GLS0)*8) + 3;
-[; ;pic16lf1704.h: 12300: extern volatile __bit LC1G1D3N @ (((unsigned) &CLC1GLS0)*8) + 4;
-[; ;pic16lf1704.h: 12302: extern volatile __bit LC1G1D3T @ (((unsigned) &CLC1GLS0)*8) + 5;
-[; ;pic16lf1704.h: 12304: extern volatile __bit LC1G1D4N @ (((unsigned) &CLC1GLS0)*8) + 6;
-[; ;pic16lf1704.h: 12306: extern volatile __bit LC1G1D4T @ (((unsigned) &CLC1GLS0)*8) + 7;
-[; ;pic16lf1704.h: 12308: extern volatile __bit LC1G1POL @ (((unsigned) &CLC1POL)*8) + 0;
-[; ;pic16lf1704.h: 12310: extern volatile __bit LC1G2D1N @ (((unsigned) &CLC1GLS1)*8) + 0;
-[; ;pic16lf1704.h: 12312: extern volatile __bit LC1G2D1T @ (((unsigned) &CLC1GLS1)*8) + 1;
-[; ;pic16lf1704.h: 12314: extern volatile __bit LC1G2D2N @ (((unsigned) &CLC1GLS1)*8) + 2;
-[; ;pic16lf1704.h: 12316: extern volatile __bit LC1G2D2T @ (((unsigned) &CLC1GLS1)*8) + 3;
-[; ;pic16lf1704.h: 12318: extern volatile __bit LC1G2D3N @ (((unsigned) &CLC1GLS1)*8) + 4;
-[; ;pic16lf1704.h: 12320: extern volatile __bit LC1G2D3T @ (((unsigned) &CLC1GLS1)*8) + 5;
-[; ;pic16lf1704.h: 12322: extern volatile __bit LC1G2D4N @ (((unsigned) &CLC1GLS1)*8) + 6;
-[; ;pic16lf1704.h: 12324: extern volatile __bit LC1G2D4T @ (((unsigned) &CLC1GLS1)*8) + 7;
-[; ;pic16lf1704.h: 12326: extern volatile __bit LC1G2POL @ (((unsigned) &CLC1POL)*8) + 1;
-[; ;pic16lf1704.h: 12328: extern volatile __bit LC1G3D1N @ (((unsigned) &CLC1GLS2)*8) + 0;
-[; ;pic16lf1704.h: 12330: extern volatile __bit LC1G3D1T @ (((unsigned) &CLC1GLS2)*8) + 1;
-[; ;pic16lf1704.h: 12332: extern volatile __bit LC1G3D2N @ (((unsigned) &CLC1GLS2)*8) + 2;
-[; ;pic16lf1704.h: 12334: extern volatile __bit LC1G3D2T @ (((unsigned) &CLC1GLS2)*8) + 3;
-[; ;pic16lf1704.h: 12336: extern volatile __bit LC1G3D3N @ (((unsigned) &CLC1GLS2)*8) + 4;
-[; ;pic16lf1704.h: 12338: extern volatile __bit LC1G3D3T @ (((unsigned) &CLC1GLS2)*8) + 5;
-[; ;pic16lf1704.h: 12340: extern volatile __bit LC1G3D4N @ (((unsigned) &CLC1GLS2)*8) + 6;
-[; ;pic16lf1704.h: 12342: extern volatile __bit LC1G3D4T @ (((unsigned) &CLC1GLS2)*8) + 7;
-[; ;pic16lf1704.h: 12344: extern volatile __bit LC1G3POL @ (((unsigned) &CLC1POL)*8) + 2;
-[; ;pic16lf1704.h: 12346: extern volatile __bit LC1G4D1N @ (((unsigned) &CLC1GLS3)*8) + 0;
-[; ;pic16lf1704.h: 12348: extern volatile __bit LC1G4D1T @ (((unsigned) &CLC1GLS3)*8) + 1;
-[; ;pic16lf1704.h: 12350: extern volatile __bit LC1G4D2N @ (((unsigned) &CLC1GLS3)*8) + 2;
-[; ;pic16lf1704.h: 12352: extern volatile __bit LC1G4D2T @ (((unsigned) &CLC1GLS3)*8) + 3;
-[; ;pic16lf1704.h: 12354: extern volatile __bit LC1G4D3N @ (((unsigned) &CLC1GLS3)*8) + 4;
-[; ;pic16lf1704.h: 12356: extern volatile __bit LC1G4D3T @ (((unsigned) &CLC1GLS3)*8) + 5;
-[; ;pic16lf1704.h: 12358: extern volatile __bit LC1G4D4N @ (((unsigned) &CLC1GLS3)*8) + 6;
-[; ;pic16lf1704.h: 12360: extern volatile __bit LC1G4D4T @ (((unsigned) &CLC1GLS3)*8) + 7;
-[; ;pic16lf1704.h: 12362: extern volatile __bit LC1G4POL @ (((unsigned) &CLC1POL)*8) + 3;
-[; ;pic16lf1704.h: 12364: extern volatile __bit LC1INTN @ (((unsigned) &CLC1CON)*8) + 3;
-[; ;pic16lf1704.h: 12366: extern volatile __bit LC1INTP @ (((unsigned) &CLC1CON)*8) + 4;
-[; ;pic16lf1704.h: 12368: extern volatile __bit LC1MODE0 @ (((unsigned) &CLC1CON)*8) + 0;
-[; ;pic16lf1704.h: 12370: extern volatile __bit LC1MODE1 @ (((unsigned) &CLC1CON)*8) + 1;
-[; ;pic16lf1704.h: 12372: extern volatile __bit LC1MODE2 @ (((unsigned) &CLC1CON)*8) + 2;
-[; ;pic16lf1704.h: 12374: extern volatile __bit LC1OUT @ (((unsigned) &CLC1CON)*8) + 5;
-[; ;pic16lf1704.h: 12376: extern volatile __bit LC1POL @ (((unsigned) &CLC1POL)*8) + 7;
-[; ;pic16lf1704.h: 12378: extern volatile __bit LC2D1S0 @ (((unsigned) &CLC2SEL0)*8) + 0;
-[; ;pic16lf1704.h: 12380: extern volatile __bit LC2D1S1 @ (((unsigned) &CLC2SEL0)*8) + 1;
-[; ;pic16lf1704.h: 12382: extern volatile __bit LC2D1S2 @ (((unsigned) &CLC2SEL0)*8) + 2;
-[; ;pic16lf1704.h: 12384: extern volatile __bit LC2D1S3 @ (((unsigned) &CLC2SEL0)*8) + 3;
-[; ;pic16lf1704.h: 12386: extern volatile __bit LC2D1S4 @ (((unsigned) &CLC2SEL0)*8) + 4;
-[; ;pic16lf1704.h: 12388: extern volatile __bit LC2D2S0 @ (((unsigned) &CLC2SEL1)*8) + 0;
-[; ;pic16lf1704.h: 12390: extern volatile __bit LC2D2S1 @ (((unsigned) &CLC2SEL1)*8) + 1;
-[; ;pic16lf1704.h: 12392: extern volatile __bit LC2D2S2 @ (((unsigned) &CLC2SEL1)*8) + 2;
-[; ;pic16lf1704.h: 12394: extern volatile __bit LC2D2S3 @ (((unsigned) &CLC2SEL1)*8) + 3;
-[; ;pic16lf1704.h: 12396: extern volatile __bit LC2D2S4 @ (((unsigned) &CLC2SEL1)*8) + 4;
-[; ;pic16lf1704.h: 12398: extern volatile __bit LC2D3S0 @ (((unsigned) &CLC2SEL2)*8) + 0;
-[; ;pic16lf1704.h: 12400: extern volatile __bit LC2D3S1 @ (((unsigned) &CLC2SEL2)*8) + 1;
-[; ;pic16lf1704.h: 12402: extern volatile __bit LC2D3S2 @ (((unsigned) &CLC2SEL2)*8) + 2;
-[; ;pic16lf1704.h: 12404: extern volatile __bit LC2D3S3 @ (((unsigned) &CLC2SEL2)*8) + 3;
-[; ;pic16lf1704.h: 12406: extern volatile __bit LC2D3S4 @ (((unsigned) &CLC2SEL2)*8) + 4;
-[; ;pic16lf1704.h: 12408: extern volatile __bit LC2D4S0 @ (((unsigned) &CLC2SEL3)*8) + 0;
-[; ;pic16lf1704.h: 12410: extern volatile __bit LC2D4S1 @ (((unsigned) &CLC2SEL3)*8) + 1;
-[; ;pic16lf1704.h: 12412: extern volatile __bit LC2D4S2 @ (((unsigned) &CLC2SEL3)*8) + 2;
-[; ;pic16lf1704.h: 12414: extern volatile __bit LC2D4S3 @ (((unsigned) &CLC2SEL3)*8) + 3;
-[; ;pic16lf1704.h: 12416: extern volatile __bit LC2D4S4 @ (((unsigned) &CLC2SEL3)*8) + 4;
-[; ;pic16lf1704.h: 12418: extern volatile __bit LC2EN @ (((unsigned) &CLC2CON)*8) + 7;
-[; ;pic16lf1704.h: 12420: extern volatile __bit LC2G1D1N @ (((unsigned) &CLC2GLS0)*8) + 0;
-[; ;pic16lf1704.h: 12422: extern volatile __bit LC2G1D1T @ (((unsigned) &CLC2GLS0)*8) + 1;
-[; ;pic16lf1704.h: 12424: extern volatile __bit LC2G1D2N @ (((unsigned) &CLC2GLS0)*8) + 2;
-[; ;pic16lf1704.h: 12426: extern volatile __bit LC2G1D2T @ (((unsigned) &CLC2GLS0)*8) + 3;
-[; ;pic16lf1704.h: 12428: extern volatile __bit LC2G1D3N @ (((unsigned) &CLC2GLS0)*8) + 4;
-[; ;pic16lf1704.h: 12430: extern volatile __bit LC2G1D3T @ (((unsigned) &CLC2GLS0)*8) + 5;
-[; ;pic16lf1704.h: 12432: extern volatile __bit LC2G1D4N @ (((unsigned) &CLC2GLS0)*8) + 6;
-[; ;pic16lf1704.h: 12434: extern volatile __bit LC2G1D4T @ (((unsigned) &CLC2GLS0)*8) + 7;
-[; ;pic16lf1704.h: 12436: extern volatile __bit LC2G1POL @ (((unsigned) &CLC2POL)*8) + 0;
-[; ;pic16lf1704.h: 12438: extern volatile __bit LC2G2D1N @ (((unsigned) &CLC2GLS1)*8) + 0;
-[; ;pic16lf1704.h: 12440: extern volatile __bit LC2G2D1T @ (((unsigned) &CLC2GLS1)*8) + 1;
-[; ;pic16lf1704.h: 12442: extern volatile __bit LC2G2D2N @ (((unsigned) &CLC2GLS1)*8) + 2;
-[; ;pic16lf1704.h: 12444: extern volatile __bit LC2G2D2T @ (((unsigned) &CLC2GLS1)*8) + 3;
-[; ;pic16lf1704.h: 12446: extern volatile __bit LC2G2D3N @ (((unsigned) &CLC2GLS1)*8) + 4;
-[; ;pic16lf1704.h: 12448: extern volatile __bit LC2G2D3T @ (((unsigned) &CLC2GLS1)*8) + 5;
-[; ;pic16lf1704.h: 12450: extern volatile __bit LC2G2D4N @ (((unsigned) &CLC2GLS1)*8) + 6;
-[; ;pic16lf1704.h: 12452: extern volatile __bit LC2G2D4T @ (((unsigned) &CLC2GLS1)*8) + 7;
-[; ;pic16lf1704.h: 12454: extern volatile __bit LC2G2POL @ (((unsigned) &CLC2POL)*8) + 1;
-[; ;pic16lf1704.h: 12456: extern volatile __bit LC2G3D1N @ (((unsigned) &CLC2GLS2)*8) + 0;
-[; ;pic16lf1704.h: 12458: extern volatile __bit LC2G3D1T @ (((unsigned) &CLC2GLS2)*8) + 1;
-[; ;pic16lf1704.h: 12460: extern volatile __bit LC2G3D2N @ (((unsigned) &CLC2GLS2)*8) + 2;
-[; ;pic16lf1704.h: 12462: extern volatile __bit LC2G3D2T @ (((unsigned) &CLC2GLS2)*8) + 3;
-[; ;pic16lf1704.h: 12464: extern volatile __bit LC2G3D3N @ (((unsigned) &CLC2GLS2)*8) + 4;
-[; ;pic16lf1704.h: 12466: extern volatile __bit LC2G3D3T @ (((unsigned) &CLC2GLS2)*8) + 5;
-[; ;pic16lf1704.h: 12468: extern volatile __bit LC2G3D4N @ (((unsigned) &CLC2GLS2)*8) + 6;
-[; ;pic16lf1704.h: 12470: extern volatile __bit LC2G3D4T @ (((unsigned) &CLC2GLS2)*8) + 7;
-[; ;pic16lf1704.h: 12472: extern volatile __bit LC2G3POL @ (((unsigned) &CLC2POL)*8) + 2;
-[; ;pic16lf1704.h: 12474: extern volatile __bit LC2G4D1N @ (((unsigned) &CLC2GLS3)*8) + 0;
-[; ;pic16lf1704.h: 12476: extern volatile __bit LC2G4D1T @ (((unsigned) &CLC2GLS3)*8) + 1;
-[; ;pic16lf1704.h: 12478: extern volatile __bit LC2G4D2N @ (((unsigned) &CLC2GLS3)*8) + 2;
-[; ;pic16lf1704.h: 12480: extern volatile __bit LC2G4D2T @ (((unsigned) &CLC2GLS3)*8) + 3;
-[; ;pic16lf1704.h: 12482: extern volatile __bit LC2G4D3N @ (((unsigned) &CLC2GLS3)*8) + 4;
-[; ;pic16lf1704.h: 12484: extern volatile __bit LC2G4D3T @ (((unsigned) &CLC2GLS3)*8) + 5;
-[; ;pic16lf1704.h: 12486: extern volatile __bit LC2G4D4N @ (((unsigned) &CLC2GLS3)*8) + 6;
-[; ;pic16lf1704.h: 12488: extern volatile __bit LC2G4D4T @ (((unsigned) &CLC2GLS3)*8) + 7;
-[; ;pic16lf1704.h: 12490: extern volatile __bit LC2G4POL @ (((unsigned) &CLC2POL)*8) + 3;
-[; ;pic16lf1704.h: 12492: extern volatile __bit LC2INTN @ (((unsigned) &CLC2CON)*8) + 3;
-[; ;pic16lf1704.h: 12494: extern volatile __bit LC2INTP @ (((unsigned) &CLC2CON)*8) + 4;
-[; ;pic16lf1704.h: 12496: extern volatile __bit LC2MODE0 @ (((unsigned) &CLC2CON)*8) + 0;
-[; ;pic16lf1704.h: 12498: extern volatile __bit LC2MODE1 @ (((unsigned) &CLC2CON)*8) + 1;
-[; ;pic16lf1704.h: 12500: extern volatile __bit LC2MODE2 @ (((unsigned) &CLC2CON)*8) + 2;
-[; ;pic16lf1704.h: 12502: extern volatile __bit LC2OUT @ (((unsigned) &CLC2CON)*8) + 5;
-[; ;pic16lf1704.h: 12504: extern volatile __bit LC2POL @ (((unsigned) &CLC2POL)*8) + 7;
-[; ;pic16lf1704.h: 12506: extern volatile __bit LC3D1S0 @ (((unsigned) &CLC3SEL0)*8) + 0;
-[; ;pic16lf1704.h: 12508: extern volatile __bit LC3D1S1 @ (((unsigned) &CLC3SEL0)*8) + 1;
-[; ;pic16lf1704.h: 12510: extern volatile __bit LC3D1S2 @ (((unsigned) &CLC3SEL0)*8) + 2;
-[; ;pic16lf1704.h: 12512: extern volatile __bit LC3D1S3 @ (((unsigned) &CLC3SEL0)*8) + 3;
-[; ;pic16lf1704.h: 12514: extern volatile __bit LC3D1S4 @ (((unsigned) &CLC3SEL0)*8) + 4;
-[; ;pic16lf1704.h: 12516: extern volatile __bit LC3D2S0 @ (((unsigned) &CLC3SEL1)*8) + 0;
-[; ;pic16lf1704.h: 12518: extern volatile __bit LC3D2S1 @ (((unsigned) &CLC3SEL1)*8) + 1;
-[; ;pic16lf1704.h: 12520: extern volatile __bit LC3D2S2 @ (((unsigned) &CLC3SEL1)*8) + 2;
-[; ;pic16lf1704.h: 12522: extern volatile __bit LC3D2S3 @ (((unsigned) &CLC3SEL1)*8) + 3;
-[; ;pic16lf1704.h: 12524: extern volatile __bit LC3D2S4 @ (((unsigned) &CLC3SEL1)*8) + 4;
-[; ;pic16lf1704.h: 12526: extern volatile __bit LC3D3S0 @ (((unsigned) &CLC3SEL2)*8) + 0;
-[; ;pic16lf1704.h: 12528: extern volatile __bit LC3D3S1 @ (((unsigned) &CLC3SEL2)*8) + 1;
-[; ;pic16lf1704.h: 12530: extern volatile __bit LC3D3S2 @ (((unsigned) &CLC3SEL2)*8) + 2;
-[; ;pic16lf1704.h: 12532: extern volatile __bit LC3D3S3 @ (((unsigned) &CLC3SEL2)*8) + 3;
-[; ;pic16lf1704.h: 12534: extern volatile __bit LC3D3S4 @ (((unsigned) &CLC3SEL2)*8) + 4;
-[; ;pic16lf1704.h: 12536: extern volatile __bit LC3D4S0 @ (((unsigned) &CLC3SEL3)*8) + 0;
-[; ;pic16lf1704.h: 12538: extern volatile __bit LC3D4S1 @ (((unsigned) &CLC3SEL3)*8) + 1;
-[; ;pic16lf1704.h: 12540: extern volatile __bit LC3D4S2 @ (((unsigned) &CLC3SEL3)*8) + 2;
-[; ;pic16lf1704.h: 12542: extern volatile __bit LC3D4S3 @ (((unsigned) &CLC3SEL3)*8) + 3;
-[; ;pic16lf1704.h: 12544: extern volatile __bit LC3D4S4 @ (((unsigned) &CLC3SEL3)*8) + 4;
-[; ;pic16lf1704.h: 12546: extern volatile __bit LC3EN @ (((unsigned) &CLC3CON)*8) + 7;
-[; ;pic16lf1704.h: 12548: extern volatile __bit LC3G1D1N @ (((unsigned) &CLC3GLS0)*8) + 0;
-[; ;pic16lf1704.h: 12550: extern volatile __bit LC3G1D1T @ (((unsigned) &CLC3GLS0)*8) + 1;
-[; ;pic16lf1704.h: 12552: extern volatile __bit LC3G1D2N @ (((unsigned) &CLC3GLS0)*8) + 2;
-[; ;pic16lf1704.h: 12554: extern volatile __bit LC3G1D2T @ (((unsigned) &CLC3GLS0)*8) + 3;
-[; ;pic16lf1704.h: 12556: extern volatile __bit LC3G1D3N @ (((unsigned) &CLC3GLS0)*8) + 4;
-[; ;pic16lf1704.h: 12558: extern volatile __bit LC3G1D3T @ (((unsigned) &CLC3GLS0)*8) + 5;
-[; ;pic16lf1704.h: 12560: extern volatile __bit LC3G1D4N @ (((unsigned) &CLC3GLS0)*8) + 6;
-[; ;pic16lf1704.h: 12562: extern volatile __bit LC3G1D4T @ (((unsigned) &CLC3GLS0)*8) + 7;
-[; ;pic16lf1704.h: 12564: extern volatile __bit LC3G1POL @ (((unsigned) &CLC3POL)*8) + 0;
-[; ;pic16lf1704.h: 12566: extern volatile __bit LC3G2D1N @ (((unsigned) &CLC3GLS1)*8) + 0;
-[; ;pic16lf1704.h: 12568: extern volatile __bit LC3G2D1T @ (((unsigned) &CLC3GLS1)*8) + 1;
-[; ;pic16lf1704.h: 12570: extern volatile __bit LC3G2D2N @ (((unsigned) &CLC3GLS1)*8) + 2;
-[; ;pic16lf1704.h: 12572: extern volatile __bit LC3G2D2T @ (((unsigned) &CLC3GLS1)*8) + 3;
-[; ;pic16lf1704.h: 12574: extern volatile __bit LC3G2D3N @ (((unsigned) &CLC3GLS1)*8) + 4;
-[; ;pic16lf1704.h: 12576: extern volatile __bit LC3G2D3T @ (((unsigned) &CLC3GLS1)*8) + 5;
-[; ;pic16lf1704.h: 12578: extern volatile __bit LC3G2D4N @ (((unsigned) &CLC3GLS1)*8) + 6;
-[; ;pic16lf1704.h: 12580: extern volatile __bit LC3G2D4T @ (((unsigned) &CLC3GLS1)*8) + 7;
-[; ;pic16lf1704.h: 12582: extern volatile __bit LC3G2POL @ (((unsigned) &CLC3POL)*8) + 1;
-[; ;pic16lf1704.h: 12584: extern volatile __bit LC3G3D1N @ (((unsigned) &CLC3GLS2)*8) + 0;
-[; ;pic16lf1704.h: 12586: extern volatile __bit LC3G3D1T @ (((unsigned) &CLC3GLS2)*8) + 1;
-[; ;pic16lf1704.h: 12588: extern volatile __bit LC3G3D2N @ (((unsigned) &CLC3GLS2)*8) + 2;
-[; ;pic16lf1704.h: 12590: extern volatile __bit LC3G3D2T @ (((unsigned) &CLC3GLS2)*8) + 3;
-[; ;pic16lf1704.h: 12592: extern volatile __bit LC3G3D3N @ (((unsigned) &CLC3GLS2)*8) + 4;
-[; ;pic16lf1704.h: 12594: extern volatile __bit LC3G3D3T @ (((unsigned) &CLC3GLS2)*8) + 5;
-[; ;pic16lf1704.h: 12596: extern volatile __bit LC3G3D4N @ (((unsigned) &CLC3GLS2)*8) + 6;
-[; ;pic16lf1704.h: 12598: extern volatile __bit LC3G3D4T @ (((unsigned) &CLC3GLS2)*8) + 7;
-[; ;pic16lf1704.h: 12600: extern volatile __bit LC3G3POL @ (((unsigned) &CLC3POL)*8) + 2;
-[; ;pic16lf1704.h: 12602: extern volatile __bit LC3G4D1N @ (((unsigned) &CLC3GLS3)*8) + 0;
-[; ;pic16lf1704.h: 12604: extern volatile __bit LC3G4D1T @ (((unsigned) &CLC3GLS3)*8) + 1;
-[; ;pic16lf1704.h: 12606: extern volatile __bit LC3G4D2N @ (((unsigned) &CLC3GLS3)*8) + 2;
-[; ;pic16lf1704.h: 12608: extern volatile __bit LC3G4D2T @ (((unsigned) &CLC3GLS3)*8) + 3;
-[; ;pic16lf1704.h: 12610: extern volatile __bit LC3G4D3N @ (((unsigned) &CLC3GLS3)*8) + 4;
-[; ;pic16lf1704.h: 12612: extern volatile __bit LC3G4D3T @ (((unsigned) &CLC3GLS3)*8) + 5;
-[; ;pic16lf1704.h: 12614: extern volatile __bit LC3G4D4N @ (((unsigned) &CLC3GLS3)*8) + 6;
-[; ;pic16lf1704.h: 12616: extern volatile __bit LC3G4D4T @ (((unsigned) &CLC3GLS3)*8) + 7;
-[; ;pic16lf1704.h: 12618: extern volatile __bit LC3G4POL @ (((unsigned) &CLC3POL)*8) + 3;
-[; ;pic16lf1704.h: 12620: extern volatile __bit LC3INTN @ (((unsigned) &CLC3CON)*8) + 3;
-[; ;pic16lf1704.h: 12622: extern volatile __bit LC3INTP @ (((unsigned) &CLC3CON)*8) + 4;
-[; ;pic16lf1704.h: 12624: extern volatile __bit LC3MODE0 @ (((unsigned) &CLC3CON)*8) + 0;
-[; ;pic16lf1704.h: 12626: extern volatile __bit LC3MODE1 @ (((unsigned) &CLC3CON)*8) + 1;
-[; ;pic16lf1704.h: 12628: extern volatile __bit LC3MODE2 @ (((unsigned) &CLC3CON)*8) + 2;
-[; ;pic16lf1704.h: 12630: extern volatile __bit LC3OUT @ (((unsigned) &CLC3CON)*8) + 5;
-[; ;pic16lf1704.h: 12632: extern volatile __bit LC3POL @ (((unsigned) &CLC3POL)*8) + 7;
-[; ;pic16lf1704.h: 12634: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
-[; ;pic16lf1704.h: 12636: extern volatile __bit LWLO @ (((unsigned) &PMCON1)*8) + 5;
-[; ;pic16lf1704.h: 12638: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
-[; ;pic16lf1704.h: 12640: extern volatile __bit MC2OUT @ (((unsigned) &CMOUT)*8) + 1;
-[; ;pic16lf1704.h: 12642: extern volatile __bit MCLC1OUT @ (((unsigned) &CLCDATA)*8) + 0;
-[; ;pic16lf1704.h: 12644: extern volatile __bit MCLC2OUT @ (((unsigned) &CLCDATA)*8) + 1;
-[; ;pic16lf1704.h: 12646: extern volatile __bit MCLC3OUT @ (((unsigned) &CLCDATA)*8) + 2;
-[; ;pic16lf1704.h: 12648: extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
-[; ;pic16lf1704.h: 12650: extern volatile __bit MSK0 @ (((unsigned) &SSP1MSK)*8) + 0;
-[; ;pic16lf1704.h: 12652: extern volatile __bit MSK1 @ (((unsigned) &SSP1MSK)*8) + 1;
-[; ;pic16lf1704.h: 12654: extern volatile __bit MSK2 @ (((unsigned) &SSP1MSK)*8) + 2;
-[; ;pic16lf1704.h: 12656: extern volatile __bit MSK3 @ (((unsigned) &SSP1MSK)*8) + 3;
-[; ;pic16lf1704.h: 12658: extern volatile __bit MSK4 @ (((unsigned) &SSP1MSK)*8) + 4;
-[; ;pic16lf1704.h: 12660: extern volatile __bit MSK5 @ (((unsigned) &SSP1MSK)*8) + 5;
-[; ;pic16lf1704.h: 12662: extern volatile __bit MSK6 @ (((unsigned) &SSP1MSK)*8) + 6;
-[; ;pic16lf1704.h: 12664: extern volatile __bit MSK7 @ (((unsigned) &SSP1MSK)*8) + 7;
-[; ;pic16lf1704.h: 12666: extern volatile __bit ODA0 @ (((unsigned) &ODCONA)*8) + 0;
-[; ;pic16lf1704.h: 12668: extern volatile __bit ODA1 @ (((unsigned) &ODCONA)*8) + 1;
-[; ;pic16lf1704.h: 12670: extern volatile __bit ODA2 @ (((unsigned) &ODCONA)*8) + 2;
-[; ;pic16lf1704.h: 12672: extern volatile __bit ODA4 @ (((unsigned) &ODCONA)*8) + 4;
-[; ;pic16lf1704.h: 12674: extern volatile __bit ODA5 @ (((unsigned) &ODCONA)*8) + 5;
-[; ;pic16lf1704.h: 12676: extern volatile __bit ODC0 @ (((unsigned) &ODCONC)*8) + 0;
-[; ;pic16lf1704.h: 12678: extern volatile __bit ODC1 @ (((unsigned) &ODCONC)*8) + 1;
-[; ;pic16lf1704.h: 12680: extern volatile __bit ODC2 @ (((unsigned) &ODCONC)*8) + 2;
-[; ;pic16lf1704.h: 12682: extern volatile __bit ODC3 @ (((unsigned) &ODCONC)*8) + 3;
-[; ;pic16lf1704.h: 12684: extern volatile __bit ODC4 @ (((unsigned) &ODCONC)*8) + 4;
-[; ;pic16lf1704.h: 12686: extern volatile __bit ODC5 @ (((unsigned) &ODCONC)*8) + 5;
-[; ;pic16lf1704.h: 12688: extern volatile __bit OERR @ (((unsigned) &RC1STA)*8) + 1;
-[; ;pic16lf1704.h: 12690: extern volatile __bit OPA1EN @ (((unsigned) &OPA1CON)*8) + 7;
-[; ;pic16lf1704.h: 12692: extern volatile __bit OPA1PCH0 @ (((unsigned) &OPA1CON)*8) + 0;
-[; ;pic16lf1704.h: 12694: extern volatile __bit OPA1PCH1 @ (((unsigned) &OPA1CON)*8) + 1;
-[; ;pic16lf1704.h: 12696: extern volatile __bit OPA1SP @ (((unsigned) &OPA1CON)*8) + 6;
-[; ;pic16lf1704.h: 12698: extern volatile __bit OPA1UG @ (((unsigned) &OPA1CON)*8) + 4;
-[; ;pic16lf1704.h: 12700: extern volatile __bit OPA2EN @ (((unsigned) &OPA2CON)*8) + 7;
-[; ;pic16lf1704.h: 12702: extern volatile __bit OPA2PCH0 @ (((unsigned) &OPA2CON)*8) + 0;
-[; ;pic16lf1704.h: 12704: extern volatile __bit OPA2PCH1 @ (((unsigned) &OPA2CON)*8) + 1;
-[; ;pic16lf1704.h: 12706: extern volatile __bit OPA2SP @ (((unsigned) &OPA2CON)*8) + 6;
-[; ;pic16lf1704.h: 12708: extern volatile __bit OPA2UG @ (((unsigned) &OPA2CON)*8) + 4;
-[; ;pic16lf1704.h: 12710: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
-[; ;pic16lf1704.h: 12712: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
-[; ;pic16lf1704.h: 12714: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
-[; ;pic16lf1704.h: 12716: extern volatile __bit P3TSEL0 @ (((unsigned) &CCPTMRS)*8) + 4;
-[; ;pic16lf1704.h: 12718: extern volatile __bit P3TSEL1 @ (((unsigned) &CCPTMRS)*8) + 5;
-[; ;pic16lf1704.h: 12720: extern volatile __bit P4TSEL0 @ (((unsigned) &CCPTMRS)*8) + 6;
-[; ;pic16lf1704.h: 12722: extern volatile __bit P4TSEL1 @ (((unsigned) &CCPTMRS)*8) + 7;
-[; ;pic16lf1704.h: 12724: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
-[; ;pic16lf1704.h: 12726: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
-[; ;pic16lf1704.h: 12728: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
-[; ;pic16lf1704.h: 12730: extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
-[; ;pic16lf1704.h: 12732: extern volatile __bit PPSLOCKED @ (((unsigned) &PPSLOCK)*8) + 0;
-[; ;pic16lf1704.h: 12734: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
-[; ;pic16lf1704.h: 12736: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
-[; ;pic16lf1704.h: 12738: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
-[; ;pic16lf1704.h: 12740: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
-[; ;pic16lf1704.h: 12742: extern volatile __bit PWM3DCH0 @ (((unsigned) &PWM3DCH)*8) + 0;
-[; ;pic16lf1704.h: 12744: extern volatile __bit PWM3DCH1 @ (((unsigned) &PWM3DCH)*8) + 1;
-[; ;pic16lf1704.h: 12746: extern volatile __bit PWM3DCH2 @ (((unsigned) &PWM3DCH)*8) + 2;
-[; ;pic16lf1704.h: 12748: extern volatile __bit PWM3DCH3 @ (((unsigned) &PWM3DCH)*8) + 3;
-[; ;pic16lf1704.h: 12750: extern volatile __bit PWM3DCH4 @ (((unsigned) &PWM3DCH)*8) + 4;
-[; ;pic16lf1704.h: 12752: extern volatile __bit PWM3DCH5 @ (((unsigned) &PWM3DCH)*8) + 5;
-[; ;pic16lf1704.h: 12754: extern volatile __bit PWM3DCH6 @ (((unsigned) &PWM3DCH)*8) + 6;
-[; ;pic16lf1704.h: 12756: extern volatile __bit PWM3DCH7 @ (((unsigned) &PWM3DCH)*8) + 7;
-[; ;pic16lf1704.h: 12758: extern volatile __bit PWM3DCL0 @ (((unsigned) &PWM3DCL)*8) + 6;
-[; ;pic16lf1704.h: 12760: extern volatile __bit PWM3DCL1 @ (((unsigned) &PWM3DCL)*8) + 7;
-[; ;pic16lf1704.h: 12762: extern volatile __bit PWM3EN @ (((unsigned) &PWM3CON)*8) + 7;
-[; ;pic16lf1704.h: 12764: extern volatile __bit PWM3OUT @ (((unsigned) &PWM3CON)*8) + 5;
-[; ;pic16lf1704.h: 12766: extern volatile __bit PWM3POL @ (((unsigned) &PWM3CON)*8) + 4;
-[; ;pic16lf1704.h: 12768: extern volatile __bit PWM4DCH0 @ (((unsigned) &PWM4DCH)*8) + 0;
-[; ;pic16lf1704.h: 12770: extern volatile __bit PWM4DCH1 @ (((unsigned) &PWM4DCH)*8) + 1;
-[; ;pic16lf1704.h: 12772: extern volatile __bit PWM4DCH2 @ (((unsigned) &PWM4DCH)*8) + 2;
-[; ;pic16lf1704.h: 12774: extern volatile __bit PWM4DCH3 @ (((unsigned) &PWM4DCH)*8) + 3;
-[; ;pic16lf1704.h: 12776: extern volatile __bit PWM4DCH4 @ (((unsigned) &PWM4DCH)*8) + 4;
-[; ;pic16lf1704.h: 12778: extern volatile __bit PWM4DCH5 @ (((unsigned) &PWM4DCH)*8) + 5;
-[; ;pic16lf1704.h: 12780: extern volatile __bit PWM4DCH6 @ (((unsigned) &PWM4DCH)*8) + 6;
-[; ;pic16lf1704.h: 12782: extern volatile __bit PWM4DCH7 @ (((unsigned) &PWM4DCH)*8) + 7;
-[; ;pic16lf1704.h: 12784: extern volatile __bit PWM4DCL0 @ (((unsigned) &PWM4DCL)*8) + 6;
-[; ;pic16lf1704.h: 12786: extern volatile __bit PWM4DCL1 @ (((unsigned) &PWM4DCL)*8) + 7;
-[; ;pic16lf1704.h: 12788: extern volatile __bit PWM4EN @ (((unsigned) &PWM4CON)*8) + 7;
-[; ;pic16lf1704.h: 12790: extern volatile __bit PWM4OUT @ (((unsigned) &PWM4CON)*8) + 5;
-[; ;pic16lf1704.h: 12792: extern volatile __bit PWM4POL @ (((unsigned) &PWM4CON)*8) + 4;
-[; ;pic16lf1704.h: 12794: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
-[; ;pic16lf1704.h: 12796: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
-[; ;pic16lf1704.h: 12798: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
-[; ;pic16lf1704.h: 12800: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
-[; ;pic16lf1704.h: 12802: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
-[; ;pic16lf1704.h: 12804: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
-[; ;pic16lf1704.h: 12806: extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
-[; ;pic16lf1704.h: 12808: extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
-[; ;pic16lf1704.h: 12810: extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
-[; ;pic16lf1704.h: 12812: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
-[; ;pic16lf1704.h: 12814: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
-[; ;pic16lf1704.h: 12816: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
-[; ;pic16lf1704.h: 12818: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
-[; ;pic16lf1704.h: 12820: extern volatile __bit RCIDL @ (((unsigned) &BAUD1CON)*8) + 6;
-[; ;pic16lf1704.h: 12822: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
-[; ;pic16lf1704.h: 12824: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
-[; ;pic16lf1704.h: 12826: extern volatile __bit RD @ (((unsigned) &PMCON1)*8) + 0;
-[; ;pic16lf1704.h: 12828: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
-[; ;pic16lf1704.h: 12830: extern volatile __bit RX9 @ (((unsigned) &RC1STA)*8) + 6;
-[; ;pic16lf1704.h: 12832: extern volatile __bit RX9D @ (((unsigned) &RC1STA)*8) + 0;
-[; ;pic16lf1704.h: 12834: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
-[; ;pic16lf1704.h: 12836: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
-[; ;pic16lf1704.h: 12838: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
-[; ;pic16lf1704.h: 12840: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
-[; ;pic16lf1704.h: 12842: extern volatile __bit SCKP @ (((unsigned) &BAUD1CON)*8) + 4;
-[; ;pic16lf1704.h: 12844: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
-[; ;pic16lf1704.h: 12846: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
-[; ;pic16lf1704.h: 12848: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
-[; ;pic16lf1704.h: 12850: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
-[; ;pic16lf1704.h: 12852: extern volatile __bit SENDB @ (((unsigned) &TX1STA)*8) + 3;
-[; ;pic16lf1704.h: 12854: extern volatile __bit SLRA0 @ (((unsigned) &SLRCONA)*8) + 0;
-[; ;pic16lf1704.h: 12856: extern volatile __bit SLRA1 @ (((unsigned) &SLRCONA)*8) + 1;
-[; ;pic16lf1704.h: 12858: extern volatile __bit SLRA2 @ (((unsigned) &SLRCONA)*8) + 2;
-[; ;pic16lf1704.h: 12860: extern volatile __bit SLRA4 @ (((unsigned) &SLRCONA)*8) + 4;
-[; ;pic16lf1704.h: 12862: extern volatile __bit SLRA5 @ (((unsigned) &SLRCONA)*8) + 5;
-[; ;pic16lf1704.h: 12864: extern volatile __bit SLRC0 @ (((unsigned) &SLRCONC)*8) + 0;
-[; ;pic16lf1704.h: 12866: extern volatile __bit SLRC1 @ (((unsigned) &SLRCONC)*8) + 1;
-[; ;pic16lf1704.h: 12868: extern volatile __bit SLRC2 @ (((unsigned) &SLRCONC)*8) + 2;
-[; ;pic16lf1704.h: 12870: extern volatile __bit SLRC3 @ (((unsigned) &SLRCONC)*8) + 3;
-[; ;pic16lf1704.h: 12872: extern volatile __bit SLRC4 @ (((unsigned) &SLRCONC)*8) + 4;
-[; ;pic16lf1704.h: 12874: extern volatile __bit SLRC5 @ (((unsigned) &SLRCONC)*8) + 5;
-[; ;pic16lf1704.h: 12876: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
-[; ;pic16lf1704.h: 12878: extern volatile __bit SOSCR @ (((unsigned) &OSCSTAT)*8) + 7;
-[; ;pic16lf1704.h: 12880: extern volatile __bit SPEN @ (((unsigned) &RC1STA)*8) + 7;
-[; ;pic16lf1704.h: 12882: extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
-[; ;pic16lf1704.h: 12884: extern volatile __bit SREN @ (((unsigned) &RC1STA)*8) + 5;
-[; ;pic16lf1704.h: 12886: extern volatile __bit SSP1ADD0 @ (((unsigned) &SSP1ADD)*8) + 0;
-[; ;pic16lf1704.h: 12888: extern volatile __bit SSP1ADD1 @ (((unsigned) &SSP1ADD)*8) + 1;
-[; ;pic16lf1704.h: 12890: extern volatile __bit SSP1ADD2 @ (((unsigned) &SSP1ADD)*8) + 2;
-[; ;pic16lf1704.h: 12892: extern volatile __bit SSP1ADD3 @ (((unsigned) &SSP1ADD)*8) + 3;
-[; ;pic16lf1704.h: 12894: extern volatile __bit SSP1ADD4 @ (((unsigned) &SSP1ADD)*8) + 4;
-[; ;pic16lf1704.h: 12896: extern volatile __bit SSP1ADD5 @ (((unsigned) &SSP1ADD)*8) + 5;
-[; ;pic16lf1704.h: 12898: extern volatile __bit SSP1ADD6 @ (((unsigned) &SSP1ADD)*8) + 6;
-[; ;pic16lf1704.h: 12900: extern volatile __bit SSP1ADD7 @ (((unsigned) &SSP1ADD)*8) + 7;
-[; ;pic16lf1704.h: 12902: extern volatile __bit SSP1BUF0 @ (((unsigned) &SSP1BUF)*8) + 0;
-[; ;pic16lf1704.h: 12904: extern volatile __bit SSP1BUF1 @ (((unsigned) &SSP1BUF)*8) + 1;
-[; ;pic16lf1704.h: 12906: extern volatile __bit SSP1BUF2 @ (((unsigned) &SSP1BUF)*8) + 2;
-[; ;pic16lf1704.h: 12908: extern volatile __bit SSP1BUF3 @ (((unsigned) &SSP1BUF)*8) + 3;
-[; ;pic16lf1704.h: 12910: extern volatile __bit SSP1BUF4 @ (((unsigned) &SSP1BUF)*8) + 4;
-[; ;pic16lf1704.h: 12912: extern volatile __bit SSP1BUF5 @ (((unsigned) &SSP1BUF)*8) + 5;
-[; ;pic16lf1704.h: 12914: extern volatile __bit SSP1BUF6 @ (((unsigned) &SSP1BUF)*8) + 6;
-[; ;pic16lf1704.h: 12916: extern volatile __bit SSP1BUF7 @ (((unsigned) &SSP1BUF)*8) + 7;
-[; ;pic16lf1704.h: 12918: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
-[; ;pic16lf1704.h: 12920: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
-[; ;pic16lf1704.h: 12922: extern volatile __bit SSP1MSK0 @ (((unsigned) &SSP1MSK)*8) + 0;
-[; ;pic16lf1704.h: 12924: extern volatile __bit SSP1MSK1 @ (((unsigned) &SSP1MSK)*8) + 1;
-[; ;pic16lf1704.h: 12926: extern volatile __bit SSP1MSK2 @ (((unsigned) &SSP1MSK)*8) + 2;
-[; ;pic16lf1704.h: 12928: extern volatile __bit SSP1MSK3 @ (((unsigned) &SSP1MSK)*8) + 3;
-[; ;pic16lf1704.h: 12930: extern volatile __bit SSP1MSK4 @ (((unsigned) &SSP1MSK)*8) + 4;
-[; ;pic16lf1704.h: 12932: extern volatile __bit SSP1MSK5 @ (((unsigned) &SSP1MSK)*8) + 5;
-[; ;pic16lf1704.h: 12934: extern volatile __bit SSP1MSK6 @ (((unsigned) &SSP1MSK)*8) + 6;
-[; ;pic16lf1704.h: 12936: extern volatile __bit SSP1MSK7 @ (((unsigned) &SSP1MSK)*8) + 7;
-[; ;pic16lf1704.h: 12938: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
-[; ;pic16lf1704.h: 12940: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
-[; ;pic16lf1704.h: 12942: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
-[; ;pic16lf1704.h: 12944: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
-[; ;pic16lf1704.h: 12946: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
-[; ;pic16lf1704.h: 12948: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
-[; ;pic16lf1704.h: 12950: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
-[; ;pic16lf1704.h: 12952: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
-[; ;pic16lf1704.h: 12954: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
-[; ;pic16lf1704.h: 12956: extern volatile __bit SYNC @ (((unsigned) &TX1STA)*8) + 4;
-[; ;pic16lf1704.h: 12958: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
-[; ;pic16lf1704.h: 12960: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
-[; ;pic16lf1704.h: 12962: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
-[; ;pic16lf1704.h: 12964: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
-[; ;pic16lf1704.h: 12966: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
-[; ;pic16lf1704.h: 12968: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
-[; ;pic16lf1704.h: 12970: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
-[; ;pic16lf1704.h: 12972: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
-[; ;pic16lf1704.h: 12974: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
-[; ;pic16lf1704.h: 12976: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
-[; ;pic16lf1704.h: 12978: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
-[; ;pic16lf1704.h: 12980: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
-[; ;pic16lf1704.h: 12982: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
-[; ;pic16lf1704.h: 12984: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
-[; ;pic16lf1704.h: 12986: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
-[; ;pic16lf1704.h: 12988: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
-[; ;pic16lf1704.h: 12990: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
-[; ;pic16lf1704.h: 12992: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
-[; ;pic16lf1704.h: 12994: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
-[; ;pic16lf1704.h: 12996: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
-[; ;pic16lf1704.h: 12998: extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
-[; ;pic16lf1704.h: 13000: extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
-[; ;pic16lf1704.h: 13002: extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
-[; ;pic16lf1704.h: 13004: extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
-[; ;pic16lf1704.h: 13006: extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
-[; ;pic16lf1704.h: 13008: extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
-[; ;pic16lf1704.h: 13010: extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
-[; ;pic16lf1704.h: 13012: extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
-[; ;pic16lf1704.h: 13014: extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
-[; ;pic16lf1704.h: 13016: extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
-[; ;pic16lf1704.h: 13018: extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
-[; ;pic16lf1704.h: 13020: extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
-[; ;pic16lf1704.h: 13022: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
-[; ;pic16lf1704.h: 13024: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
-[; ;pic16lf1704.h: 13026: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
-[; ;pic16lf1704.h: 13028: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
-[; ;pic16lf1704.h: 13030: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
-[; ;pic16lf1704.h: 13032: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
-[; ;pic16lf1704.h: 13034: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
-[; ;pic16lf1704.h: 13036: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
-[; ;pic16lf1704.h: 13038: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
-[; ;pic16lf1704.h: 13040: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
-[; ;pic16lf1704.h: 13042: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
-[; ;pic16lf1704.h: 13044: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
-[; ;pic16lf1704.h: 13046: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
-[; ;pic16lf1704.h: 13048: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
-[; ;pic16lf1704.h: 13050: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
-[; ;pic16lf1704.h: 13052: extern volatile __bit TMR4IE @ (((unsigned) &PIE2)*8) + 1;
-[; ;pic16lf1704.h: 13054: extern volatile __bit TMR4IF @ (((unsigned) &PIR2)*8) + 1;
-[; ;pic16lf1704.h: 13056: extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
-[; ;pic16lf1704.h: 13058: extern volatile __bit TMR6IE @ (((unsigned) &PIE2)*8) + 2;
-[; ;pic16lf1704.h: 13060: extern volatile __bit TMR6IF @ (((unsigned) &PIR2)*8) + 2;
-[; ;pic16lf1704.h: 13062: extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
-[; ;pic16lf1704.h: 13064: extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCON2)*8) + 4;
-[; ;pic16lf1704.h: 13066: extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCON2)*8) + 5;
-[; ;pic16lf1704.h: 13068: extern volatile __bit TRIGSEL2 @ (((unsigned) &ADCON2)*8) + 6;
-[; ;pic16lf1704.h: 13070: extern volatile __bit TRIGSEL3 @ (((unsigned) &ADCON2)*8) + 7;
-[; ;pic16lf1704.h: 13072: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
-[; ;pic16lf1704.h: 13074: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
-[; ;pic16lf1704.h: 13076: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
-[; ;pic16lf1704.h: 13078: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
-[; ;pic16lf1704.h: 13080: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
-[; ;pic16lf1704.h: 13082: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
-[; ;pic16lf1704.h: 13084: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
-[; ;pic16lf1704.h: 13086: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
-[; ;pic16lf1704.h: 13088: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
-[; ;pic16lf1704.h: 13090: extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
-[; ;pic16lf1704.h: 13092: extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
-[; ;pic16lf1704.h: 13094: extern volatile __bit TRMT @ (((unsigned) &TX1STA)*8) + 1;
-[; ;pic16lf1704.h: 13096: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
-[; ;pic16lf1704.h: 13098: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
-[; ;pic16lf1704.h: 13100: extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
-[; ;pic16lf1704.h: 13102: extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
-[; ;pic16lf1704.h: 13104: extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
-[; ;pic16lf1704.h: 13106: extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
-[; ;pic16lf1704.h: 13108: extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
-[; ;pic16lf1704.h: 13110: extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
-[; ;pic16lf1704.h: 13112: extern volatile __bit TX9 @ (((unsigned) &TX1STA)*8) + 6;
-[; ;pic16lf1704.h: 13114: extern volatile __bit TX9D @ (((unsigned) &TX1STA)*8) + 0;
-[; ;pic16lf1704.h: 13116: extern volatile __bit TXEN @ (((unsigned) &TX1STA)*8) + 5;
-[; ;pic16lf1704.h: 13118: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
-[; ;pic16lf1704.h: 13120: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
-[; ;pic16lf1704.h: 13122: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
-[; ;pic16lf1704.h: 13124: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
-[; ;pic16lf1704.h: 13126: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
-[; ;pic16lf1704.h: 13128: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
-[; ;pic16lf1704.h: 13130: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
-[; ;pic16lf1704.h: 13132: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
-[; ;pic16lf1704.h: 13134: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
-[; ;pic16lf1704.h: 13136: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
-[; ;pic16lf1704.h: 13138: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
-[; ;pic16lf1704.h: 13140: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
-[; ;pic16lf1704.h: 13142: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
-[; ;pic16lf1704.h: 13144: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
-[; ;pic16lf1704.h: 13146: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
-[; ;pic16lf1704.h: 13148: extern volatile __bit WPUC0 @ (((unsigned) &WPUC)*8) + 0;
-[; ;pic16lf1704.h: 13150: extern volatile __bit WPUC1 @ (((unsigned) &WPUC)*8) + 1;
-[; ;pic16lf1704.h: 13152: extern volatile __bit WPUC2 @ (((unsigned) &WPUC)*8) + 2;
-[; ;pic16lf1704.h: 13154: extern volatile __bit WPUC3 @ (((unsigned) &WPUC)*8) + 3;
-[; ;pic16lf1704.h: 13156: extern volatile __bit WPUC4 @ (((unsigned) &WPUC)*8) + 4;
-[; ;pic16lf1704.h: 13158: extern volatile __bit WPUC5 @ (((unsigned) &WPUC)*8) + 5;
-[; ;pic16lf1704.h: 13160: extern volatile __bit WR @ (((unsigned) &PMCON1)*8) + 1;
-[; ;pic16lf1704.h: 13162: extern volatile __bit WREN @ (((unsigned) &PMCON1)*8) + 2;
-[; ;pic16lf1704.h: 13164: extern volatile __bit WRERR @ (((unsigned) &PMCON1)*8) + 3;
-[; ;pic16lf1704.h: 13166: extern volatile __bit WUE @ (((unsigned) &BAUD1CON)*8) + 1;
-[; ;pic16lf1704.h: 13168: extern volatile __bit ZCD1EN @ (((unsigned) &ZCD1CON)*8) + 7;
-[; ;pic16lf1704.h: 13170: extern volatile __bit ZCD1INTN @ (((unsigned) &ZCD1CON)*8) + 0;
-[; ;pic16lf1704.h: 13172: extern volatile __bit ZCD1INTP @ (((unsigned) &ZCD1CON)*8) + 1;
-[; ;pic16lf1704.h: 13174: extern volatile __bit ZCD1OUT @ (((unsigned) &ZCD1CON)*8) + 5;
-[; ;pic16lf1704.h: 13176: extern volatile __bit ZCD1POL @ (((unsigned) &ZCD1CON)*8) + 4;
-[; ;pic16lf1704.h: 13178: extern volatile __bit ZCDIE @ (((unsigned) &PIE3)*8) + 4;
-[; ;pic16lf1704.h: 13180: extern volatile __bit ZCDIF @ (((unsigned) &PIR3)*8) + 4;
-[; ;pic16lf1704.h: 13182: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
-[; ;pic16lf1704.h: 13184: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
-[; ;pic16lf1704.h: 13186: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
-[; ;pic16lf1704.h: 13188: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
-[; ;pic16lf1704.h: 13190: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
-[; ;pic16lf1704.h: 13192: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
-[; ;pic16lf1704.h: 13194: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
-[; ;pic16lf1704.h: 13196: extern volatile __bit nRWDT @ (((unsigned) &PCON)*8) + 4;
-[; ;pic16lf1704.h: 13198: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
-[; ;pic16lf1704.h: 13200: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
-[; ;pic16lf1704.h: 13202: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
-[; ;pic.h: 28: extern void __nop(void);
-[; ;pic.h: 80: extern unsigned int flash_read(unsigned short addr);
-[; ;pic.h: 154: extern __nonreentrant void _delay(unsigned long);
-"11 main.c
-[p x FOSC=INTOSC ]
-"12
-[p x WDTE=OFF ]
-"13
-[p x PWRTE=OFF ]
-"14
-[p x MCLRE=ON ]
-"15
-[p x CP=OFF ]
-"16
-[p x BOREN=ON ]
-"17
-[p x CLKOUTEN=OFF ]
-"18
-[p x IESO=OFF ]
-"19
-[p x FCMEN=ON ]
-"22
-[p x WRT=OFF ]
-"23
-[p x PPS1WAY=ON ]
-"24
-[p x ZCDDIS=ON ]
-"25
-[p x PLLEN=ON ]
-"26
-[p x STVREN=ON ]
-"27
-[p x BORV=LO ]
-"28
-[p x LPBOR=ON ]
-"29
-[p x LVP=ON ]
-[; ;stdio.h: 8: typedef int ptrdiff_t;
-[; ;stdio.h: 9: typedef unsigned size_t;
-[; ;stdio.h: 10: typedef unsigned short wchar_t;
-[; ;stdarg.h: 7: typedef void * va_list[1];
-[; ;stdarg.h: 10: extern void * __va_start(void);
-[; ;stdarg.h: 13: extern void * __va_arg(void *, ...);
-[; ;stdio.h: 23: extern int errno;
-[; ;stdio.h: 54: struct __prbuf
-[; ;stdio.h: 55: {
-[; ;stdio.h: 56: char * ptr;
-[; ;stdio.h: 57: void (* func)(char);
-[; ;stdio.h: 58: };
-[; ;conio.h: 17: extern int errno;
-[; ;conio.h: 20: extern void init_uart(void);
-[; ;conio.h: 22: extern char getch(void);
-[; ;conio.h: 23: extern char getche(void);
-[; ;conio.h: 24: extern void putch(char);
-[; ;conio.h: 25: extern void ungetch(char);
-[; ;conio.h: 27: extern __bit kbhit(void);
-[; ;conio.h: 31: extern char * cgets(char *);
-[; ;conio.h: 32: extern void cputs(const char *);
-[; ;stdio.h: 99: extern int cprintf(char *, ...);
-[; ;stdio.h: 104: extern int _doprnt(struct __prbuf *, const register char *, register va_list);
-[; ;stdio.h: 194: extern char * gets(char *);
-[; ;stdio.h: 195: extern int puts(const char *);
-[; ;stdio.h: 196: extern int scanf(const char *, ...) __attribute__((unsupported("scanf() is not supported by this compiler")));
-[; ;stdio.h: 197: extern int sscanf(const char *, const char *, ...) __attribute__((unsupported("sscanf() is not supported by this compiler")));
-[; ;stdio.h: 198: extern int vprintf(const char *, va_list) __attribute__((unsupported("vprintf() is not supported by this compiler")));
-[; ;stdio.h: 199: extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
-[; ;stdio.h: 200: extern int vscanf(const char *, va_list ap) __attribute__((unsupported("vscanf() is not supported by this compiler")));
-[; ;stdio.h: 201: extern int vsscanf(const char *, const char *, va_list) __attribute__((unsupported("vsscanf() is not supported by this compiler")));
-[; ;stdio.h: 205: extern int sprintf(char *, const char *, ...);
-[; ;stdio.h: 206: extern int printf(const char *, ...);
-[; ;stdint.h: 13: typedef signed char int8_t;
-[; ;stdint.h: 20: typedef signed int int16_t;
-[; ;stdint.h: 28: typedef signed short long int int24_t;
-[; ;stdint.h: 36: typedef signed long int int32_t;
-[; ;stdint.h: 43: typedef unsigned char uint8_t;
-[; ;stdint.h: 49: typedef unsigned int uint16_t;
-[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
-[; ;stdint.h: 63: typedef unsigned long int uint32_t;
-[; ;stdint.h: 71: typedef signed char int_least8_t;
-[; ;stdint.h: 78: typedef signed int int_least16_t;
-[; ;stdint.h: 90: typedef signed short long int int_least24_t;
-[; ;stdint.h: 98: typedef signed long int int_least32_t;
-[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
-[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
-[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
-[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
-[; ;stdint.h: 137: typedef signed char int_fast8_t;
-[; ;stdint.h: 144: typedef signed int int_fast16_t;
-[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
-[; ;stdint.h: 164: typedef signed long int int_fast32_t;
-[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
-[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
-[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
-[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
-[; ;stdint.h: 200: typedef int32_t intmax_t;
-[; ;stdint.h: 205: typedef uint32_t uintmax_t;
-[; ;stdint.h: 210: typedef int16_t intptr_t;
-[; ;stdint.h: 215: typedef uint16_t uintptr_t;
-[; ;stdlib.h: 27: typedef struct {
-[; ;stdlib.h: 28: int rem;
-[; ;stdlib.h: 29: int quot;
-[; ;stdlib.h: 30: } div_t;
-[; ;stdlib.h: 31: typedef struct {
-[; ;stdlib.h: 32: unsigned rem;
-[; ;stdlib.h: 33: unsigned quot;
-[; ;stdlib.h: 34: } udiv_t;
-[; ;stdlib.h: 35: typedef struct {
-[; ;stdlib.h: 36: long quot;
-[; ;stdlib.h: 37: long rem;
-[; ;stdlib.h: 38: } ldiv_t;
-[; ;stdlib.h: 39: typedef struct {
-[; ;stdlib.h: 40: unsigned long quot;
-[; ;stdlib.h: 41: unsigned long rem;
-[; ;stdlib.h: 42: } uldiv_t;
-[; ;stdlib.h: 65: extern double atof(const char *);
-[; ;stdlib.h: 66: extern double strtod(const char *, const char **);
-[; ;stdlib.h: 67: extern int atoi(const char *);
-[; ;stdlib.h: 68: extern unsigned xtoi(const char *);
-[; ;stdlib.h: 69: extern long atol(const char *);
-[; ;stdlib.h: 70: extern long strtol(const char *, char **, int);
-[; ;stdlib.h: 72: extern int rand(void);
-[; ;stdlib.h: 73: extern void srand(unsigned int);
-[; ;stdlib.h: 74: extern void * calloc(size_t, size_t);
-[; ;stdlib.h: 75: extern div_t div(int numer, int denom);
-[; ;stdlib.h: 76: extern udiv_t udiv(unsigned numer, unsigned denom);
-[; ;stdlib.h: 77: extern ldiv_t ldiv(long numer, long denom);
-[; ;stdlib.h: 78: extern uldiv_t uldiv(unsigned long numer,unsigned long denom);
-[; ;stdlib.h: 79: extern unsigned long _lrotl(unsigned long value, unsigned int shift);
-[; ;stdlib.h: 80: extern unsigned long _lrotr(unsigned long value, unsigned int shift);
-[; ;stdlib.h: 81: extern unsigned int _rotl(unsigned int value, unsigned int shift);
-[; ;stdlib.h: 82: extern unsigned int _rotr(unsigned int value, unsigned int shift);
-[; ;stdlib.h: 87: extern void * malloc(size_t);
-[; ;stdlib.h: 88: extern void free(void *);
-[; ;stdlib.h: 89: extern void * realloc(void *, size_t);
-[; ;stdlib.h: 91: extern void abort(void);
-[; ;stdlib.h: 92: extern void exit(int);
-[; ;stdlib.h: 93: extern int atexit(void (*)(void));
-[; ;stdlib.h: 94: extern char * getenv(const char *);
-[; ;stdlib.h: 95: extern char ** environ;
-[; ;stdlib.h: 96: extern int system(char *);
-[; ;stdlib.h: 97: extern void qsort(void *, size_t, size_t, int (*)(const void *, const void *));
-[; ;stdlib.h: 98: extern void * bsearch(const void *, void *, size_t, size_t, int(*)(const void *, const void *));
-[; ;stdlib.h: 99: extern int abs(int);
-[; ;stdlib.h: 100: extern long labs(long);
-[; ;stdlib.h: 103: extern char * itoa(char * buf, int val, int base);
-[; ;stdlib.h: 104: extern char * utoa(char * buf, unsigned val, int base);
-[; ;stdlib.h: 109: extern char * ltoa(char * buf, long val, int base);
-[; ;stdlib.h: 110: extern char * ultoa(char * buf, unsigned long val, int base);
-[; ;stdlib.h: 112: extern char * ftoa(float f, int * status);
-"40
-[v _adc_buffer `uc ~T0 @X0 -> 256 `i e ]
-[; ;main.c: 40: uint8_t adc_buffer[256];
-"41
-[v _adc_buffer_write_pos `uc ~T0 @X0 1 e ]
-[i _adc_buffer_write_pos
--> -> 0 `i `uc
-]
-[; ;main.c: 41: uint8_t adc_buffer_write_pos = 0;
-"42
-[v _adc_buffer_read_pos `uc ~T0 @X0 1 e ]
-[i _adc_buffer_read_pos
--> -> 0 `i `uc
-]
-[; ;main.c: 42: uint8_t adc_buffer_read_pos = 0;
-[v F4956 `(v ~T0 @X0 1 tf ]
-"44
-[v _isr `IF4956 ~T0 @X0 1 e ]
-{
-[; ;main.c: 44: void interrupt isr(void){
-[e :U _isr ]
-[f ]
-[; ;main.c: 46: if(PIR1bits.SSP1IF){
-"46
-[e $ ! != -> . . _PIR1bits 0 3 `i -> -> -> 0 `i `Vuc `i 589  ]
-{
-"48
-[v _dummy `uc ~T0 @X0 1 a ]
-[; ;main.c: 48: uint8_t dummy = SSP1BUF;
-[e = _dummy _SSP1BUF ]
-[; ;main.c: 50: if(adc_buffer_write_pos != adc_buffer_read_pos)
-"50
-[e $ ! != -> _adc_buffer_write_pos `i -> _adc_buffer_read_pos `i 590  ]
-[; ;main.c: 51: SSP1BUF = adc_buffer[adc_buffer_read_pos++];
-"51
-[e = _SSP1BUF *U + &U _adc_buffer * -> ++ _adc_buffer_read_pos -> -> 1 `i `uc `ux -> -> # *U &U _adc_buffer `ui `ux ]
-[e $U 591  ]
-"52
-[e :U 590 ]
-[; ;main.c: 52: else
-[; ;main.c: 53: SSP1BUF = 0x7F;
-"53
-[e = _SSP1BUF -> -> 127 `i `uc ]
-[e :U 591 ]
-[; ;main.c: 55: PIR1bits.SSP1IF = 0;
-"55
-[e = . . _PIR1bits 0 3 -> -> 0 `i `uc ]
-"57
-}
-[; ;main.c: 57: }
-[e $U 592  ]
-"58
-[e :U 589 ]
-[; ;main.c: 58: else if(PIR1bits.ADIF){
-[e $ ! != -> . . _PIR1bits 0 6 `i -> -> -> 0 `i `Vuc `i 593  ]
-{
-"60
-[v _adc_result `uc ~T0 @X0 1 a ]
-[; ;main.c: 60: uint8_t adc_result = ADRESH;
-[e = _adc_result _ADRESH ]
-[; ;main.c: 63: if(adc_result >= 0x80)
-"63
-[e $ ! >= -> _adc_result `i -> 128 `i 594  ]
-[; ;main.c: 64: adc_result -= 0x80;
-"64
-[e =- _adc_result -> -> 128 `i `uc ]
-[e $U 595  ]
-"65
-[e :U 594 ]
-[; ;main.c: 65: else
-[; ;main.c: 66: adc_result += 0x80;
-"66
-[e =+ _adc_result -> -> 128 `i `uc ]
-[e :U 595 ]
-[; ;main.c: 68: if(adc_result == 0x7F)
-"68
-[e $ ! == -> _adc_result `i -> 127 `i 596  ]
-[; ;main.c: 69: adc_buffer[adc_buffer_write_pos++] = 0x7E;
-"69
-[e = *U + &U _adc_buffer * -> ++ _adc_buffer_write_pos -> -> 1 `i `uc `ux -> -> # *U &U _adc_buffer `ui `ux -> -> 126 `i `uc ]
-[e $U 597  ]
-"70
-[e :U 596 ]
-[; ;main.c: 70: else
-[; ;main.c: 71: adc_buffer[adc_buffer_write_pos++] = adc_result;
-"71
-[e = *U + &U _adc_buffer * -> ++ _adc_buffer_write_pos -> -> 1 `i `uc `ux -> -> # *U &U _adc_buffer `ui `ux _adc_result ]
-[e :U 597 ]
-[; ;main.c: 73: PIR1bits.ADIF = 0;
-"73
-[e = . . _PIR1bits 0 6 -> -> 0 `i `uc ]
-"75
-}
-[; ;main.c: 75: }
-[e $U 598  ]
-"76
-[e :U 593 ]
-[; ;main.c: 76: else if(INTCONbits.TMR0IF){
-[e $ ! != -> . . _INTCONbits 0 2 `i -> -> -> 0 `i `Vuc `i 599  ]
-{
-[; ;main.c: 78: TMR0 = TMR0 + 0x4E;
-"78
-[e = _TMR0 -> + -> _TMR0 `i -> 78 `i `uc ]
-[; ;main.c: 81: ADCON0bits.GO = 1;
-"81
-[e = . . _ADCON0bits 2 1 -> -> 1 `i `uc ]
-[; ;main.c: 83: INTCONbits.TMR0IF = 0;
-"83
-[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]
-"85
-}
-[e :U 599 ]
-"87
-[e :U 598 ]
-[e :U 592 ]
-[; ;main.c: 85: }
-[; ;main.c: 87: }
-[e :UE 588 ]
-}
-"89
-[v _main `(v ~T0 @X0 1 ef ]
-{
-[; ;main.c: 89: void main(void) {
-[e :U _main ]
-[f ]
-[; ;main.c: 92: OSCCONbits.IRCF = 0b1111;
-"92
-[e = . . _OSCCONbits 0 2 -> -> 15 `i `uc ]
-[; ;main.c: 93: OSCCONbits.SCS = 0b10;
-"93
-[e = . . _OSCCONbits 0 0 -> -> 2 `i `uc ]
-[; ;main.c: 95: while(OSCSTATbits.HFIOFS == 0);
-"95
-[e $U 601  ]
-[e :U 602 ]
-[e :U 601 ]
-[e $ == -> . . _OSCSTATbits 0 0 `i -> 0 `i 602  ]
-[e :U 603 ]
-[; ;main.c: 97: SLRCONAbits.SLRA2 = 0;
-"97
-[e = . . _SLRCONAbits 0 2 -> -> 0 `i `uc ]
-[; ;main.c: 98: TRISAbits.TRISA2 = 0;
-"98
-[e = . . _TRISAbits 0 2 -> -> 0 `i `uc ]
-[; ;main.c: 99: LATAbits.LATA2 = 0;
-"99
-[e = . . _LATAbits 0 2 -> -> 0 `i `uc ]
-[; ;main.c: 103: GIE = 0;
-"103
-[e = _GIE -> -> 0 `i `b ]
-[; ;main.c: 104: PPSLOCK = 0x55;
-"104
-[e = _PPSLOCK -> -> 85 `i `uc ]
-[; ;main.c: 105: PPSLOCK = 0xAA;
-"105
-[e = _PPSLOCK -> -> 170 `i `uc ]
-[; ;main.c: 106: PPSLOCK = 0x00;
-"106
-[e = _PPSLOCK -> -> 0 `i `uc ]
-[; ;main.c: 109: RA5PPSbits.RA5PPS = 0b10010;
-"109
-[e = . . _RA5PPSbits 0 0 -> -> 18 `i `uc ]
-[; ;main.c: 110: SSPCLKPPSbits.SSPCLKPPS = 0b10000;
-"110
-[e = . . _SSPCLKPPSbits 0 0 -> -> 16 `i `uc ]
-[; ;main.c: 111: SSPDATPPSbits.SSPDATPPS = 0b10001;
-"111
-[e = . . _SSPDATPPSbits 0 0 -> -> 17 `i `uc ]
-[; ;main.c: 114: PPSLOCK = 0x55;
-"114
-[e = _PPSLOCK -> -> 85 `i `uc ]
-[; ;main.c: 115: PPSLOCK = 0xAA;
-"115
-[e = _PPSLOCK -> -> 170 `i `uc ]
-[; ;main.c: 116: PPSLOCK = 0x01;
-"116
-[e = _PPSLOCK -> -> 1 `i `uc ]
-[; ;main.c: 119: OPA2CONbits.OPA2SP = 0;
-"119
-[e = . . _OPA2CONbits 0 4 -> -> 0 `i `uc ]
-[; ;main.c: 120: OPA2CONbits.OPA2UG = 0;
-"120
-[e = . . _OPA2CONbits 0 2 -> -> 0 `i `uc ]
-[; ;main.c: 121: OPA2CONbits.OPA2PCH = 0b00;
-"121
-[e = . . _OPA2CONbits 0 0 -> -> 0 `i `uc ]
-[; ;main.c: 123: OPA2CONbits.OPA2EN = 1;
-"123
-[e = . . _OPA2CONbits 0 5 -> -> 1 `i `uc ]
-[; ;main.c: 126: TRISAbits.TRISA4 = 1;
-"126
-[e = . . _TRISAbits 0 4 -> -> 1 `i `uc ]
-[; ;main.c: 129: PIE1bits.ADIE = 0;
-"129
-[e = . . _PIE1bits 0 6 -> -> 0 `i `uc ]
-[; ;main.c: 130: PIR1bits.ADIF = 0;
-"130
-[e = . . _PIR1bits 0 6 -> -> 0 `i `uc ]
-[; ;main.c: 132: ANSELA = 0;
-"132
-[e = _ANSELA -> -> 0 `i `uc ]
-[; ;main.c: 133: ANSELC = 0;
-"133
-[e = _ANSELC -> -> 0 `i `uc ]
-[; ;main.c: 134: ANSELAbits.ANSA4 = 1;
-"134
-[e = . . _ANSELAbits 0 4 -> -> 1 `i `uc ]
-[; ;main.c: 136: ADCON0bits.CHS = 0b00011;
-"136
-[e = . . _ADCON0bits 0 2 -> -> 3 `i `uc ]
-[; ;main.c: 138: ADCON1bits.ADFM = 0;
-"138
-[e = . . _ADCON1bits 0 3 -> -> 0 `i `uc ]
-[; ;main.c: 139: ADCON1bits.ADCS = 0b111;
-"139
-[e = . . _ADCON1bits 0 2 -> -> 7 `i `uc ]
-[; ;main.c: 140: ADCON1bits.ADPREF = 0b00;
-"140
-[e = . . _ADCON1bits 0 0 -> -> 0 `i `uc ]
-[; ;main.c: 142: ADCON2bits.TRIGSEL = 0x0000;
-"142
-[e = . . _ADCON2bits 0 1 -> -> 0 `i `uc ]
-[; ;main.c: 144: ADCON0bits.ADON = 1;
-"144
-[e = . . _ADCON0bits 0 0 -> -> 1 `i `uc ]
-[; ;main.c: 146: PIE1bits.ADIE = 0;
-"146
-[e = . . _PIE1bits 0 6 -> -> 0 `i `uc ]
-[; ;main.c: 150: TRISAbits.TRISA5 = 0;
-"150
-[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
-[; ;main.c: 151: TRISCbits.TRISC0 = 1;
-"151
-[e = . . _TRISCbits 0 0 -> -> 1 `i `uc ]
-[; ;main.c: 152: TRISCbits.TRISC1 = 1;
-"152
-[e = . . _TRISCbits 0 1 -> -> 1 `i `uc ]
-[; ;main.c: 155: PIR1bits.SSP1IF = 0;
-"155
-[e = . . _PIR1bits 0 3 -> -> 0 `i `uc ]
-[; ;main.c: 156: PIE1bits.SSP1IE = 0;
-"156
-[e = . . _PIE1bits 0 3 -> -> 0 `i `uc ]
-[; ;main.c: 158: SSP1STATbits.CKE = 0;
-"158
-[e = . . _SSP1STATbits 0 6 -> -> 0 `i `uc ]
-[; ;main.c: 159: SSP1STATbits.SMP = 0;
-"159
-[e = . . _SSP1STATbits 0 7 -> -> 0 `i `uc ]
-[; ;main.c: 161: SSP1CON1bits.CKP = 0;
-"161
-[e = . . _SSP1CON1bits 0 1 -> -> 0 `i `uc ]
-[; ;main.c: 162: SSP1CON1bits.SSPM = 0b0101;
-"162
-[e = . . _SSP1CON1bits 0 0 -> -> 5 `i `uc ]
-[; ;main.c: 164: SSP1CON3bits.BOEN = 1;
-"164
-[e = . . _SSP1CON3bits 0 4 -> -> 1 `i `uc ]
-[; ;main.c: 168: SSP1CON1bits.SSPEN = 1;
-"168
-[e = . . _SSP1CON1bits 0 2 -> -> 1 `i `uc ]
-[; ;main.c: 170: PIE1bits.SSP1IE = 1;
-"170
-[e = . . _PIE1bits 0 3 -> -> 1 `i `uc ]
-[; ;main.c: 175: INTCONbits.TMR0IE = 0;
-"175
-[e = . . _INTCONbits 0 5 -> -> 0 `i `uc ]
-[; ;main.c: 176: INTCONbits.TMR0IF = 0;
-"176
-[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]
-[; ;main.c: 178: OPTION_REGbits.T0CS = 0;
-"178
-[e = . . _OPTION_REGbits 1 5 -> -> 0 `i `uc ]
-[; ;main.c: 179: OPTION_REGbits.PSA = 0;
-"179
-[e = . . _OPTION_REGbits 0 1 -> -> 0 `i `uc ]
-[; ;main.c: 180: OPTION_REGbits.PS = 0b000;
-"180
-[e = . . _OPTION_REGbits 0 0 -> -> 0 `i `uc ]
-[; ;main.c: 182: INTCONbits.TMR0IE = 1;
-"182
-[e = . . _INTCONbits 0 5 -> -> 1 `i `uc ]
-[; ;main.c: 185: INTCONbits.PEIE = 1;
-"185
-[e = . . _INTCONbits 0 6 -> -> 1 `i `uc ]
-[; ;main.c: 186: INTCONbits.GIE = 1;
-"186
-[e = . . _INTCONbits 0 7 -> -> 1 `i `uc ]
-[; ;main.c: 189: SSP1BUF = 'A';
-"189
-[e = _SSP1BUF -> -> 65 `ui `uc ]
-[; ;main.c: 191: while(1){}
-"191
-[e :U 605 ]
-{
-}
-[e :U 604 ]
-[e $U 605  ]
-[e :U 606 ]
-[; ;main.c: 193: }
-"193
-[e :UE 600 ]
-}
 

--- a/src/BLE_TNC_ADC_DAC.X/build/default/production/main.p1.d
+++ /dev/null
@@ -1,3 +1,1 @@
- build/default/production/main.d  \
- build/default/production/main.p1:  \
- main.c 
+

--- a/src/BLE_TNC_ADC_DAC.X/build/default/production/main.pre
+++ /dev/null
@@ -1,6530 +1,1 @@
 
-# 1 "main.c"
-
-# 21 "/opt/microchip/xc8/v1.32/include/htc.h"
-extern const char __xc8_OPTIM_SPEED;
-
-#pragma intrinsic(__builtin_software_breakpoint)
-extern void __builtin_software_breakpoint(void);
-
-# 47 "/opt/microchip/xc8/v1.32/include/pic16lf1704.h"
-extern volatile unsigned char INDF0 @ 0x000;
-
-asm("INDF0 equ 00h");
-
-
-typedef union {
-struct {
-unsigned INDF0 :8;
-};
-} INDF0bits_t;
-extern volatile INDF0bits_t INDF0bits @ 0x000;
-
-# 66
-extern volatile unsigned char INDF1 @ 0x001;
-
-asm("INDF1 equ 01h");
-
-
-typedef union {
-struct {
-unsigned INDF1 :8;
-};
-} INDF1bits_t;
-extern volatile INDF1bits_t INDF1bits @ 0x001;
-
-# 85
-extern volatile unsigned char PCL @ 0x002;
-
-asm("PCL equ 02h");
-
-
-typedef union {
-struct {
-unsigned PCL :8;
-};
-} PCLbits_t;
-extern volatile PCLbits_t PCLbits @ 0x002;
-
-# 104
-extern volatile unsigned char STATUS @ 0x003;
-
-asm("STATUS equ 03h");
-
-
-typedef union {
-struct {
-unsigned C :1;
-unsigned DC :1;
-unsigned Z :1;
-unsigned nPD :1;
-unsigned nTO :1;
-};
-struct {
-unsigned CARRY :1;
-};
-struct {
-unsigned :2;
-unsigned ZERO :1;
-};
-} STATUSbits_t;
-extern volatile STATUSbits_t STATUSbits @ 0x003;
-
-# 164
-extern volatile unsigned short FSR0 @ 0x004;
-
-
-extern volatile unsigned char FSR0L @ 0x004;
-
-asm("FSR0L equ 04h");
-
-
-typedef union {
-struct {
-unsigned FSR0L :8;
-};
-} FSR0Lbits_t;
-extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
-
-# 186
-extern volatile unsigned char FSR0H @ 0x005;
-
-asm("FSR0H equ 05h");
-
-
-typedef union {
-struct {
-unsigned FSR0H :8;
-};
-} FSR0Hbits_t;
-extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
-
-# 205
-extern volatile unsigned short FSR1 @ 0x006;
-
-
-extern volatile unsigned char FSR1L @ 0x006;
-
-asm("FSR1L equ 06h");
-
-
-typedef union {
-struct {
-unsigned FSR1L :8;
-};
-} FSR1Lbits_t;
-extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
-
-# 227
-extern volatile unsigned char FSR1H @ 0x007;
-
-asm("FSR1H equ 07h");
-
-
-typedef union {
-struct {
-unsigned FSR1H :8;
-};
-} FSR1Hbits_t;
-extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
-
-# 246
-extern volatile unsigned char BSR @ 0x008;
-
-asm("BSR equ 08h");
-
-
-typedef union {
-struct {
-unsigned BSR :5;
-};
-struct {
-unsigned BSR0 :1;
-unsigned BSR1 :1;
-unsigned BSR2 :1;
-unsigned BSR3 :1;
-unsigned BSR4 :1;
-};
-} BSRbits_t;
-extern volatile BSRbits_t BSRbits @ 0x008;
-
-# 297
-extern volatile unsigned char WREG @ 0x009;
-
-asm("WREG equ 09h");
-
-
-typedef union {
-struct {
-unsigned WREG0 :8;
-};
-} WREGbits_t;
-extern volatile WREGbits_t WREGbits @ 0x009;
-
-# 316
-extern volatile unsigned char PCLATH @ 0x00A;
-
-asm("PCLATH equ 0Ah");
-
-
-typedef union {
-struct {
-unsigned PCLATH :7;
-};
-} PCLATHbits_t;
-extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
-
-# 335
-extern volatile unsigned char INTCON @ 0x00B;
-
-asm("INTCON equ 0Bh");
-
-
-typedef union {
-struct {
-unsigned IOCIF :1;
-unsigned INTF :1;
-unsigned TMR0IF :1;
-unsigned IOCIE :1;
-unsigned INTE :1;
-unsigned TMR0IE :1;
-unsigned PEIE :1;
-unsigned GIE :1;
-};
-struct {
-unsigned :2;
-unsigned T0IF :1;
-unsigned :2;
-unsigned T0IE :1;
-};
-} INTCONbits_t;
-extern volatile INTCONbits_t INTCONbits @ 0x00B;
-
-# 412
-extern volatile unsigned char PORTA @ 0x00C;
-
-asm("PORTA equ 0Ch");
-
-
-typedef union {
-struct {
-unsigned RA0 :1;
-unsigned RA1 :1;
-unsigned RA2 :1;
-unsigned RA3 :1;
-unsigned RA4 :1;
-unsigned RA5 :1;
-};
-} PORTAbits_t;
-extern volatile PORTAbits_t PORTAbits @ 0x00C;
-
-# 461
-extern volatile unsigned char PORTC @ 0x00E;
-
-asm("PORTC equ 0Eh");
-
-
-typedef union {
-struct {
-unsigned RC0 :1;
-unsigned RC1 :1;
-unsigned RC2 :1;
-unsigned RC3 :1;
-unsigned RC4 :1;
-unsigned RC5 :1;
-};
-} PORTCbits_t;
-extern volatile PORTCbits_t PORTCbits @ 0x00E;
-
-# 510
-extern volatile unsigned char PIR1 @ 0x011;
-
-asm("PIR1 equ 011h");
-
-
-typedef union {
-struct {
-unsigned TMR1IF :1;
-unsigned TMR2IF :1;
-unsigned CCP1IF :1;
-unsigned SSP1IF :1;
-unsigned TXIF :1;
-unsigned RCIF :1;
-unsigned ADIF :1;
-unsigned TMR1GIF :1;
-};
-struct {
-unsigned :2;
-unsigned CCPIF :1;
-};
-} PIR1bits_t;
-extern volatile PIR1bits_t PIR1bits @ 0x011;
-
-# 580
-extern volatile unsigned char PIR2 @ 0x012;
-
-asm("PIR2 equ 012h");
-
-
-typedef union {
-struct {
-unsigned CCP2IF :1;
-unsigned TMR4IF :1;
-unsigned TMR6IF :1;
-unsigned BCL1IF :1;
-unsigned :1;
-unsigned C1IF :1;
-unsigned C2IF :1;
-unsigned OSFIF :1;
-};
-} PIR2bits_t;
-extern volatile PIR2bits_t PIR2bits @ 0x012;
-
-# 636
-extern volatile unsigned char PIR3 @ 0x013;
-
-asm("PIR3 equ 013h");
-
-
-typedef union {
-struct {
-unsigned CLC1IF :1;
-unsigned CLC2IF :1;
-unsigned CLC3IF :1;
-unsigned :1;
-unsigned ZCDIF :1;
-unsigned COGIF :1;
-};
-} PIR3bits_t;
-extern volatile PIR3bits_t PIR3bits @ 0x013;
-
-# 680
-extern volatile unsigned char TMR0 @ 0x015;
-
-asm("TMR0 equ 015h");
-
-
-typedef union {
-struct {
-unsigned TMR0 :8;
-};
-} TMR0bits_t;
-extern volatile TMR0bits_t TMR0bits @ 0x015;
-
-# 699
-extern volatile unsigned short TMR1 @ 0x016;
-
-asm("TMR1 equ 016h");
-
-
-
-extern volatile unsigned char TMR1L @ 0x016;
-
-asm("TMR1L equ 016h");
-
-
-typedef union {
-struct {
-unsigned TMR1L :8;
-};
-} TMR1Lbits_t;
-extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
-
-# 724
-extern volatile unsigned char TMR1H @ 0x017;
-
-asm("TMR1H equ 017h");
-
-
-typedef union {
-struct {
-unsigned TMR1H :8;
-};
-} TMR1Hbits_t;
-extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
-
-# 743
-extern volatile unsigned char T1CON @ 0x018;
-
-asm("T1CON equ 018h");
-
-
-typedef union {
-struct {
-unsigned TMR1ON :1;
-unsigned :1;
-unsigned nT1SYNC :1;
-unsigned T1OSCEN :1;
-unsigned T1CKPS :2;
-unsigned TMR1CS :2;
-};
-struct {
-unsigned :4;
-unsigned T1CKPS0 :1;
-unsigned T1CKPS1 :1;
-unsigned TMR1CS0 :1;
-unsigned TMR1CS1 :1;
-};
-} T1CONbits_t;
-extern volatile T1CONbits_t T1CONbits @ 0x018;
-
-# 814
-extern volatile unsigned char T1GCON @ 0x019;
-
-asm("T1GCON equ 019h");
-
-
-typedef union {
-struct {
-unsigned T1GSS :2;
-unsigned T1GVAL :1;
-unsigned T1GGO_nDONE :1;
-unsigned T1GSPM :1;
-unsigned T1GTM :1;
-unsigned T1GPOL :1;
-unsigned TMR1GE :1;
-};
-struct {
-unsigned T1GSS0 :1;
-unsigned T1GSS1 :1;
-};
-} T1GCONbits_t;
-extern volatile T1GCONbits_t T1GCONbits @ 0x019;
-
-# 883
-extern volatile unsigned char TMR2 @ 0x01A;
-
-asm("TMR2 equ 01Ah");
-
-
-typedef union {
-struct {
-unsigned TMR2 :8;
-};
-} TMR2bits_t;
-extern volatile TMR2bits_t TMR2bits @ 0x01A;
-
-# 902
-extern volatile unsigned char PR2 @ 0x01B;
-
-asm("PR2 equ 01Bh");
-
-
-typedef union {
-struct {
-unsigned PR2 :8;
-};
-} PR2bits_t;
-extern volatile PR2bits_t PR2bits @ 0x01B;
-
-# 921
-extern volatile unsigned char T2CON @ 0x01C;
-
-asm("T2CON equ 01Ch");
-
-
-typedef union {
-struct {
-unsigned T2CKPS :2;
-unsigned TMR2ON :1;
-unsigned T2OUTPS :4;
-};
-struct {
-unsigned T2CKPS0 :1;
-unsigned T2CKPS1 :1;
-unsigned :1;
-unsigned T2OUTPS0 :1;
-unsigned T2OUTPS1 :1;
-unsigned T2OUTPS2 :1;
-unsigned T2OUTPS3 :1;
-};
-} T2CONbits_t;
-extern volatile T2CONbits_t T2CONbits @ 0x01C;
-
-# 991
-extern volatile unsigned char TRISA @ 0x08C;
-
-asm("TRISA equ 08Ch");
-
-
-typedef union {
-struct {
-unsigned TRISA0 :1;
-unsigned TRISA1 :1;
-unsigned TRISA2 :1;
-unsigned :1;
-unsigned TRISA4 :1;
-unsigned TRISA5 :1;
-};
-} TRISAbits_t;
-extern volatile TRISAbits_t TRISAbits @ 0x08C;
-
-# 1035
-extern volatile unsigned char TRISC @ 0x08E;
-
-asm("TRISC equ 08Eh");
-
-
-typedef union {
-struct {
-unsigned TRISC0 :1;
-unsigned TRISC1 :1;
-unsigned TRISC2 :1;
-unsigned TRISC3 :1;
-unsigned TRISC4 :1;
-unsigned TRISC5 :1;
-};
-} TRISCbits_t;
-extern volatile TRISCbits_t TRISCbits @ 0x08E;
-
-# 1084
-extern volatile unsigned char PIE1 @ 0x091;
-
-asm("PIE1 equ 091h");
-
-
-typedef union {
-struct {
-unsigned TMR1IE :1;
-unsigned TMR2IE :1;
-unsigned CCP1IE :1;
-unsigned SSP1IE :1;
-unsigned TXIE :1;
-unsigned RCIE :1;
-unsigned ADIE :1;
-unsigned TMR1GIE :1;
-};
-struct {
-unsigned :2;
-unsigned CCPIE :1;
-};
-} PIE1bits_t;
-extern volatile PIE1bits_t PIE1bits @ 0x091;
-
-# 1154
-extern volatile unsigned char PIE2 @ 0x092;
-
-asm("PIE2 equ 092h");
-
-
-typedef union {
-struct {
-unsigned CCP2IE :1;
-unsigned TMR4IE :1;
-unsigned TMR6IE :1;
-unsigned BCL1IE :1;
-unsigned :1;
-unsigned C1IE :1;
-unsigned C2IE :1;
-unsigned OSFIE :1;
-};
-} PIE2bits_t;
-extern volatile PIE2bits_t PIE2bits @ 0x092;
-
-# 1210
-extern volatile unsigned char PIE3 @ 0x093;
-
-asm("PIE3 equ 093h");
-
-
-typedef union {
-struct {
-unsigned CLC1IE :1;
-unsigned CLC2IE :1;
-unsigned CLC3IE :1;
-unsigned :1;
-unsigned ZCDIE :1;
-unsigned COGIE :1;
-};
-} PIE3bits_t;
-extern volatile PIE3bits_t PIE3bits @ 0x093;
-
-# 1254
-extern volatile unsigned char OPTION_REG @ 0x095;
-
-asm("OPTION_REG equ 095h");
-
-
-typedef union {
-struct {
-unsigned PS :3;
-unsigned PSA :1;
-unsigned TMR0SE :1;
-unsigned TMR0CS :1;
-unsigned INTEDG :1;
-unsigned nWPUEN :1;
-};
-struct {
-unsigned PS0 :1;
-unsigned PS1 :1;
-unsigned PS2 :1;
-unsigned :1;
-unsigned T0SE :1;
-unsigned T0CS :1;
-};
-} OPTION_REGbits_t;
-extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
-
-# 1336
-extern volatile unsigned char PCON @ 0x096;
-
-asm("PCON equ 096h");
-
-
-typedef union {
-struct {
-unsigned nBOR :1;
-unsigned nPOR :1;
-unsigned nRI :1;
-unsigned nRMCLR :1;
-unsigned nRWDT :1;
-unsigned :1;
-unsigned STKUNF :1;
-unsigned STKOVF :1;
-};
-} PCONbits_t;
-extern volatile PCONbits_t PCONbits @ 0x096;
-
-# 1392
-extern volatile unsigned char WDTCON @ 0x097;
-
-asm("WDTCON equ 097h");
-
-
-typedef union {
-struct {
-unsigned SWDTEN :1;
-unsigned WDTPS :5;
-};
-struct {
-unsigned :1;
-unsigned WDTPS0 :1;
-unsigned WDTPS1 :1;
-unsigned WDTPS2 :1;
-unsigned WDTPS3 :1;
-unsigned WDTPS4 :1;
-};
-} WDTCONbits_t;
-extern volatile WDTCONbits_t WDTCONbits @ 0x097;
-
-# 1450
-extern volatile unsigned char OSCTUNE @ 0x098;
-
-asm("OSCTUNE equ 098h");
-
-
-typedef union {
-struct {
-unsigned TUN :6;
-};
-struct {
-unsigned TUN0 :1;
-unsigned TUN1 :1;
-unsigned TUN2 :1;
-unsigned TUN3 :1;
-unsigned TUN4 :1;
-unsigned TUN5 :1;
-};
-} OSCTUNEbits_t;
-extern volatile OSCTUNEbits_t OSCTUNEbits @ 0x098;
-
-# 1507
-extern volatile unsigned char OSCCON @ 0x099;
-
-asm("OSCCON equ 099h");
-
-
-typedef union {
-struct {
-unsigned SCS :2;
-unsigned :1;
-unsigned IRCF :4;
-unsigned SPLLEN :1;
-};
-struct {
-unsigned SCS0 :1;
-unsigned SCS1 :1;
-unsigned :1;
-unsigned IRCF0 :1;
-unsigned IRCF1 :1;
-unsigned IRCF2 :1;
-unsigned IRCF3 :1;
-};
-} OSCCONbits_t;
-extern volatile OSCCONbits_t OSCCONbits @ 0x099;
-
-# 1578
-extern volatile unsigned char OSCSTAT @ 0x09A;
-
-asm("OSCSTAT equ 09Ah");
-
-
-typedef union {
-struct {
-unsigned HFIOFS :1;
-unsigned LFIOFR :1;
-unsigned MFIOFR :1;
-unsigned HFIOFL :1;
-unsigned HFIOFR :1;
-unsigned OSTS :1;
-unsigned PLLR :1;
-unsigned SOSCR :1;
-};
-} OSCSTATbits_t;
-extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
-
-# 1639
-extern volatile unsigned short ADRES @ 0x09B;
-
-asm("ADRES equ 09Bh");
-
-
-
-extern volatile unsigned char ADRESL @ 0x09B;
-
-asm("ADRESL equ 09Bh");
-
-
-typedef union {
-struct {
-unsigned ADRESL :8;
-};
-} ADRESLbits_t;
-extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
-
-# 1664
-extern volatile unsigned char ADRESH @ 0x09C;
-
-asm("ADRESH equ 09Ch");
-
-
-typedef union {
-struct {
-unsigned ADRESH :8;
-};
-} ADRESHbits_t;
-extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
-
-# 1683
-extern volatile unsigned char ADCON0 @ 0x09D;
-
-asm("ADCON0 equ 09Dh");
-
-
-typedef union {
-struct {
-unsigned ADON :1;
-unsigned GO_nDONE :1;
-unsigned CHS :5;
-};
-struct {
-unsigned :1;
-unsigned ADGO :1;
-unsigned CHS0 :1;
-unsigned CHS1 :1;
-unsigned CHS2 :1;
-unsigned CHS3 :1;
-unsigned CHS4 :1;
-};
-struct {
-unsigned :1;
-unsigned GO :1;
-};
-} ADCON0bits_t;
-extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
-
-# 1762
-extern volatile unsigned char ADCON1 @ 0x09E;
-
-asm("ADCON1 equ 09Eh");
-
-
-typedef union {
-struct {
-unsigned ADPREF :2;
-unsigned :2;
-unsigned ADCS :3;
-unsigned ADFM :1;
-};
-struct {
-unsigned ADPREF0 :1;
-unsigned ADPREF1 :1;
-};
-} ADCON1bits_t;
-extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
-
-# 1808
-extern volatile unsigned char ADCON2 @ 0x09F;
-
-asm("ADCON2 equ 09Fh");
-
-
-typedef union {
-struct {
-unsigned :4;
-unsigned TRIGSEL :4;
-};
-struct {
-unsigned :4;
-unsigned TRIGSEL0 :1;
-unsigned TRIGSEL1 :1;
-unsigned TRIGSEL2 :1;
-unsigned TRIGSEL3 :1;
-};
-} ADCON2bits_t;
-extern volatile ADCON2bits_t ADCON2bits @ 0x09F;
-
-# 1855
-extern volatile unsigned char LATA @ 0x10C;
-
-asm("LATA equ 010Ch");
-
-
-typedef union {
-struct {
-unsigned LATA0 :1;
-unsigned LATA1 :1;
-unsigned LATA2 :1;
-unsigned :1;
-unsigned LATA4 :1;
-unsigned LATA5 :1;
-};
-} LATAbits_t;
-extern volatile LATAbits_t LATAbits @ 0x10C;
-
-# 1899
-extern volatile unsigned char LATC @ 0x10E;
-
-asm("LATC equ 010Eh");
-
-
-typedef union {
-struct {
-unsigned LATC0 :1;
-unsigned LATC1 :1;
-unsigned LATC2 :1;
-unsigned LATC3 :1;
-unsigned LATC4 :1;
-unsigned LATC5 :1;
-};
-} LATCbits_t;
-extern volatile LATCbits_t LATCbits @ 0x10E;
-
-# 1948
-extern volatile unsigned char CM1CON0 @ 0x111;
-
-asm("CM1CON0 equ 0111h");
-
-
-typedef union {
-struct {
-unsigned C1SYNC :1;
-unsigned C1HYS :1;
-unsigned C1SP :1;
-unsigned C1ZLF :1;
-unsigned C1POL :1;
-unsigned :1;
-unsigned C1OUT :1;
-unsigned C1ON :1;
-};
-} CM1CON0bits_t;
-extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
-
-# 2004
-extern volatile unsigned char CM1CON1 @ 0x112;
-
-asm("CM1CON1 equ 0112h");
-
-
-typedef union {
-struct {
-unsigned C1NCH :3;
-unsigned C1PCH :3;
-unsigned C1INTN :1;
-unsigned C1INTP :1;
-};
-struct {
-unsigned C1NCH0 :1;
-unsigned C1NCH1 :1;
-unsigned C1NCH2 :1;
-unsigned C1PCH0 :1;
-unsigned C1PCH1 :1;
-unsigned C1PCH2 :1;
-};
-} CM1CON1bits_t;
-extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
-
-# 2079
-extern volatile unsigned char CM2CON0 @ 0x113;
-
-asm("CM2CON0 equ 0113h");
-
-
-typedef union {
-struct {
-unsigned C2SYNC :1;
-unsigned C2HYS :1;
-unsigned C2SP :1;
-unsigned C2ZLF :1;
-unsigned C2POL :1;
-unsigned :1;
-unsigned C2OUT :1;
-unsigned C2ON :1;
-};
-} CM2CON0bits_t;
-extern volatile CM2CON0bits_t CM2CON0bits @ 0x113;
-
-# 2135
-extern volatile unsigned char CM2CON1 @ 0x114;
-
-asm("CM2CON1 equ 0114h");
-
-
-typedef union {
-struct {
-unsigned C2NCH :3;
-unsigned C2PCH :3;
-unsigned C2INTN :1;
-unsigned C2INTP :1;
-};
-struct {
-unsigned C2NCH0 :1;
-unsigned C2NCH1 :1;
-unsigned C2NCH2 :1;
-unsigned C2PCH0 :1;
-unsigned C2PCH1 :1;
-unsigned C2PCH2 :1;
-};
-} CM2CON1bits_t;
-extern volatile CM2CON1bits_t CM2CON1bits @ 0x114;
-
-# 2210
-extern volatile unsigned char CMOUT @ 0x115;
-
-asm("CMOUT equ 0115h");
-
-
-typedef union {
-struct {
-unsigned MC1OUT :1;
-unsigned MC2OUT :1;
-};
-} CMOUTbits_t;
-extern volatile CMOUTbits_t CMOUTbits @ 0x115;
-
-# 2235
-extern volatile unsigned char BORCON @ 0x116;
-
-asm("BORCON equ 0116h");
-
-
-typedef union {
-struct {
-unsigned BORRDY :1;
-unsigned :5;
-unsigned BORFS :1;
-unsigned SBOREN :1;
-};
-} BORCONbits_t;
-extern volatile BORCONbits_t BORCONbits @ 0x116;
-
-# 2267
-extern volatile unsigned char FVRCON @ 0x117;
-
-asm("FVRCON equ 0117h");
-
-
-typedef union {
-struct {
-unsigned ADFVR :2;
-unsigned CDAFVR :2;
-unsigned TSRNG :1;
-unsigned TSEN :1;
-unsigned FVRRDY :1;
-unsigned FVREN :1;
-};
-struct {
-unsigned ADFVR0 :1;
-unsigned ADFVR1 :1;
-unsigned CDAFVR0 :1;
-unsigned CDAFVR1 :1;
-};
-} FVRCONbits_t;
-extern volatile FVRCONbits_t FVRCONbits @ 0x117;
-
-# 2342
-extern volatile unsigned char DAC1CON0 @ 0x118;
-
-asm("DAC1CON0 equ 0118h");
-
-
-typedef union {
-struct {
-unsigned DAC1NSS :1;
-unsigned :1;
-unsigned DAC1PSS :2;
-unsigned DAC1OE2 :1;
-unsigned DAC1OE1 :1;
-unsigned :1;
-unsigned DAC1EN :1;
-};
-struct {
-unsigned :2;
-unsigned DAC1PSS0 :1;
-unsigned DAC1PSS1 :1;
-};
-struct {
-unsigned DACNSS :1;
-unsigned :1;
-unsigned DACPSS :2;
-unsigned DACOE0 :1;
-unsigned DACOE1 :1;
-unsigned :1;
-unsigned DACEN :1;
-};
-struct {
-unsigned :2;
-unsigned DACPSS0 :1;
-unsigned DACPSS1 :1;
-};
-} DAC1CON0bits_t;
-extern volatile DAC1CON0bits_t DAC1CON0bits @ 0x118;
-
-# 2451
-extern volatile unsigned char DAC1CON1 @ 0x119;
-
-asm("DAC1CON1 equ 0119h");
-
-
-typedef union {
-struct {
-unsigned DAC1R :8;
-};
-struct {
-unsigned DAC1R0 :1;
-unsigned DAC1R1 :1;
-unsigned DAC1R2 :1;
-unsigned DAC1R3 :1;
-unsigned DAC1R4 :1;
-unsigned DAC1R5 :1;
-unsigned DAC1R6 :1;
-unsigned DAC1R7 :1;
-};
-struct {
-unsigned DACR0 :1;
-unsigned DACR1 :1;
-unsigned DACR2 :1;
-unsigned DACR3 :1;
-unsigned DACR4 :1;
-unsigned DACR5 :1;
-unsigned DACR6 :1;
-unsigned DACR7 :1;
-};
-} DAC1CON1bits_t;
-extern volatile DAC1CON1bits_t DAC1CON1bits @ 0x119;
-
-# 2570
-extern volatile unsigned char ZCD1CON @ 0x11C;
-
-asm("ZCD1CON equ 011Ch");
-
-
-typedef union {
-struct {
-unsigned ZCD1INTN :1;
-unsigned ZCD1INTP :1;
-unsigned :2;
-unsigned ZCD1POL :1;
-unsigned ZCD1OUT :1;
-unsigned :1;
-unsigned ZCD1EN :1;
-};
-} ZCD1CONbits_t;
-extern volatile ZCD1CONbits_t ZCD1CONbits @ 0x11C;
-
-# 2615
-extern volatile unsigned char ANSELA @ 0x18C;
-
-asm("ANSELA equ 018Ch");
-
-
-typedef union {
-struct {
-unsigned ANSA0 :1;
-unsigned ANSA1 :1;
-unsigned ANSA2 :1;
-unsigned :1;
-unsigned ANSA4 :1;
-unsigned ANS5 :1;
-};
-} ANSELAbits_t;
-extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
-
-# 2659
-extern volatile unsigned char ANSELC @ 0x18E;
-
-asm("ANSELC equ 018Eh");
-
-
-typedef union {
-struct {
-unsigned ANSC0 :1;
-unsigned ANSC1 :1;
-unsigned ANSC2 :1;
-unsigned ANSC3 :1;
-unsigned ANSC4 :1;
-unsigned ANSC5 :1;
-};
-} ANSELCbits_t;
-extern volatile ANSELCbits_t ANSELCbits @ 0x18E;
-
-# 2708
-extern volatile unsigned short PMADR @ 0x191;
-
-asm("PMADR equ 0191h");
-
-
-
-extern volatile unsigned char PMADRL @ 0x191;
-
-asm("PMADRL equ 0191h");
-
-
-typedef union {
-struct {
-unsigned PMADRL :8;
-};
-} PMADRLbits_t;
-extern volatile PMADRLbits_t PMADRLbits @ 0x191;
-
-# 2733
-extern volatile unsigned char PMADRH @ 0x192;
-
-asm("PMADRH equ 0192h");
-
-
-typedef union {
-struct {
-unsigned PMADRH :7;
-};
-} PMADRHbits_t;
-extern volatile PMADRHbits_t PMADRHbits @ 0x192;
-
-# 2752
-extern volatile unsigned short PMDAT @ 0x193;
-
-asm("PMDAT equ 0193h");
-
-
-
-extern volatile unsigned char PMDATL @ 0x193;
-
-asm("PMDATL equ 0193h");
-
-
-typedef union {
-struct {
-unsigned PMDATL :8;
-};
-} PMDATLbits_t;
-extern volatile PMDATLbits_t PMDATLbits @ 0x193;
-
-# 2777
-extern volatile unsigned char PMDATH @ 0x194;
-
-asm("PMDATH equ 0194h");
-
-
-typedef union {
-struct {
-unsigned PMDATH :6;
-};
-} PMDATHbits_t;
-extern volatile PMDATHbits_t PMDATHbits @ 0x194;
-
-# 2796
-extern volatile unsigned char PMCON1 @ 0x195;
-
-asm("PMCON1 equ 0195h");
-
-
-typedef union {
-struct {
-unsigned RD :1;
-unsigned WR :1;
-unsigned WREN :1;
-unsigned WRERR :1;
-unsigned FREE :1;
-unsigned LWLO :1;
-unsigned CFGS :1;
-};
-} PMCON1bits_t;
-extern volatile PMCON1bits_t PMCON1bits @ 0x195;
-
-# 2851
-extern volatile unsigned char PMCON2 @ 0x196;
-
-asm("PMCON2 equ 0196h");
-
-
-typedef union {
-struct {
-unsigned PMCON2 :8;
-};
-} PMCON2bits_t;
-extern volatile PMCON2bits_t PMCON2bits @ 0x196;
-
-# 2870
-extern volatile unsigned char RC1REG @ 0x199;
-
-asm("RC1REG equ 0199h");
-
-
-extern volatile unsigned char RCREG @ 0x199;
-
-asm("RCREG equ 0199h");
-
-extern volatile unsigned char RCREG1 @ 0x199;
-
-asm("RCREG1 equ 0199h");
-
-
-typedef union {
-struct {
-unsigned RC1REG :8;
-};
-} RC1REGbits_t;
-extern volatile RC1REGbits_t RC1REGbits @ 0x199;
-
-# 2897
-typedef union {
-struct {
-unsigned RC1REG :8;
-};
-} RCREGbits_t;
-extern volatile RCREGbits_t RCREGbits @ 0x199;
-
-# 2909
-typedef union {
-struct {
-unsigned RC1REG :8;
-};
-} RCREG1bits_t;
-extern volatile RCREG1bits_t RCREG1bits @ 0x199;
-
-# 2923
-extern volatile unsigned char TX1REG @ 0x19A;
-
-asm("TX1REG equ 019Ah");
-
-
-extern volatile unsigned char TXREG1 @ 0x19A;
-
-asm("TXREG1 equ 019Ah");
-
-extern volatile unsigned char TXREG @ 0x19A;
-
-asm("TXREG equ 019Ah");
-
-
-typedef union {
-struct {
-unsigned TX1REG :8;
-};
-} TX1REGbits_t;
-extern volatile TX1REGbits_t TX1REGbits @ 0x19A;
-
-# 2950
-typedef union {
-struct {
-unsigned TX1REG :8;
-};
-} TXREG1bits_t;
-extern volatile TXREG1bits_t TXREG1bits @ 0x19A;
-
-# 2962
-typedef union {
-struct {
-unsigned TX1REG :8;
-};
-} TXREGbits_t;
-extern volatile TXREGbits_t TXREGbits @ 0x19A;
-
-# 2976
-extern volatile unsigned short SP1BRG @ 0x19B;
-
-asm("SP1BRG equ 019Bh");
-
-
-
-extern volatile unsigned char SP1BRGL @ 0x19B;
-
-asm("SP1BRGL equ 019Bh");
-
-
-extern volatile unsigned char SPBRG @ 0x19B;
-
-asm("SPBRG equ 019Bh");
-
-extern volatile unsigned char SPBRG1 @ 0x19B;
-
-asm("SPBRG1 equ 019Bh");
-
-extern volatile unsigned char SPBRGL @ 0x19B;
-
-asm("SPBRGL equ 019Bh");
-
-
-typedef union {
-struct {
-unsigned SP1BRGL :8;
-};
-} SP1BRGLbits_t;
-extern volatile SP1BRGLbits_t SP1BRGLbits @ 0x19B;
-
-# 3013
-typedef union {
-struct {
-unsigned SP1BRGL :8;
-};
-} SPBRGbits_t;
-extern volatile SPBRGbits_t SPBRGbits @ 0x19B;
-
-# 3025
-typedef union {
-struct {
-unsigned SP1BRGL :8;
-};
-} SPBRG1bits_t;
-extern volatile SPBRG1bits_t SPBRG1bits @ 0x19B;
-
-# 3037
-typedef union {
-struct {
-unsigned SP1BRGL :8;
-};
-} SPBRGLbits_t;
-extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
-
-# 3051
-extern volatile unsigned char SP1BRGH @ 0x19C;
-
-asm("SP1BRGH equ 019Ch");
-
-
-extern volatile unsigned char SPBRGH @ 0x19C;
-
-asm("SPBRGH equ 019Ch");
-
-extern volatile unsigned char SPBRGH1 @ 0x19C;
-
-asm("SPBRGH1 equ 019Ch");
-
-
-typedef union {
-struct {
-unsigned SP1BRGH :8;
-};
-} SP1BRGHbits_t;
-extern volatile SP1BRGHbits_t SP1BRGHbits @ 0x19C;
-
-# 3078
-typedef union {
-struct {
-unsigned SP1BRGH :8;
-};
-} SPBRGHbits_t;
-extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
-
-# 3090
-typedef union {
-struct {
-unsigned SP1BRGH :8;
-};
-} SPBRGH1bits_t;
-extern volatile SPBRGH1bits_t SPBRGH1bits @ 0x19C;
-
-# 3104
-extern volatile unsigned char RC1STA @ 0x19D;
-
-asm("RC1STA equ 019Dh");
-
-
-extern volatile unsigned char RCSTA1 @ 0x19D;
-
-asm("RCSTA1 equ 019Dh");
-
-extern volatile unsigned char RCSTA @ 0x19D;
-
-asm("RCSTA equ 019Dh");
-
-
-typedef union {
-struct {
-unsigned RX9D :1;
-unsigned OERR :1;
-unsigned FERR :1;
-unsigned ADDEN :1;
-unsigned CREN :1;
-unsigned SREN :1;
-unsigned RX9 :1;
-unsigned SPEN :1;
-};
-} RC1STAbits_t;
-extern volatile RC1STAbits_t RC1STAbits @ 0x19D;
-
-# 3173
-typedef union {
-struct {
-unsigned RX9D :1;
-unsigned OERR :1;
-unsigned FERR :1;
-unsigned ADDEN :1;
-unsigned CREN :1;
-unsigned SREN :1;
-unsigned RX9 :1;
-unsigned SPEN :1;
-};
-} RCSTA1bits_t;
-extern volatile RCSTA1bits_t RCSTA1bits @ 0x19D;
-
-# 3227
-typedef union {
-struct {
-unsigned RX9D :1;
-unsigned OERR :1;
-unsigned FERR :1;
-unsigned ADDEN :1;
-unsigned CREN :1;
-unsigned SREN :1;
-unsigned RX9 :1;
-unsigned SPEN :1;
-};
-} RCSTAbits_t;
-extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
-
-# 3283
-extern volatile unsigned char TX1STA @ 0x19E;
-
-asm("TX1STA equ 019Eh");
-
-
-extern volatile unsigned char TXSTA1 @ 0x19E;
-
-asm("TXSTA1 equ 019Eh");
-
-extern volatile unsigned char TXSTA @ 0x19E;
-
-asm("TXSTA equ 019Eh");
-
-
-typedef union {
-struct {
-unsigned TX9D :1;
-unsigned TRMT :1;
-unsigned BRGH :1;
-unsigned SENDB :1;
-unsigned SYNC :1;
-unsigned TXEN :1;
-unsigned TX9 :1;
-unsigned CSRC :1;
-};
-} TX1STAbits_t;
-extern volatile TX1STAbits_t TX1STAbits @ 0x19E;
-
-# 3352
-typedef union {
-struct {
-unsigned TX9D :1;
-unsigned TRMT :1;
-unsigned BRGH :1;
-unsigned SENDB :1;
-unsigned SYNC :1;
-unsigned TXEN :1;
-unsigned TX9 :1;
-unsigned CSRC :1;
-};
-} TXSTA1bits_t;
-extern volatile TXSTA1bits_t TXSTA1bits @ 0x19E;
-
-# 3406
-typedef union {
-struct {
-unsigned TX9D :1;
-unsigned TRMT :1;
-unsigned BRGH :1;
-unsigned SENDB :1;
-unsigned SYNC :1;
-unsigned TXEN :1;
-unsigned TX9 :1;
-unsigned CSRC :1;
-};
-} TXSTAbits_t;
-extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
-
-# 3462
-extern volatile unsigned char BAUD1CON @ 0x19F;
-
-asm("BAUD1CON equ 019Fh");
-
-
-extern volatile unsigned char BAUDCON1 @ 0x19F;
-
-asm("BAUDCON1 equ 019Fh");
-
-extern volatile unsigned char BAUDCTL1 @ 0x19F;
-
-asm("BAUDCTL1 equ 019Fh");
-
-extern volatile unsigned char BAUDCON @ 0x19F;
-
-asm("BAUDCON equ 019Fh");
-
-extern volatile unsigned char BAUDCTL @ 0x19F;
-
-asm("BAUDCTL equ 019Fh");
-
-
-typedef union {
-struct {
-unsigned ABDEN :1;
-unsigned WUE :1;
-unsigned :1;
-unsigned BRG16 :1;
-unsigned SCKP :1;
-unsigned :1;
-unsigned RCIDL :1;
-unsigned ABDOVF :1;
-};
-} BAUD1CONbits_t;
-extern volatile BAUD1CONbits_t BAUD1CONbits @ 0x19F;
-
-# 3529
-typedef union {
-struct {
-unsigned ABDEN :1;
-unsigned WUE :1;
-unsigned :1;
-unsigned BRG16 :1;
-unsigned SCKP :1;
-unsigned :1;
-unsigned RCIDL :1;
-unsigned ABDOVF :1;
-};
-} BAUDCON1bits_t;
-extern volatile BAUDCON1bits_t BAUDCON1bits @ 0x19F;
-
-# 3573
-typedef union {
-struct {
-unsigned ABDEN :1;
-unsigned WUE :1;
-unsigned :1;
-unsigned BRG16 :1;
-unsigned SCKP :1;
-unsigned :1;
-unsigned RCIDL :1;
-unsigned ABDOVF :1;
-};
-} BAUDCTL1bits_t;
-extern volatile BAUDCTL1bits_t BAUDCTL1bits @ 0x19F;
-
-# 3617
-typedef union {
-struct {
-unsigned ABDEN :1;
-unsigned WUE :1;
-unsigned :1;
-unsigned BRG16 :1;
-unsigned SCKP :1;
-unsigned :1;
-unsigned RCIDL :1;
-unsigned ABDOVF :1;
-};
-} BAUDCONbits_t;
-extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
-
-# 3661
-typedef union {
-struct {
-unsigned ABDEN :1;
-unsigned WUE :1;
-unsigned :1;
-unsigned BRG16 :1;
-unsigned SCKP :1;
-unsigned :1;
-unsigned RCIDL :1;
-unsigned ABDOVF :1;
-};
-} BAUDCTLbits_t;
-extern volatile BAUDCTLbits_t BAUDCTLbits @ 0x19F;
-
-# 3707
-extern volatile unsigned char WPUA @ 0x20C;
-
-asm("WPUA equ 020Ch");
-
-
-typedef union {
-struct {
-unsigned WPUA0 :1;
-unsigned WPUA1 :1;
-unsigned WPUA2 :1;
-unsigned WPUA3 :1;
-unsigned WPUA4 :1;
-unsigned WPUA5 :1;
-};
-} WPUAbits_t;
-extern volatile WPUAbits_t WPUAbits @ 0x20C;
-
-# 3756
-extern volatile unsigned char WPUC @ 0x20E;
-
-asm("WPUC equ 020Eh");
-
-
-typedef union {
-struct {
-unsigned WPUC0 :1;
-unsigned WPUC1 :1;
-unsigned WPUC2 :1;
-unsigned WPUC3 :1;
-unsigned WPUC4 :1;
-unsigned WPUC5 :1;
-};
-} WPUCbits_t;
-extern volatile WPUCbits_t WPUCbits @ 0x20E;
-
-# 3805
-extern volatile unsigned char SSP1BUF @ 0x211;
-
-asm("SSP1BUF equ 0211h");
-
-
-extern volatile unsigned char SSPBUF @ 0x211;
-
-asm("SSPBUF equ 0211h");
-
-
-typedef union {
-struct {
-unsigned SSP1BUF0 :1;
-unsigned SSP1BUF1 :1;
-unsigned SSP1BUF2 :1;
-unsigned SSP1BUF3 :1;
-unsigned SSP1BUF4 :1;
-unsigned SSP1BUF5 :1;
-unsigned SSP1BUF6 :1;
-unsigned SSP1BUF7 :1;
-};
-struct {
-unsigned BUF :8;
-};
-struct {
-unsigned BUF0 :1;
-unsigned BUF1 :1;
-unsigned BUF2 :1;
-unsigned BUF3 :1;
-unsigned BUF4 :1;
-unsigned BUF5 :1;
-unsigned BUF6 :1;
-unsigned BUF7 :1;
-};
-struct {
-unsigned SSP1BUF :8;
-};
-} SSP1BUFbits_t;
-extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
-
-# 3936
-typedef union {
-struct {
-unsigned SSP1BUF0 :1;
-unsigned SSP1BUF1 :1;
-unsigned SSP1BUF2 :1;
-unsigned SSP1BUF3 :1;
-unsigned SSP1BUF4 :1;
-unsigned SSP1BUF5 :1;
-unsigned SSP1BUF6 :1;
-unsigned SSP1BUF7 :1;
-};
-struct {
-unsigned BUF :8;
-};
-struct {
-unsigned BUF0 :1;
-unsigned BUF1 :1;
-unsigned BUF2 :1;
-unsigned BUF3 :1;
-unsigned BUF4 :1;
-unsigned BUF5 :1;
-unsigned BUF6 :1;
-unsigned BUF7 :1;
-};
-struct {
-unsigned SSP1BUF :8;
-};
-} SSPBUFbits_t;
-extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
-
-# 4058
-extern volatile unsigned char SSP1ADD @ 0x212;
-
-asm("SSP1ADD equ 0212h");
-
-
-extern volatile unsigned char SSPADD @ 0x212;
-
-asm("SSPADD equ 0212h");
-
-
-typedef union {
-struct {
-unsigned SSP1ADD0 :1;
-unsigned SSP1ADD1 :1;
-unsigned SSP1ADD2 :1;
-unsigned SSP1ADD3 :1;
-unsigned SSP1ADD4 :1;
-unsigned SSP1ADD5 :1;
-unsigned SSP1ADD6 :1;
-unsigned SSP1ADD7 :1;
-};
-struct {
-unsigned ADD :8;
-};
-struct {
-unsigned ADD0 :1;
-unsigned ADD1 :1;
-unsigned ADD2 :1;
-unsigned ADD3 :1;
-unsigned ADD4 :1;
-unsigned ADD5 :1;
-unsigned ADD6 :1;
-unsigned ADD7 :1;
-};
-struct {
-unsigned SSP1ADD :8;
-};
-} SSP1ADDbits_t;
-extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
-
-# 4189
-typedef union {
-struct {
-unsigned SSP1ADD0 :1;
-unsigned SSP1ADD1 :1;
-unsigned SSP1ADD2 :1;
-unsigned SSP1ADD3 :1;
-unsigned SSP1ADD4 :1;
-unsigned SSP1ADD5 :1;
-unsigned SSP1ADD6 :1;
-unsigned SSP1ADD7 :1;
-};
-struct {
-unsigned ADD :8;
-};
-struct {
-unsigned ADD0 :1;
-unsigned ADD1 :1;
-unsigned ADD2 :1;
-unsigned ADD3 :1;
-unsigned ADD4 :1;
-unsigned ADD5 :1;
-unsigned ADD6 :1;
-unsigned ADD7 :1;
-};
-struct {
-unsigned SSP1ADD :8;
-};
-} SSPADDbits_t;
-extern volatile SSPADDbits_t SSPADDbits @ 0x212;
-
-# 4311
-extern volatile unsigned char SSP1MSK @ 0x213;
-
-asm("SSP1MSK equ 0213h");
-
-
-extern volatile unsigned char SSPMSK @ 0x213;
-
-asm("SSPMSK equ 0213h");
-
-
-typedef union {
-struct {
-unsigned SSP1MSK0 :1;
-unsigned SSP1MSK1 :1;
-unsigned SSP1MSK2 :1;
-unsigned SSP1MSK3 :1;
-unsigned SSP1MSK4 :1;
-unsigned SSP1MSK5 :1;
-unsigned SSP1MSK6 :1;
-unsigned SSP1MSK7 :1;
-};
-struct {
-unsigned MSK :8;
-};
-struct {
-unsigned MSK0 :1;
-unsigned MSK1 :1;
-unsigned MSK2 :1;
-unsigned MSK3 :1;
-unsigned MSK4 :1;
-unsigned MSK5 :1;
-unsigned MSK6 :1;
-unsigned MSK7 :1;
-};
-struct {
-unsigned SSP1MSK :8;
-};
-} SSP1MSKbits_t;
-extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
-
-# 4442
-typedef union {
-struct {
-unsigned SSP1MSK0 :1;
-unsigned SSP1MSK1 :1;
-unsigned SSP1MSK2 :1;
-unsigned SSP1MSK3 :1;
-unsigned SSP1MSK4 :1;
-unsigned SSP1MSK5 :1;
-unsigned SSP1MSK6 :1;
-unsigned SSP1MSK7 :1;
-};
-struct {
-unsigned MSK :8;
-};
-struct {
-unsigned MSK0 :1;
-unsigned MSK1 :1;
-unsigned MSK2 :1;
-unsigned MSK3 :1;
-unsigned MSK4 :1;
-unsigned MSK5 :1;
-unsigned MSK6 :1;
-unsigned MSK7 :1;
-};
-struct {
-unsigned SSP1MSK :8;
-};
-} SSPMSKbits_t;
-extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
-
-# 4564
-extern volatile unsigned char SSP1STAT @ 0x214;
-
-asm("SSP1STAT equ 0214h");
-
-
-extern volatile unsigned char SSPSTAT @ 0x214;
-
-asm("SSPSTAT equ 0214h");
-
-
-typedef union {
-struct {
-unsigned BF :1;
-unsigned UA :1;
-unsigned R_nW :1;
-unsigned S :1;
-unsigned P :1;
-unsigned D_nA :1;
-unsigned CKE :1;
-unsigned SMP :1;
-};
-} SSP1STATbits_t;
-extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
-
-# 4629
-typedef union {
-struct {
-unsigned BF :1;
-unsigned UA :1;
-unsigned R_nW :1;
-unsigned S :1;
-unsigned P :1;
-unsigned D_nA :1;
-unsigned CKE :1;
-unsigned SMP :1;
-};
-} SSPSTATbits_t;
-extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
-
-# 4685
-extern volatile unsigned char SSP1CON1 @ 0x215;
-
-asm("SSP1CON1 equ 0215h");
-
-
-extern volatile unsigned char SSPCON @ 0x215;
-
-asm("SSPCON equ 0215h");
-
-extern volatile unsigned char SSPCON1 @ 0x215;
-
-asm("SSPCON1 equ 0215h");
-
-extern volatile unsigned char SSP1CON @ 0x215;
-
-asm("SSP1CON equ 0215h");
-
-
-typedef union {
-struct {
-unsigned SSPM :4;
-unsigned CKP :1;
-unsigned SSPEN :1;
-unsigned SSPOV :1;
-unsigned WCOL :1;
-};
-struct {
-unsigned SSPM0 :1;
-unsigned SSPM1 :1;
-unsigned SSPM2 :1;
-unsigned SSPM3 :1;
-};
-} SSP1CON1bits_t;
-extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
-
-# 4766
-typedef union {
-struct {
-unsigned SSPM :4;
-unsigned CKP :1;
-unsigned SSPEN :1;
-unsigned SSPOV :1;
-unsigned WCOL :1;
-};
-struct {
-unsigned SSPM0 :1;
-unsigned SSPM1 :1;
-unsigned SSPM2 :1;
-unsigned SSPM3 :1;
-};
-} SSPCONbits_t;
-extern volatile SSPCONbits_t SSPCONbits @ 0x215;
-
-# 4828
-typedef union {
-struct {
-unsigned SSPM :4;
-unsigned CKP :1;
-unsigned SSPEN :1;
-unsigned SSPOV :1;
-unsigned WCOL :1;
-};
-struct {
-unsigned SSPM0 :1;
-unsigned SSPM1 :1;
-unsigned SSPM2 :1;
-unsigned SSPM3 :1;
-};
-} SSPCON1bits_t;
-extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
-
-# 4890
-typedef union {
-struct {
-unsigned SSPM :4;
-unsigned CKP :1;
-unsigned SSPEN :1;
-unsigned SSPOV :1;
-unsigned WCOL :1;
-};
-struct {
-unsigned SSPM0 :1;
-unsigned SSPM1 :1;
-unsigned SSPM2 :1;
-unsigned SSPM3 :1;
-};
-} SSP1CONbits_t;
-extern volatile SSP1CONbits_t SSP1CONbits @ 0x215;
-
-# 4954
-extern volatile unsigned char SSP1CON2 @ 0x216;
-
-asm("SSP1CON2 equ 0216h");
-
-
-extern volatile unsigned char SSPCON2 @ 0x216;
-
-asm("SSPCON2 equ 0216h");
-
-
-typedef union {
-struct {
-unsigned SEN :1;
-unsigned RSEN :1;
-unsigned PEN :1;
-unsigned RCEN :1;
-unsigned ACKEN :1;
-unsigned ACKDT :1;
-unsigned ACKSTAT :1;
-unsigned GCEN :1;
-};
-} SSP1CON2bits_t;
-extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
-
-# 5019
-typedef union {
-struct {
-unsigned SEN :1;
-unsigned RSEN :1;
-unsigned PEN :1;
-unsigned RCEN :1;
-unsigned ACKEN :1;
-unsigned ACKDT :1;
-unsigned ACKSTAT :1;
-unsigned GCEN :1;
-};
-} SSPCON2bits_t;
-extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
-
-# 5075
-extern volatile unsigned char SSP1CON3 @ 0x217;
-
-asm("SSP1CON3 equ 0217h");
-
-
-extern volatile unsigned char SSPCON3 @ 0x217;
-
-asm("SSPCON3 equ 0217h");
-
-
-typedef union {
-struct {
-unsigned DHEN :1;
-unsigned AHEN :1;
-unsigned SBCDE :1;
-unsigned SDAHT :1;
-unsigned BOEN :1;
-unsigned SCIE :1;
-unsigned PCIE :1;
-unsigned ACKTIM :1;
-};
-} SSP1CON3bits_t;
-extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
-
-# 5140
-typedef union {
-struct {
-unsigned DHEN :1;
-unsigned AHEN :1;
-unsigned SBCDE :1;
-unsigned SDAHT :1;
-unsigned BOEN :1;
-unsigned SCIE :1;
-unsigned PCIE :1;
-unsigned ACKTIM :1;
-};
-} SSPCON3bits_t;
-extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
-
-# 5196
-extern volatile unsigned char ODCONA @ 0x28C;
-
-asm("ODCONA equ 028Ch");
-
-
-typedef union {
-struct {
-unsigned ODA0 :1;
-unsigned ODA1 :1;
-unsigned ODA2 :1;
-unsigned :1;
-unsigned ODA4 :1;
-unsigned ODA5 :1;
-};
-} ODCONAbits_t;
-extern volatile ODCONAbits_t ODCONAbits @ 0x28C;
-
-# 5240
-extern volatile unsigned char ODCONC @ 0x28E;
-
-asm("ODCONC equ 028Eh");
-
-
-typedef union {
-struct {
-unsigned ODC0 :1;
-unsigned ODC1 :1;
-unsigned ODC2 :1;
-unsigned ODC3 :1;
-unsigned ODC4 :1;
-unsigned ODC5 :1;
-};
-} ODCONCbits_t;
-extern volatile ODCONCbits_t ODCONCbits @ 0x28E;
-
-# 5289
-extern volatile unsigned short CCPR1 @ 0x291;
-
-asm("CCPR1 equ 0291h");
-
-
-
-extern volatile unsigned char CCPR1L @ 0x291;
-
-asm("CCPR1L equ 0291h");
-
-
-typedef union {
-struct {
-unsigned CCPR1L :8;
-};
-} CCPR1Lbits_t;
-extern volatile CCPR1Lbits_t CCPR1Lbits @ 0x291;
-
-# 5314
-extern volatile unsigned char CCPR1H @ 0x292;
-
-asm("CCPR1H equ 0292h");
-
-
-typedef union {
-struct {
-unsigned CCPR1H :8;
-};
-} CCPR1Hbits_t;
-extern volatile CCPR1Hbits_t CCPR1Hbits @ 0x292;
-
-# 5333
-extern volatile unsigned char CCP1CON @ 0x293;
-
-asm("CCP1CON equ 0293h");
-
-
-extern volatile unsigned char ECCP1CON @ 0x293;
-
-asm("ECCP1CON equ 0293h");
-
-
-typedef union {
-struct {
-unsigned CCP1M :4;
-unsigned DC1B :2;
-};
-struct {
-unsigned CCP1M0 :1;
-unsigned CCP1M1 :1;
-unsigned CCP1M2 :1;
-unsigned CCP1M3 :1;
-unsigned DC1B0 :1;
-unsigned DC1B1 :1;
-};
-struct {
-unsigned :4;
-unsigned CCP1Y :1;
-unsigned CCP1X :1;
-};
-} CCP1CONbits_t;
-extern volatile CCP1CONbits_t CCP1CONbits @ 0x293;
-
-# 5415
-typedef union {
-struct {
-unsigned CCP1M :4;
-unsigned DC1B :2;
-};
-struct {
-unsigned CCP1M0 :1;
-unsigned CCP1M1 :1;
-unsigned CCP1M2 :1;
-unsigned CCP1M3 :1;
-unsigned DC1B0 :1;
-unsigned DC1B1 :1;
-};
-struct {
-unsigned :4;
-unsigned CCP1Y :1;
-unsigned CCP1X :1;
-};
-} ECCP1CONbits_t;
-extern volatile ECCP1CONbits_t ECCP1CONbits @ 0x293;
-
-# 5488
-extern volatile unsigned short CCPR2 @ 0x298;
-
-asm("CCPR2 equ 0298h");
-
-
-
-extern volatile unsigned char CCPR2L @ 0x298;
-
-asm("CCPR2L equ 0298h");
-
-
-typedef union {
-struct {
-unsigned CCPR2L :8;
-};
-} CCPR2Lbits_t;
-extern volatile CCPR2Lbits_t CCPR2Lbits @ 0x298;
-
-# 5513
-extern volatile unsigned char CCPR2H @ 0x299;
-
-asm("CCPR2H equ 0299h");
-
-
-typedef union {
-struct {
-unsigned CCPR2H :8;
-};
-} CCPR2Hbits_t;
-extern volatile CCPR2Hbits_t CCPR2Hbits @ 0x299;
-
-# 5532
-extern volatile unsigned char CCP2CON @ 0x29A;
-
-asm("CCP2CON equ 029Ah");
-
-
-extern volatile unsigned char ECCP2CON @ 0x29A;
-
-asm("ECCP2CON equ 029Ah");
-
-
-typedef union {
-struct {
-unsigned CCP2M :4;
-unsigned DC2B :2;
-};
-struct {
-unsigned CCP2M0 :1;
-unsigned CCP2M1 :1;
-unsigned CCP2M2 :1;
-unsigned CCP2M3 :1;
-unsigned DC2B0 :1;
-unsigned DC2B1 :1;
-};
-struct {
-unsigned :4;
-unsigned CCP2Y :1;
-unsigned CCP2X :1;
-};
-} CCP2CONbits_t;
-extern volatile CCP2CONbits_t CCP2CONbits @ 0x29A;
-
-# 5614
-typedef union {
-struct {
-unsigned CCP2M :4;
-unsigned DC2B :2;
-};
-struct {
-unsigned CCP2M0 :1;
-unsigned CCP2M1 :1;
-unsigned CCP2M2 :1;
-unsigned CCP2M3 :1;
-unsigned DC2B0 :1;
-unsigned DC2B1 :1;
-};
-struct {
-unsigned :4;
-unsigned CCP2Y :1;
-unsigned CCP2X :1;
-};
-} ECCP2CONbits_t;
-extern volatile ECCP2CONbits_t ECCP2CONbits @ 0x29A;
-
-# 5687
-extern volatile unsigned char CCPTMRS @ 0x29E;
-
-asm("CCPTMRS equ 029Eh");
-
-
-typedef union {
-struct {
-unsigned C1TSEL :2;
-unsigned C2TSEL :2;
-unsigned P3TSEL :2;
-unsigned P4TSEL :2;
-};
-struct {
-unsigned C1TSEL0 :1;
-unsigned C1TSEL1 :1;
-unsigned C2TSEL0 :1;
-unsigned C2TSEL1 :1;
-unsigned P3TSEL0 :1;
-unsigned P3TSEL1 :1;
-unsigned P4TSEL0 :1;
-unsigned P4TSEL1 :1;
-};
-} CCPTMRSbits_t;
-extern volatile CCPTMRSbits_t CCPTMRSbits @ 0x29E;
-
-# 5774
-extern volatile unsigned char SLRCONA @ 0x30C;
-
-asm("SLRCONA equ 030Ch");
-
-
-typedef union {
-struct {
-unsigned SLRA0 :1;
-unsigned SLRA1 :1;
-unsigned SLRA2 :1;
-unsigned :1;
-unsigned SLRA4 :1;
-unsigned SLRA5 :1;
-};
-} SLRCONAbits_t;
-extern volatile SLRCONAbits_t SLRCONAbits @ 0x30C;
-
-# 5818
-extern volatile unsigned char SLRCONC @ 0x30E;
-
-asm("SLRCONC equ 030Eh");
-
-
-typedef union {
-struct {
-unsigned SLRC0 :1;
-unsigned SLRC1 :1;
-unsigned SLRC2 :1;
-unsigned SLRC3 :1;
-unsigned SLRC4 :1;
-unsigned SLRC5 :1;
-};
-} SLRCONCbits_t;
-extern volatile SLRCONCbits_t SLRCONCbits @ 0x30E;
-
-# 5867
-extern volatile unsigned char INLVLA @ 0x38C;
-
-asm("INLVLA equ 038Ch");
-
-
-typedef union {
-struct {
-unsigned INLVLA0 :1;
-unsigned INLVLA1 :1;
-unsigned INLVLA2 :1;
-unsigned INLVLA3 :1;
-unsigned INLVLA4 :1;
-unsigned INLVLA5 :1;
-};
-} INLVLAbits_t;
-extern volatile INLVLAbits_t INLVLAbits @ 0x38C;
-
-# 5916
-extern volatile unsigned char INLVLC @ 0x38E;
-
-asm("INLVLC equ 038Eh");
-
-
-typedef union {
-struct {
-unsigned INLVLC0 :1;
-unsigned INLVLC1 :1;
-unsigned INLVLC2 :1;
-unsigned INLVLC3 :1;
-unsigned INLVLC4 :1;
-unsigned INLVLC5 :1;
-};
-} INLVLCbits_t;
-extern volatile INLVLCbits_t INLVLCbits @ 0x38E;
-
-# 5965
-extern volatile unsigned char IOCAP @ 0x391;
-
-asm("IOCAP equ 0391h");
-
-
-typedef union {
-struct {
-unsigned IOCAP0 :1;
-unsigned IOCAP1 :1;
-unsigned IOCAP2 :1;
-unsigned IOCAP3 :1;
-unsigned IOCAP4 :1;
-unsigned IOCAP5 :1;
-};
-} IOCAPbits_t;
-extern volatile IOCAPbits_t IOCAPbits @ 0x391;
-
-# 6014
-extern volatile unsigned char IOCAN @ 0x392;
-
-asm("IOCAN equ 0392h");
-
-
-typedef union {
-struct {
-unsigned IOCAN0 :1;
-unsigned IOCAN1 :1;
-unsigned IOCAN2 :1;
-unsigned IOCAN3 :1;
-unsigned IOCAN4 :1;
-unsigned IOCAN5 :1;
-};
-} IOCANbits_t;
-extern volatile IOCANbits_t IOCANbits @ 0x392;
-
-# 6063
-extern volatile unsigned char IOCAF @ 0x393;
-
-asm("IOCAF equ 0393h");
-
-
-typedef union {
-struct {
-unsigned IOCAF0 :1;
-unsigned IOCAF1 :1;
-unsigned IOCAF2 :1;
-unsigned IOCAF3 :1;
-unsigned IOCAF4 :1;
-unsigned IOCAF5 :1;
-};
-} IOCAFbits_t;
-extern volatile IOCAFbits_t IOCAFbits @ 0x393;
-
-# 6112
-extern volatile unsigned char IOCCP @ 0x397;
-
-asm("IOCCP equ 0397h");
-
-
-typedef union {
-struct {
-unsigned IOCCP0 :1;
-unsigned IOCCP1 :1;
-unsigned IOCCP2 :1;
-unsigned IOCCP3 :1;
-unsigned IOCCP4 :1;
-unsigned IOCCP5 :1;
-};
-} IOCCPbits_t;
-extern volatile IOCCPbits_t IOCCPbits @ 0x397;
-
-# 6161
-extern volatile unsigned char IOCCN @ 0x398;
-
-asm("IOCCN equ 0398h");
-
-
-typedef union {
-struct {
-unsigned IOCCN0 :1;
-unsigned IOCCN1 :1;
-unsigned IOCCN2 :1;
-unsigned IOCCN3 :1;
-unsigned IOCCN4 :1;
-unsigned IOCCN5 :1;
-};
-} IOCCNbits_t;
-extern volatile IOCCNbits_t IOCCNbits @ 0x398;
-
-# 6210
-extern volatile unsigned char IOCCF @ 0x399;
-
-asm("IOCCF equ 0399h");
-
-
-typedef union {
-struct {
-unsigned IOCCF0 :1;
-unsigned IOCCF1 :1;
-unsigned IOCCF2 :1;
-unsigned IOCCF3 :1;
-unsigned IOCCF4 :1;
-unsigned IOCCF5 :1;
-};
-} IOCCFbits_t;
-extern volatile IOCCFbits_t IOCCFbits @ 0x399;
-
-# 6259
-extern volatile unsigned char TMR4 @ 0x415;
-
-asm("TMR4 equ 0415h");
-
-
-typedef union {
-struct {
-unsigned TMR4 :8;
-};
-} TMR4bits_t;
-extern volatile TMR4bits_t TMR4bits @ 0x415;
-
-# 6278
-extern volatile unsigned char PR4 @ 0x416;
-
-asm("PR4 equ 0416h");
-
-
-typedef union {
-struct {
-unsigned PR4 :8;
-};
-} PR4bits_t;
-extern volatile PR4bits_t PR4bits @ 0x416;
-
-# 6297
-extern volatile unsigned char T4CON @ 0x417;
-
-asm("T4CON equ 0417h");
-
-
-typedef union {
-struct {
-unsigned T4CKPS :2;
-unsigned TMR4ON :1;
-unsigned T4OUTPS :4;
-};
-struct {
-unsigned T4CKPS0 :1;
-unsigned T4CKPS1 :1;
-unsigned :1;
-unsigned T4OUTPS0 :1;
-unsigned T4OUTPS1 :1;
-unsigned T4OUTPS2 :1;
-unsigned T4OUTPS3 :1;
-};
-} T4CONbits_t;
-extern volatile T4CONbits_t T4CONbits @ 0x417;
-
-# 6367
-extern volatile unsigned char TMR6 @ 0x41C;
-
-asm("TMR6 equ 041Ch");
-
-
-typedef union {
-struct {
-unsigned TMR6 :8;
-};
-} TMR6bits_t;
-extern volatile TMR6bits_t TMR6bits @ 0x41C;
-
-# 6386
-extern volatile unsigned char PR6 @ 0x41D;
-
-asm("PR6 equ 041Dh");
-
-
-typedef union {
-struct {
-unsigned PR6 :8;
-};
-} PR6bits_t;
-extern volatile PR6bits_t PR6bits @ 0x41D;
-
-# 6405
-extern volatile unsigned char T6CON @ 0x41E;
-
-asm("T6CON equ 041Eh");
-
-
-typedef union {
-struct {
-unsigned T6CKPS :2;
-unsigned TMR6ON :1;
-unsigned T6OUTPS :4;
-};
-struct {
-unsigned T6CKPS0 :1;
-unsigned T6CKPS1 :1;
-unsigned :1;
-unsigned T6OUTPS0 :1;
-unsigned T6OUTPS1 :1;
-unsigned T6OUTPS2 :1;
-unsigned T6OUTPS3 :1;
-};
-} T6CONbits_t;
-extern volatile T6CONbits_t T6CONbits @ 0x41E;
-
-# 6475
-extern volatile unsigned char OPA1CON @ 0x511;
-
-asm("OPA1CON equ 0511h");
-
-
-typedef union {
-struct {
-unsigned OPA1PCH :2;
-unsigned :2;
-unsigned OPA1UG :1;
-unsigned :1;
-unsigned OPA1SP :1;
-unsigned OPA1EN :1;
-};
-struct {
-unsigned OPA1PCH0 :1;
-unsigned OPA1PCH1 :1;
-};
-} OPA1CONbits_t;
-extern volatile OPA1CONbits_t OPA1CONbits @ 0x511;
-
-# 6528
-extern volatile unsigned char OPA2CON @ 0x515;
-
-asm("OPA2CON equ 0515h");
-
-
-typedef union {
-struct {
-unsigned OPA2PCH :2;
-unsigned :2;
-unsigned OPA2UG :1;
-unsigned :1;
-unsigned OPA2SP :1;
-unsigned OPA2EN :1;
-};
-struct {
-unsigned OPA2PCH0 :1;
-unsigned OPA2PCH1 :1;
-};
-} OPA2CONbits_t;
-extern volatile OPA2CONbits_t OPA2CONbits @ 0x515;
-
-# 6581
-extern volatile unsigned char PWM3DCL @ 0x617;
-
-asm("PWM3DCL equ 0617h");
-
-
-typedef union {
-struct {
-unsigned :6;
-unsigned PWM3DCL :2;
-};
-struct {
-unsigned :6;
-unsigned PWM3DCL0 :1;
-unsigned PWM3DCL1 :1;
-};
-} PWM3DCLbits_t;
-extern volatile PWM3DCLbits_t PWM3DCLbits @ 0x617;
-
-# 6616
-extern volatile unsigned char PWM3DCH @ 0x618;
-
-asm("PWM3DCH equ 0618h");
-
-
-typedef union {
-struct {
-unsigned PWM3DCH :8;
-};
-struct {
-unsigned PWM3DCH0 :1;
-unsigned PWM3DCH1 :1;
-unsigned PWM3DCH2 :1;
-unsigned PWM3DCH3 :1;
-unsigned PWM3DCH4 :1;
-unsigned PWM3DCH5 :1;
-unsigned PWM3DCH6 :1;
-unsigned PWM3DCH7 :1;
-};
-} PWM3DCHbits_t;
-extern volatile PWM3DCHbits_t PWM3DCHbits @ 0x618;
-
-# 6685
-extern volatile unsigned char PWM3CON @ 0x619;
-
-asm("PWM3CON equ 0619h");
-
-
-extern volatile unsigned char PWM3CON0 @ 0x619;
-
-asm("PWM3CON0 equ 0619h");
-
-
-typedef union {
-struct {
-unsigned :4;
-unsigned PWM3POL :1;
-unsigned PWM3OUT :1;
-unsigned :1;
-unsigned PWM3EN :1;
-};
-} PWM3CONbits_t;
-extern volatile PWM3CONbits_t PWM3CONbits @ 0x619;
-
-# 6722
-typedef union {
-struct {
-unsigned :4;
-unsigned PWM3POL :1;
-unsigned PWM3OUT :1;
-unsigned :1;
-unsigned PWM3EN :1;
-};
-} PWM3CON0bits_t;
-extern volatile PWM3CON0bits_t PWM3CON0bits @ 0x619;
-
-# 6750
-extern volatile unsigned char PWM4DCL @ 0x61A;
-
-asm("PWM4DCL equ 061Ah");
-
-
-typedef union {
-struct {
-unsigned :6;
-unsigned PWM4DCL :2;
-};
-struct {
-unsigned :6;
-unsigned PWM4DCL0 :1;
-unsigned PWM4DCL1 :1;
-};
-} PWM4DCLbits_t;
-extern volatile PWM4DCLbits_t PWM4DCLbits @ 0x61A;
-
-# 6785
-extern volatile unsigned char PWM4DCH @ 0x61B;
-
-asm("PWM4DCH equ 061Bh");
-
-
-typedef union {
-struct {
-unsigned PWM4DCH :8;
-};
-struct {
-unsigned PWM4DCH0 :1;
-unsigned PWM4DCH1 :1;
-unsigned PWM4DCH2 :1;
-unsigned PWM4DCH3 :1;
-unsigned PWM4DCH4 :1;
-unsigned PWM4DCH5 :1;
-unsigned PWM4DCH6 :1;
-unsigned PWM4DCH7 :1;
-};
-} PWM4DCHbits_t;
-extern volatile PWM4DCHbits_t PWM4DCHbits @ 0x61B;
-
-# 6854
-extern volatile unsigned char PWM4CON @ 0x61C;
-
-asm("PWM4CON equ 061Ch");
-
-
-extern volatile unsigned char PWM4CON0 @ 0x61C;
-
-asm("PWM4CON0 equ 061Ch");
-
-
-typedef union {
-struct {
-unsigned :4;
-unsigned PWM4POL :1;
-unsigned PWM4OUT :1;
-unsigned :1;
-unsigned PWM4EN :1;
-};
-} PWM4CONbits_t;
-extern volatile PWM4CONbits_t PWM4CONbits @ 0x61C;
-
-# 6891
-typedef union {
-struct {
-unsigned :4;
-unsigned PWM4POL :1;
-unsigned PWM4OUT :1;
-unsigned :1;
-unsigned PWM4EN :1;
-};
-} PWM4CON0bits_t;
-extern volatile PWM4CON0bits_t PWM4CON0bits @ 0x61C;
-
-# 6919
-extern volatile unsigned char COG1PHR @ 0x691;
-
-asm("COG1PHR equ 0691h");
-
-
-typedef union {
-struct {
-unsigned G1PHR :6;
-};
-struct {
-unsigned G1PHR0 :1;
-unsigned G1PHR1 :1;
-unsigned G1PHR2 :1;
-unsigned G1PHR3 :1;
-unsigned G1PHR4 :1;
-unsigned G1PHR5 :1;
-};
-} COG1PHRbits_t;
-extern volatile COG1PHRbits_t COG1PHRbits @ 0x691;
-
-# 6976
-extern volatile unsigned char COG1PHF @ 0x692;
-
-asm("COG1PHF equ 0692h");
-
-
-typedef union {
-struct {
-unsigned G1PHF :6;
-};
-struct {
-unsigned G1PHF0 :1;
-unsigned G1PHF1 :1;
-unsigned G1PHF2 :1;
-unsigned G1PHF3 :1;
-unsigned G1PHF4 :1;
-unsigned G1PHF5 :1;
-};
-} COG1PHFbits_t;
-extern volatile COG1PHFbits_t COG1PHFbits @ 0x692;
-
-# 7033
-extern volatile unsigned char COG1BLKR @ 0x693;
-
-asm("COG1BLKR equ 0693h");
-
-
-typedef union {
-struct {
-unsigned G1BLKR :6;
-};
-struct {
-unsigned G1BLKR0 :1;
-unsigned G1BLKR1 :1;
-unsigned G1BLKR2 :1;
-unsigned G1BLKR3 :1;
-unsigned G1BLKR4 :1;
-unsigned G1BLKR5 :1;
-};
-} COG1BLKRbits_t;
-extern volatile COG1BLKRbits_t COG1BLKRbits @ 0x693;
-
-# 7090
-extern volatile unsigned char COG1BLKF @ 0x694;
-
-asm("COG1BLKF equ 0694h");
-
-
-typedef union {
-struct {
-unsigned G1BLKF :6;
-};
-struct {
-unsigned G1BLKF0 :1;
-unsigned G1BLKF1 :1;
-unsigned G1BLKF2 :1;
-unsigned G1BLKF3 :1;
-unsigned G1BLKF4 :1;
-unsigned G1BLKF5 :1;
-};
-} COG1BLKFbits_t;
-extern volatile COG1BLKFbits_t COG1BLKFbits @ 0x694;
-
-# 7147
-extern volatile unsigned char COG1DBR @ 0x695;
-
-asm("COG1DBR equ 0695h");
-
-
-typedef union {
-struct {
-unsigned G1DBR :6;
-};
-struct {
-unsigned G1DBR0 :1;
-unsigned G1DBR1 :1;
-unsigned G1DBR2 :1;
-unsigned G1DBR3 :1;
-unsigned G1DBR4 :1;
-unsigned G1DBR5 :1;
-};
-} COG1DBRbits_t;
-extern volatile COG1DBRbits_t COG1DBRbits @ 0x695;
-
-# 7204
-extern volatile unsigned char COG1DBF @ 0x696;
-
-asm("COG1DBF equ 0696h");
-
-
-typedef union {
-struct {
-unsigned G1DBF :6;
-};
-struct {
-unsigned G1DBF0 :1;
-unsigned G1DBF1 :1;
-unsigned G1DBF2 :1;
-unsigned G1DBF3 :1;
-unsigned G1DBF4 :1;
-unsigned G1DBF5 :1;
-};
-} COG1DBFbits_t;
-extern volatile COG1DBFbits_t COG1DBFbits @ 0x696;
-
-# 7261
-extern volatile unsigned char COG1CON0 @ 0x697;
-
-asm("COG1CON0 equ 0697h");
-
-
-typedef union {
-struct {
-unsigned G1MD :3;
-unsigned G1CS :2;
-unsigned :1;
-unsigned G1LD :1;
-unsigned G1EN :1;
-};
-struct {
-unsigned G1MD0 :1;
-unsigned G1MD1 :1;
-unsigned G1MD2 :1;
-unsigned G1CS0 :1;
-unsigned G1CS1 :1;
-};
-} COG1CON0bits_t;
-extern volatile COG1CON0bits_t COG1CON0bits @ 0x697;
-
-# 7331
-extern volatile unsigned char COG1CON1 @ 0x698;
-
-asm("COG1CON1 equ 0698h");
-
-
-typedef union {
-struct {
-unsigned G1POLA :1;
-unsigned G1POLB :1;
-unsigned G1POLC :1;
-unsigned G1POLD :1;
-unsigned :2;
-unsigned G1FDBS :1;
-unsigned G1RDBS :1;
-};
-} COG1CON1bits_t;
-extern volatile COG1CON1bits_t COG1CON1bits @ 0x698;
-
-# 7381
-extern volatile unsigned char COG1RIS @ 0x699;
-
-asm("COG1RIS equ 0699h");
-
-
-typedef union {
-struct {
-unsigned G1RIS0 :1;
-unsigned G1RIS1 :1;
-unsigned G1RIS2 :1;
-unsigned G1RIS3 :1;
-unsigned G1RIS4 :1;
-unsigned G1RIS5 :1;
-unsigned G1RIS6 :1;
-};
-} COG1RISbits_t;
-extern volatile COG1RISbits_t COG1RISbits @ 0x699;
-
-# 7436
-extern volatile unsigned char COG1RSIM @ 0x69A;
-
-asm("COG1RSIM equ 069Ah");
-
-
-typedef union {
-struct {
-unsigned G1RSIM0 :1;
-unsigned G1RSIM1 :1;
-unsigned G1RSIM2 :1;
-unsigned G1RSIM3 :1;
-unsigned G1RSIM4 :1;
-unsigned G1RSIM5 :1;
-unsigned G1RSIM6 :1;
-};
-} COG1RSIMbits_t;
-extern volatile COG1RSIMbits_t COG1RSIMbits @ 0x69A;
-
-# 7491
-extern volatile unsigned char COG1FIS @ 0x69B;
-
-asm("COG1FIS equ 069Bh");
-
-
-typedef union {
-struct {
-unsigned G1FIS0 :1;
-unsigned G1FIS1 :1;
-unsigned G1FIS2 :1;
-unsigned G1FIS3 :1;
-unsigned G1FIS4 :1;
-unsigned G1FIS5 :1;
-unsigned G1FIS6 :1;
-};
-} COG1FISbits_t;
-extern volatile COG1FISbits_t COG1FISbits @ 0x69B;
-
-# 7546
-extern volatile unsigned char COG1FSIM @ 0x69C;
-
-asm("COG1FSIM equ 069Ch");
-
-
-typedef union {
-struct {
-unsigned G1FSIM0 :1;
-unsigned G1FSIM1 :1;
-unsigned G1FSIM2 :1;
-unsigned G1FSIM3 :1;
-unsigned G1FSIM4 :1;
-unsigned G1FSIM5 :1;
-unsigned G1FSIM6 :1;
-};
-} COG1FSIMbits_t;
-extern volatile COG1FSIMbits_t COG1FSIMbits @ 0x69C;
-
-# 7601
-extern volatile unsigned char COG1ASD0 @ 0x69D;
-
-asm("COG1ASD0 equ 069Dh");
-
-
-typedef union {
-struct {
-unsigned :2;
-unsigned G1ASDAC :2;
-unsigned G1ASDBD :2;
-unsigned G1ARSEN :1;
-unsigned G1ASE :1;
-};
-struct {
-unsigned :2;
-unsigned G1ASDAC0 :1;
-unsigned G1ASDAC1 :1;
-unsigned G1ASDBD0 :1;
-unsigned G1ASDBD1 :1;
-};
-} COG1ASD0bits_t;
-extern volatile COG1ASD0bits_t COG1ASD0bits @ 0x69D;
-
-# 7666
-extern volatile unsigned char COG1ASD1 @ 0x69E;
-
-asm("COG1ASD1 equ 069Eh");
-
-
-typedef union {
-struct {
-unsigned G1AS0E :1;
-unsigned G1AS1E :1;
-unsigned G1AS2E :1;
-unsigned G1AS3E :1;
-};
-} COG1ASD1bits_t;
-extern volatile COG1ASD1bits_t COG1ASD1bits @ 0x69E;
-
-# 7703
-extern volatile unsigned char COG1STR @ 0x69F;
-
-asm("COG1STR equ 069Fh");
-
-
-typedef union {
-struct {
-unsigned G1STRA :1;
-unsigned G1STRB :1;
-unsigned G1STRC :1;
-unsigned G1STRD :1;
-unsigned G1SDATA :1;
-unsigned G1SDATB :1;
-unsigned G1SDATC :1;
-unsigned G1SDATD :1;
-};
-} COG1STRbits_t;
-extern volatile COG1STRbits_t COG1STRbits @ 0x69F;
-
-# 7764
-extern volatile unsigned char PPSLOCK @ 0xE0F;
-
-asm("PPSLOCK equ 0E0Fh");
-
-
-typedef union {
-struct {
-unsigned PPSLOCKED :1;
-};
-} PPSLOCKbits_t;
-extern volatile PPSLOCKbits_t PPSLOCKbits @ 0xE0F;
-
-# 7783
-extern volatile unsigned char INTPPS @ 0xE10;
-
-asm("INTPPS equ 0E10h");
-
-
-typedef union {
-struct {
-unsigned INTPPS :5;
-};
-} INTPPSbits_t;
-extern volatile INTPPSbits_t INTPPSbits @ 0xE10;
-
-# 7802
-extern volatile unsigned char T0CKIPPS @ 0xE11;
-
-asm("T0CKIPPS equ 0E11h");
-
-
-typedef union {
-struct {
-unsigned T0CKIPPS :5;
-};
-} T0CKIPPSbits_t;
-extern volatile T0CKIPPSbits_t T0CKIPPSbits @ 0xE11;
-
-# 7821
-extern volatile unsigned char T1CKIPPS @ 0xE12;
-
-asm("T1CKIPPS equ 0E12h");
-
-
-typedef union {
-struct {
-unsigned T1CKIPPS :5;
-};
-} T1CKIPPSbits_t;
-extern volatile T1CKIPPSbits_t T1CKIPPSbits @ 0xE12;
-
-# 7840
-extern volatile unsigned char T1GPPS @ 0xE13;
-
-asm("T1GPPS equ 0E13h");
-
-
-typedef union {
-struct {
-unsigned T1GPPS :5;
-};
-} T1GPPSbits_t;
-extern volatile T1GPPSbits_t T1GPPSbits @ 0xE13;
-
-# 7859
-extern volatile unsigned char CCP1PPS @ 0xE14;
-
-asm("CCP1PPS equ 0E14h");
-
-
-typedef union {
-struct {
-unsigned CCP1PPS :5;
-};
-} CCP1PPSbits_t;
-extern volatile CCP1PPSbits_t CCP1PPSbits @ 0xE14;
-
-# 7878
-extern volatile unsigned char CCP2PPS @ 0xE15;
-
-asm("CCP2PPS equ 0E15h");
-
-
-typedef union {
-struct {
-unsigned CCP2PPS :5;
-};
-} CCP2PPSbits_t;
-extern volatile CCP2PPSbits_t CCP2PPSbits @ 0xE15;
-
-# 7897
-extern volatile unsigned char COGINPPS @ 0xE17;
-
-asm("COGINPPS equ 0E17h");
-
-
-typedef union {
-struct {
-unsigned COGINPPS :5;
-};
-} COGINPPSbits_t;
-extern volatile COGINPPSbits_t COGINPPSbits @ 0xE17;
-
-# 7916
-extern volatile unsigned char SSPCLKPPS @ 0xE20;
-
-asm("SSPCLKPPS equ 0E20h");
-
-
-typedef union {
-struct {
-unsigned SSPCLKPPS :5;
-};
-} SSPCLKPPSbits_t;
-extern volatile SSPCLKPPSbits_t SSPCLKPPSbits @ 0xE20;
-
-# 7935
-extern volatile unsigned char SSPDATPPS @ 0xE21;
-
-asm("SSPDATPPS equ 0E21h");
-
-
-typedef union {
-struct {
-unsigned SSPDATPPS :5;
-};
-} SSPDATPPSbits_t;
-extern volatile SSPDATPPSbits_t SSPDATPPSbits @ 0xE21;
-
-# 7954
-extern volatile unsigned char SSPSSPPS @ 0xE22;
-
-asm("SSPSSPPS equ 0E22h");
-
-
-typedef union {
-struct {
-unsigned SSPSSPPS :5;
-};
-} SSPSSPPSbits_t;
-extern volatile SSPSSPPSbits_t SSPSSPPSbits @ 0xE22;
-
-# 7973
-extern volatile unsigned char RXPPS @ 0xE24;
-
-asm("RXPPS equ 0E24h");
-
-
-typedef union {
-struct {
-unsigned RXPPS :5;
-};
-} RXPPSbits_t;
-extern volatile RXPPSbits_t RXPPSbits @ 0xE24;
-
-# 7992
-extern volatile unsigned char CKPPS @ 0xE25;
-
-asm("CKPPS equ 0E25h");
-
-
-typedef union {
-struct {
-unsigned CKPPS :5;
-};
-} CKPPSbits_t;
-extern volatile CKPPSbits_t CKPPSbits @ 0xE25;
-
-# 8011
-extern volatile unsigned char CLCIN0PPS @ 0xE28;
-
-asm("CLCIN0PPS equ 0E28h");
-
-
-typedef union {
-struct {
-unsigned CLCIN0PPS :5;
-};
-} CLCIN0PPSbits_t;
-extern volatile CLCIN0PPSbits_t CLCIN0PPSbits @ 0xE28;
-
-# 8030
-extern volatile unsigned char CLCIN1PPS @ 0xE29;
-
-asm("CLCIN1PPS equ 0E29h");
-
-
-typedef union {
-struct {
-unsigned CLCIN1PPS :5;
-};
-} CLCIN1PPSbits_t;
-extern volatile CLCIN1PPSbits_t CLCIN1PPSbits @ 0xE29;
-
-# 8049
-extern volatile unsigned char CLCIN2PPS @ 0xE2A;
-
-asm("CLCIN2PPS equ 0E2Ah");
-
-
-typedef union {
-struct {
-unsigned CLCIN2PPS :5;
-};
-} CLCIN2PPSbits_t;
-extern volatile CLCIN2PPSbits_t CLCIN2PPSbits @ 0xE2A;
-
-# 8068
-extern volatile unsigned char CLCIN3PPS @ 0xE2B;
-
-asm("CLCIN3PPS equ 0E2Bh");
-
-
-typedef union {
-struct {
-unsigned CLCIN3PPS :5;
-};
-} CLCIN3PPSbits_t;
-extern volatile CLCIN3PPSbits_t CLCIN3PPSbits @ 0xE2B;
-
-# 8087
-extern volatile unsigned char RA0PPS @ 0xE90;
-
-asm("RA0PPS equ 0E90h");
-
-
-typedef union {
-struct {
-unsigned RA0PPS :5;
-};
-} RA0PPSbits_t;
-extern volatile RA0PPSbits_t RA0PPSbits @ 0xE90;
-
-# 8106
-extern volatile unsigned char RA1PPS @ 0xE91;
-
-asm("RA1PPS equ 0E91h");
-
-
-typedef union {
-struct {
-unsigned RA1PPS :5;
-};
-} RA1PPSbits_t;
-extern volatile RA1PPSbits_t RA1PPSbits @ 0xE91;
-
-# 8125
-extern volatile unsigned char RA2PPS @ 0xE92;
-
-asm("RA2PPS equ 0E92h");
-
-
-typedef union {
-struct {
-unsigned RA2PPS :5;
-};
-} RA2PPSbits_t;
-extern volatile RA2PPSbits_t RA2PPSbits @ 0xE92;
-
-# 8144
-extern volatile unsigned char RA4PPS @ 0xE94;
-
-asm("RA4PPS equ 0E94h");
-
-
-typedef union {
-struct {
-unsigned RA4PPS :5;
-};
-} RA4PPSbits_t;
-extern volatile RA4PPSbits_t RA4PPSbits @ 0xE94;
-
-# 8163
-extern volatile unsigned char RA5PPS @ 0xE95;
-
-asm("RA5PPS equ 0E95h");
-
-
-typedef union {
-struct {
-unsigned RA5PPS :5;
-};
-} RA5PPSbits_t;
-extern volatile RA5PPSbits_t RA5PPSbits @ 0xE95;
-
-# 8182
-extern volatile unsigned char RC0PPS @ 0xEA0;
-
-asm("RC0PPS equ 0EA0h");
-
-
-typedef union {
-struct {
-unsigned RC0PPS :5;
-};
-} RC0PPSbits_t;
-extern volatile RC0PPSbits_t RC0PPSbits @ 0xEA0;
-
-# 8201
-extern volatile unsigned char RC1PPS @ 0xEA1;
-
-asm("RC1PPS equ 0EA1h");
-
-
-typedef union {
-struct {
-unsigned RC1PPS :5;
-};
-} RC1PPSbits_t;
-extern volatile RC1PPSbits_t RC1PPSbits @ 0xEA1;
-
-# 8220
-extern volatile unsigned char RC2PPS @ 0xEA2;
-
-asm("RC2PPS equ 0EA2h");
-
-
-typedef union {
-struct {
-unsigned RC2PPS :5;
-};
-} RC2PPSbits_t;
-extern volatile RC2PPSbits_t RC2PPSbits @ 0xEA2;
-
-# 8239
-extern volatile unsigned char RC3PPS @ 0xEA3;
-
-asm("RC3PPS equ 0EA3h");
-
-
-typedef union {
-struct {
-unsigned RC3PPS :5;
-};
-} RC3PPSbits_t;
-extern volatile RC3PPSbits_t RC3PPSbits @ 0xEA3;
-
-# 8258
-extern volatile unsigned char RC4PPS @ 0xEA4;
-
-asm("RC4PPS equ 0EA4h");
-
-
-typedef union {
-struct {
-unsigned RC4PPS :5;
-};
-} RC4PPSbits_t;
-extern volatile RC4PPSbits_t RC4PPSbits @ 0xEA4;
-
-# 8277
-extern volatile unsigned char RC5PPS @ 0xEA5;
-
-asm("RC5PPS equ 0EA5h");
-
-
-typedef union {
-struct {
-unsigned RC5PPS :5;
-};
-} RC5PPSbits_t;
-extern volatile RC5PPSbits_t RC5PPSbits @ 0xEA5;
-
-# 8296
-extern volatile unsigned char CLCDATA @ 0xF0F;
-
-asm("CLCDATA equ 0F0Fh");
-
-
-typedef union {
-struct {
-unsigned MCLC1OUT :1;
-unsigned MCLC2OUT :1;
-unsigned MCLC3OUT :1;
-};
-} CLCDATAbits_t;
-extern volatile CLCDATAbits_t CLCDATAbits @ 0xF0F;
-
-# 8327
-extern volatile unsigned char CLC1CON @ 0xF10;
-
-asm("CLC1CON equ 0F10h");
-
-
-typedef union {
-struct {
-unsigned LC1MODE :3;
-unsigned LC1INTN :1;
-unsigned LC1INTP :1;
-unsigned LC1OUT :1;
-unsigned :1;
-unsigned LC1EN :1;
-};
-struct {
-unsigned LC1MODE0 :1;
-unsigned LC1MODE1 :1;
-unsigned LC1MODE2 :1;
-};
-struct {
-unsigned MODE :3;
-unsigned INTN :1;
-unsigned INTP :1;
-unsigned OUT :1;
-unsigned :1;
-unsigned EN :1;
-};
-struct {
-unsigned MODE0 :1;
-unsigned MODE1 :1;
-unsigned MODE2 :1;
-};
-} CLC1CONbits_t;
-extern volatile CLC1CONbits_t CLC1CONbits @ 0xF10;
-
-# 8444
-extern volatile unsigned char CLC1POL @ 0xF11;
-
-asm("CLC1POL equ 0F11h");
-
-
-typedef union {
-struct {
-unsigned LC1G1POL :1;
-unsigned LC1G2POL :1;
-unsigned LC1G3POL :1;
-unsigned LC1G4POL :1;
-unsigned :3;
-unsigned LC1POL :1;
-};
-struct {
-unsigned G1POL :1;
-unsigned G2POL :1;
-unsigned G3POL :1;
-unsigned G4POL :1;
-unsigned :3;
-unsigned POL :1;
-};
-} CLC1POLbits_t;
-extern volatile CLC1POLbits_t CLC1POLbits @ 0xF11;
-
-# 8521
-extern volatile unsigned char CLC1SEL0 @ 0xF12;
-
-asm("CLC1SEL0 equ 0F12h");
-
-
-typedef union {
-struct {
-unsigned LC1D1S0 :1;
-unsigned LC1D1S1 :1;
-unsigned LC1D1S2 :1;
-unsigned LC1D1S3 :1;
-unsigned LC1D1S4 :1;
-};
-struct {
-unsigned LC1D1S :8;
-};
-struct {
-unsigned D1S :8;
-};
-struct {
-unsigned D1S0 :1;
-unsigned D1S1 :1;
-unsigned D1S2 :1;
-unsigned D1S3 :1;
-unsigned D1S4 :1;
-};
-} CLC1SEL0bits_t;
-extern volatile CLC1SEL0bits_t CLC1SEL0bits @ 0xF12;
-
-# 8612
-extern volatile unsigned char CLC1SEL1 @ 0xF13;
-
-asm("CLC1SEL1 equ 0F13h");
-
-
-typedef union {
-struct {
-unsigned LC1D2S0 :1;
-unsigned LC1D2S1 :1;
-unsigned LC1D2S2 :1;
-unsigned LC1D2S3 :1;
-unsigned LC1D2S4 :1;
-};
-struct {
-unsigned LC1D2S :8;
-};
-struct {
-unsigned D2S :8;
-};
-struct {
-unsigned D2S0 :1;
-unsigned D2S1 :1;
-unsigned D2S2 :1;
-unsigned D2S3 :1;
-unsigned D2S4 :1;
-};
-} CLC1SEL1bits_t;
-extern volatile CLC1SEL1bits_t CLC1SEL1bits @ 0xF13;
-
-# 8703
-extern volatile unsigned char CLC1SEL2 @ 0xF14;
-
-asm("CLC1SEL2 equ 0F14h");
-
-
-typedef union {
-struct {
-unsigned LC1D3S0 :1;
-unsigned LC1D3S1 :1;
-unsigned LC1D3S2 :1;
-unsigned LC1D3S3 :1;
-unsigned LC1D3S4 :1;
-};
-struct {
-unsigned LC1D3S :8;
-};
-struct {
-unsigned D3S :8;
-};
-struct {
-unsigned D3S0 :1;
-unsigned D3S1 :1;
-unsigned D3S2 :1;
-unsigned D3S3 :1;
-unsigned D3S4 :1;
-};
-} CLC1SEL2bits_t;
-extern volatile CLC1SEL2bits_t CLC1SEL2bits @ 0xF14;
-
-# 8794
-extern volatile unsigned char CLC1SEL3 @ 0xF15;
-
-asm("CLC1SEL3 equ 0F15h");
-
-
-typedef union {
-struct {
-unsigned LC1D4S0 :1;
-unsigned LC1D4S1 :1;
-unsigned LC1D4S2 :1;
-unsigned LC1D4S3 :1;
-unsigned LC1D4S4 :1;
-};
-struct {
-unsigned LC1D4S :8;
-};
-struct {
-unsigned D4S :8;
-};
-struct {
-unsigned D4S0 :1;
-unsigned D4S1 :1;
-unsigned D4S2 :1;
-unsigned D4S3 :1;
-unsigned D4S4 :1;
-};
-} CLC1SEL3bits_t;
-extern volatile CLC1SEL3bits_t CLC1SEL3bits @ 0xF15;
-
-# 8885
-extern volatile unsigned char CLC1GLS0 @ 0xF16;
-
-asm("CLC1GLS0 equ 0F16h");
-
-
-typedef union {
-struct {
-unsigned LC1G1D1N :1;
-unsigned LC1G1D1T :1;
-unsigned LC1G1D2N :1;
-unsigned LC1G1D2T :1;
-unsigned LC1G1D3N :1;
-unsigned LC1G1D3T :1;
-unsigned LC1G1D4N :1;
-unsigned LC1G1D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC1GLS0bits_t;
-extern volatile CLC1GLS0bits_t CLC1GLS0bits @ 0xF16;
-
-# 8996
-extern volatile unsigned char CLC1GLS1 @ 0xF17;
-
-asm("CLC1GLS1 equ 0F17h");
-
-
-typedef union {
-struct {
-unsigned LC1G2D1N :1;
-unsigned LC1G2D1T :1;
-unsigned LC1G2D2N :1;
-unsigned LC1G2D2T :1;
-unsigned LC1G2D3N :1;
-unsigned LC1G2D3T :1;
-unsigned LC1G2D4N :1;
-unsigned LC1G2D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC1GLS1bits_t;
-extern volatile CLC1GLS1bits_t CLC1GLS1bits @ 0xF17;
-
-# 9107
-extern volatile unsigned char CLC1GLS2 @ 0xF18;
-
-asm("CLC1GLS2 equ 0F18h");
-
-
-typedef union {
-struct {
-unsigned LC1G3D1N :1;
-unsigned LC1G3D1T :1;
-unsigned LC1G3D2N :1;
-unsigned LC1G3D2T :1;
-unsigned LC1G3D3N :1;
-unsigned LC1G3D3T :1;
-unsigned LC1G3D4N :1;
-unsigned LC1G3D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC1GLS2bits_t;
-extern volatile CLC1GLS2bits_t CLC1GLS2bits @ 0xF18;
-
-# 9218
-extern volatile unsigned char CLC1GLS3 @ 0xF19;
-
-asm("CLC1GLS3 equ 0F19h");
-
-
-typedef union {
-struct {
-unsigned LC1G4D1N :1;
-unsigned LC1G4D1T :1;
-unsigned LC1G4D2N :1;
-unsigned LC1G4D2T :1;
-unsigned LC1G4D3N :1;
-unsigned LC1G4D3T :1;
-unsigned LC1G4D4N :1;
-unsigned LC1G4D4T :1;
-};
-struct {
-unsigned G4D1N :1;
-unsigned G4D1T :1;
-unsigned G4D2N :1;
-unsigned G4D2T :1;
-unsigned G4D3N :1;
-unsigned G4D3T :1;
-unsigned G4D4N :1;
-unsigned G4D4T :1;
-};
-} CLC1GLS3bits_t;
-extern volatile CLC1GLS3bits_t CLC1GLS3bits @ 0xF19;
-
-# 9329
-extern volatile unsigned char CLC2CON @ 0xF1A;
-
-asm("CLC2CON equ 0F1Ah");
-
-
-typedef union {
-struct {
-unsigned LC2MODE :3;
-unsigned LC2INTN :1;
-unsigned LC2INTP :1;
-unsigned LC2OUT :1;
-unsigned :1;
-unsigned LC2EN :1;
-};
-struct {
-unsigned LC2MODE0 :1;
-unsigned LC2MODE1 :1;
-unsigned LC2MODE2 :1;
-};
-struct {
-unsigned MODE :3;
-unsigned INTN :1;
-unsigned INTP :1;
-unsigned OUT :1;
-unsigned :1;
-unsigned EN :1;
-};
-struct {
-unsigned MODE0 :1;
-unsigned MODE1 :1;
-unsigned MODE2 :1;
-};
-} CLC2CONbits_t;
-extern volatile CLC2CONbits_t CLC2CONbits @ 0xF1A;
-
-# 9446
-extern volatile unsigned char CLC2POL @ 0xF1B;
-
-asm("CLC2POL equ 0F1Bh");
-
-
-typedef union {
-struct {
-unsigned LC2G1POL :1;
-unsigned LC2G2POL :1;
-unsigned LC2G3POL :1;
-unsigned LC2G4POL :1;
-unsigned :3;
-unsigned LC2POL :1;
-};
-struct {
-unsigned G1POL :1;
-unsigned G2POL :1;
-unsigned G3POL :1;
-unsigned G4POL :1;
-unsigned :3;
-unsigned POL :1;
-};
-} CLC2POLbits_t;
-extern volatile CLC2POLbits_t CLC2POLbits @ 0xF1B;
-
-# 9523
-extern volatile unsigned char CLC2SEL0 @ 0xF1C;
-
-asm("CLC2SEL0 equ 0F1Ch");
-
-
-typedef union {
-struct {
-unsigned LC2D1S0 :1;
-unsigned LC2D1S1 :1;
-unsigned LC2D1S2 :1;
-unsigned LC2D1S3 :1;
-unsigned LC2D1S4 :1;
-};
-struct {
-unsigned LC2D1S :8;
-};
-struct {
-unsigned D1S :8;
-};
-struct {
-unsigned D1S0 :1;
-unsigned D1S1 :1;
-unsigned D1S2 :1;
-unsigned D1S3 :1;
-unsigned D1S4 :1;
-};
-} CLC2SEL0bits_t;
-extern volatile CLC2SEL0bits_t CLC2SEL0bits @ 0xF1C;
-
-# 9614
-extern volatile unsigned char CLC2SEL1 @ 0xF1D;
-
-asm("CLC2SEL1 equ 0F1Dh");
-
-
-typedef union {
-struct {
-unsigned LC2D2S0 :1;
-unsigned LC2D2S1 :1;
-unsigned LC2D2S2 :1;
-unsigned LC2D2S3 :1;
-unsigned LC2D2S4 :1;
-};
-struct {
-unsigned LC2D2S :8;
-};
-struct {
-unsigned D2S :8;
-};
-struct {
-unsigned D2S0 :1;
-unsigned D2S1 :1;
-unsigned D2S2 :1;
-unsigned D2S3 :1;
-unsigned D2S4 :1;
-};
-} CLC2SEL1bits_t;
-extern volatile CLC2SEL1bits_t CLC2SEL1bits @ 0xF1D;
-
-# 9705
-extern volatile unsigned char CLC2SEL2 @ 0xF1E;
-
-asm("CLC2SEL2 equ 0F1Eh");
-
-
-typedef union {
-struct {
-unsigned LC2D3S0 :1;
-unsigned LC2D3S1 :1;
-unsigned LC2D3S2 :1;
-unsigned LC2D3S3 :1;
-unsigned LC2D3S4 :1;
-};
-struct {
-unsigned LC2D3S :8;
-};
-struct {
-unsigned D3S :8;
-};
-struct {
-unsigned D3S0 :1;
-unsigned D3S1 :1;
-unsigned D3S2 :1;
-unsigned D3S3 :1;
-unsigned D3S4 :1;
-};
-} CLC2SEL2bits_t;
-extern volatile CLC2SEL2bits_t CLC2SEL2bits @ 0xF1E;
-
-# 9796
-extern volatile unsigned char CLC2SEL3 @ 0xF1F;
-
-asm("CLC2SEL3 equ 0F1Fh");
-
-
-typedef union {
-struct {
-unsigned LC2D4S0 :1;
-unsigned LC2D4S1 :1;
-unsigned LC2D4S2 :1;
-unsigned LC2D4S3 :1;
-unsigned LC2D4S4 :1;
-};
-struct {
-unsigned LC2D4S :8;
-};
-struct {
-unsigned D4S :8;
-};
-struct {
-unsigned D4S0 :1;
-unsigned D4S1 :1;
-unsigned D4S2 :1;
-unsigned D4S3 :1;
-unsigned D4S4 :1;
-};
-} CLC2SEL3bits_t;
-extern volatile CLC2SEL3bits_t CLC2SEL3bits @ 0xF1F;
-
-# 9887
-extern volatile unsigned char CLC2GLS0 @ 0xF20;
-
-asm("CLC2GLS0 equ 0F20h");
-
-
-typedef union {
-struct {
-unsigned LC2G1D1N :1;
-unsigned LC2G1D1T :1;
-unsigned LC2G1D2N :1;
-unsigned LC2G1D2T :1;
-unsigned LC2G1D3N :1;
-unsigned LC2G1D3T :1;
-unsigned LC2G1D4N :1;
-unsigned LC2G1D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC2GLS0bits_t;
-extern volatile CLC2GLS0bits_t CLC2GLS0bits @ 0xF20;
-
-# 9998
-extern volatile unsigned char CLC2GLS1 @ 0xF21;
-
-asm("CLC2GLS1 equ 0F21h");
-
-
-typedef union {
-struct {
-unsigned LC2G2D1N :1;
-unsigned LC2G2D1T :1;
-unsigned LC2G2D2N :1;
-unsigned LC2G2D2T :1;
-unsigned LC2G2D3N :1;
-unsigned LC2G2D3T :1;
-unsigned LC2G2D4N :1;
-unsigned LC2G2D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC2GLS1bits_t;
-extern volatile CLC2GLS1bits_t CLC2GLS1bits @ 0xF21;
-
-# 10109
-extern volatile unsigned char CLC2GLS2 @ 0xF22;
-
-asm("CLC2GLS2 equ 0F22h");
-
-
-typedef union {
-struct {
-unsigned LC2G3D1N :1;
-unsigned LC2G3D1T :1;
-unsigned LC2G3D2N :1;
-unsigned LC2G3D2T :1;
-unsigned LC2G3D3N :1;
-unsigned LC2G3D3T :1;
-unsigned LC2G3D4N :1;
-unsigned LC2G3D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC2GLS2bits_t;
-extern volatile CLC2GLS2bits_t CLC2GLS2bits @ 0xF22;
-
-# 10220
-extern volatile unsigned char CLC2GLS3 @ 0xF23;
-
-asm("CLC2GLS3 equ 0F23h");
-
-
-typedef union {
-struct {
-unsigned LC2G4D1N :1;
-unsigned LC2G4D1T :1;
-unsigned LC2G4D2N :1;
-unsigned LC2G4D2T :1;
-unsigned LC2G4D3N :1;
-unsigned LC2G4D3T :1;
-unsigned LC2G4D4N :1;
-unsigned LC2G4D4T :1;
-};
-struct {
-unsigned G4D1N :1;
-unsigned G4D1T :1;
-unsigned G4D2N :1;
-unsigned G4D2T :1;
-unsigned G4D3N :1;
-unsigned G4D3T :1;
-unsigned G4D4N :1;
-unsigned G4D4T :1;
-};
-} CLC2GLS3bits_t;
-extern volatile CLC2GLS3bits_t CLC2GLS3bits @ 0xF23;
-
-# 10331
-extern volatile unsigned char CLC3CON @ 0xF24;
-
-asm("CLC3CON equ 0F24h");
-
-
-typedef union {
-struct {
-unsigned LC3MODE :3;
-unsigned LC3INTN :1;
-unsigned LC3INTP :1;
-unsigned LC3OUT :1;
-unsigned :1;
-unsigned LC3EN :1;
-};
-struct {
-unsigned LC3MODE0 :1;
-unsigned LC3MODE1 :1;
-unsigned LC3MODE2 :1;
-};
-struct {
-unsigned MODE :3;
-unsigned INTN :1;
-unsigned INTP :1;
-unsigned OUT :1;
-unsigned :1;
-unsigned EN :1;
-};
-struct {
-unsigned MODE0 :1;
-unsigned MODE1 :1;
-unsigned MODE2 :1;
-};
-} CLC3CONbits_t;
-extern volatile CLC3CONbits_t CLC3CONbits @ 0xF24;
-
-# 10448
-extern volatile unsigned char CLC3POL @ 0xF25;
-
-asm("CLC3POL equ 0F25h");
-
-
-typedef union {
-struct {
-unsigned LC3G1POL :1;
-unsigned LC3G2POL :1;
-unsigned LC3G3POL :1;
-unsigned LC3G4POL :1;
-unsigned :3;
-unsigned LC3POL :1;
-};
-struct {
-unsigned G1POL :1;
-unsigned G2POL :1;
-unsigned G3POL :1;
-unsigned G4POL :1;
-unsigned :3;
-unsigned POL :1;
-};
-} CLC3POLbits_t;
-extern volatile CLC3POLbits_t CLC3POLbits @ 0xF25;
-
-# 10525
-extern volatile unsigned char CLC3SEL0 @ 0xF26;
-
-asm("CLC3SEL0 equ 0F26h");
-
-
-typedef union {
-struct {
-unsigned LC3D1S0 :1;
-unsigned LC3D1S1 :1;
-unsigned LC3D1S2 :1;
-unsigned LC3D1S3 :1;
-unsigned LC3D1S4 :1;
-};
-struct {
-unsigned LC3D1S :8;
-};
-struct {
-unsigned D1S :8;
-};
-struct {
-unsigned D1S0 :1;
-unsigned D1S1 :1;
-unsigned D1S2 :1;
-unsigned D1S3 :1;
-unsigned D1S4 :1;
-};
-} CLC3SEL0bits_t;
-extern volatile CLC3SEL0bits_t CLC3SEL0bits @ 0xF26;
-
-# 10616
-extern volatile unsigned char CLC3SEL1 @ 0xF27;
-
-asm("CLC3SEL1 equ 0F27h");
-
-
-typedef union {
-struct {
-unsigned LC3D2S0 :1;
-unsigned LC3D2S1 :1;
-unsigned LC3D2S2 :1;
-unsigned LC3D2S3 :1;
-unsigned LC3D2S4 :1;
-};
-struct {
-unsigned LC3D2S :8;
-};
-struct {
-unsigned D2S :8;
-};
-struct {
-unsigned D2S0 :1;
-unsigned D2S1 :1;
-unsigned D2S2 :1;
-unsigned D2S3 :1;
-unsigned D2S4 :1;
-};
-} CLC3SEL1bits_t;
-extern volatile CLC3SEL1bits_t CLC3SEL1bits @ 0xF27;
-
-# 10707
-extern volatile unsigned char CLC3SEL2 @ 0xF28;
-
-asm("CLC3SEL2 equ 0F28h");
-
-
-typedef union {
-struct {
-unsigned LC3D3S0 :1;
-unsigned LC3D3S1 :1;
-unsigned LC3D3S2 :1;
-unsigned LC3D3S3 :1;
-unsigned LC3D3S4 :1;
-};
-struct {
-unsigned LC3D3S :8;
-};
-struct {
-unsigned D3S :8;
-};
-struct {
-unsigned D3S0 :1;
-unsigned D3S1 :1;
-unsigned D3S2 :1;
-unsigned D3S3 :1;
-unsigned D3S4 :1;
-};
-} CLC3SEL2bits_t;
-extern volatile CLC3SEL2bits_t CLC3SEL2bits @ 0xF28;
-
-# 10798
-extern volatile unsigned char CLC3SEL3 @ 0xF29;
-
-asm("CLC3SEL3 equ 0F29h");
-
-
-typedef union {
-struct {
-unsigned LC3D4S0 :1;
-unsigned LC3D4S1 :1;
-unsigned LC3D4S2 :1;
-unsigned LC3D4S3 :1;
-unsigned LC3D4S4 :1;
-};
-struct {
-unsigned LC3D4S :8;
-};
-struct {
-unsigned D4S :8;
-};
-struct {
-unsigned D4S0 :1;
-unsigned D4S1 :1;
-unsigned D4S2 :1;
-unsigned D4S3 :1;
-unsigned D4S4 :1;
-};
-} CLC3SEL3bits_t;
-extern volatile CLC3SEL3bits_t CLC3SEL3bits @ 0xF29;
-
-# 10889
-extern volatile unsigned char CLC3GLS0 @ 0xF2A;
-
-asm("CLC3GLS0 equ 0F2Ah");
-
-
-typedef union {
-struct {
-unsigned LC3G1D1N :1;
-unsigned LC3G1D1T :1;
-unsigned LC3G1D2N :1;
-unsigned LC3G1D2T :1;
-unsigned LC3G1D3N :1;
-unsigned LC3G1D3T :1;
-unsigned LC3G1D4N :1;
-unsigned LC3G1D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC3GLS0bits_t;
-extern volatile CLC3GLS0bits_t CLC3GLS0bits @ 0xF2A;
-
-# 11000
-extern volatile unsigned char CLC3GLS1 @ 0xF2B;
-
-asm("CLC3GLS1 equ 0F2Bh");
-
-
-typedef union {
-struct {
-unsigned LC3G2D1N :1;
-unsigned LC3G2D1T :1;
-unsigned LC3G2D2N :1;
-unsigned LC3G2D2T :1;
-unsigned LC3G2D3N :1;
-unsigned LC3G2D3T :1;
-unsigned LC3G2D4N :1;
-unsigned LC3G2D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC3GLS1bits_t;
-extern volatile CLC3GLS1bits_t CLC3GLS1bits @ 0xF2B;
-
-# 11111
-extern volatile unsigned char CLC3GLS2 @ 0xF2C;
-
-asm("CLC3GLS2 equ 0F2Ch");
-
-
-typedef union {
-struct {
-unsigned LC3G3D1N :1;
-unsigned LC3G3D1T :1;
-unsigned LC3G3D2N :1;
-unsigned LC3G3D2T :1;
-unsigned LC3G3D3N :1;
-unsigned LC3G3D3T :1;
-unsigned LC3G3D4N :1;
-unsigned LC3G3D4T :1;
-};
-struct {
-unsigned D1N :1;
-unsigned D1T :1;
-unsigned D2N :1;
-unsigned D2T :1;
-unsigned D3N :1;
-unsigned D3T :1;
-unsigned D4N :1;
-unsigned D4T :1;
-};
-} CLC3GLS2bits_t;
-extern volatile CLC3GLS2bits_t CLC3GLS2bits @ 0xF2C;
-
-# 11222
-extern volatile unsigned char CLC3GLS3 @ 0xF2D;
-
-asm("CLC3GLS3 equ 0F2Dh");
-
-
-typedef union {
-struct {
-unsigned LC3G4D1N :1;
-unsigned LC3G4D1T :1;
-unsigned LC3G4D2N :1;
-unsigned LC3G4D2T :1;
-unsigned LC3G4D3N :1;
-unsigned LC3G4D3T :1;
-unsigned LC3G4D4N :1;
-unsigned LC3G4D4T :1;
-};
-struct {
-unsigned G4D1N :1;
-unsigned G4D1T :1;
-unsigned G4D2N :1;
-unsigned G4D2T :1;
-unsigned G4D3N :1;
-unsigned G4D3T :1;
-unsigned G4D4N :1;
-unsigned G4D4T :1;
-};
-} CLC3GLS3bits_t;
-extern volatile CLC3GLS3bits_t CLC3GLS3bits @ 0xF2D;
-
-# 11333
-extern volatile unsigned char STATUS_SHAD @ 0xFE4;
-
-asm("STATUS_SHAD equ 0FE4h");
-
-
-typedef union {
-struct {
-unsigned C_SHAD :1;
-unsigned DC_SHAD :1;
-unsigned Z_SHAD :1;
-};
-} STATUS_SHADbits_t;
-extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
-
-# 11364
-extern volatile unsigned char WREG_SHAD @ 0xFE5;
-
-asm("WREG_SHAD equ 0FE5h");
-
-
-typedef union {
-struct {
-unsigned WREG_SHAD :8;
-};
-} WREG_SHADbits_t;
-extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
-
-# 11383
-extern volatile unsigned char BSR_SHAD @ 0xFE6;
-
-asm("BSR_SHAD equ 0FE6h");
-
-
-typedef union {
-struct {
-unsigned BSR_SHAD :5;
-};
-} BSR_SHADbits_t;
-extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
-
-# 11402
-extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
-
-asm("PCLATH_SHAD equ 0FE7h");
-
-
-typedef union {
-struct {
-unsigned PCLATH_SHAD :7;
-};
-} PCLATH_SHADbits_t;
-extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
-
-# 11421
-extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
-
-asm("FSR0L_SHAD equ 0FE8h");
-
-
-typedef union {
-struct {
-unsigned FSR0L_SHAD :8;
-};
-} FSR0L_SHADbits_t;
-extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
-
-# 11440
-extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
-
-asm("FSR0H_SHAD equ 0FE9h");
-
-
-typedef union {
-struct {
-unsigned FSR0H_SHAD :8;
-};
-} FSR0H_SHADbits_t;
-extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
-
-# 11459
-extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
-
-asm("FSR1L_SHAD equ 0FEAh");
-
-
-typedef union {
-struct {
-unsigned FSR1L_SHAD :8;
-};
-} FSR1L_SHADbits_t;
-extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
-
-# 11478
-extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
-
-asm("FSR1H_SHAD equ 0FEBh");
-
-
-typedef union {
-struct {
-unsigned FSR1H_SHAD :8;
-};
-} FSR1H_SHADbits_t;
-extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
-
-# 11497
-extern volatile unsigned char STKPTR @ 0xFED;
-
-asm("STKPTR equ 0FEDh");
-
-
-typedef union {
-struct {
-unsigned STKPTR :5;
-};
-} STKPTRbits_t;
-extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
-
-# 11516
-extern volatile unsigned char TOSL @ 0xFEE;
-
-asm("TOSL equ 0FEEh");
-
-
-typedef union {
-struct {
-unsigned TOSL :8;
-};
-} TOSLbits_t;
-extern volatile TOSLbits_t TOSLbits @ 0xFEE;
-
-# 11535
-extern volatile unsigned char TOSH @ 0xFEF;
-
-asm("TOSH equ 0FEFh");
-
-
-typedef union {
-struct {
-unsigned TOSH :7;
-};
-} TOSHbits_t;
-extern volatile TOSHbits_t TOSHbits @ 0xFEF;
-
-# 11560
-extern volatile __bit ABDEN @ (((unsigned) &BAUD1CON)*8) + 0;
-
-extern volatile __bit ABDOVF @ (((unsigned) &BAUD1CON)*8) + 7;
-
-extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
-
-extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
-
-extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
-
-extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
-
-extern volatile __bit ADD0 @ (((unsigned) &SSP1ADD)*8) + 0;
-
-extern volatile __bit ADD1 @ (((unsigned) &SSP1ADD)*8) + 1;
-
-extern volatile __bit ADD2 @ (((unsigned) &SSP1ADD)*8) + 2;
-
-extern volatile __bit ADD3 @ (((unsigned) &SSP1ADD)*8) + 3;
-
-extern volatile __bit ADD4 @ (((unsigned) &SSP1ADD)*8) + 4;
-
-extern volatile __bit ADD5 @ (((unsigned) &SSP1ADD)*8) + 5;
-
-extern volatile __bit ADD6 @ (((unsigned) &SSP1ADD)*8) + 6;
-
-extern volatile __bit ADD7 @ (((unsigned) &SSP1ADD)*8) + 7;
-
-extern volatile __bit ADDEN @ (((unsigned) &RC1STA)*8) + 3;
-
-extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
-
-extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
-
-extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
-
-extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
-
-extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
-
-extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
-
-extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
-
-extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
-
-extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
-
-extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
-
-extern volatile __bit ANS5 @ (((unsigned) &ANSELA)*8) + 5;
-
-extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
-
-extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
-
-extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
-
-extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
-
-extern volatile __bit ANSC0 @ (((unsigned) &ANSELC)*8) + 0;
-
-extern volatile __bit ANSC1 @ (((unsigned) &ANSELC)*8) + 1;
-
-extern volatile __bit ANSC2 @ (((unsigned) &ANSELC)*8) + 2;
-
-extern volatile __bit ANSC3 @ (((unsigned) &ANSELC)*8) + 3;
-
-extern volatile __bit ANSC4 @ (((unsigned) &ANSELC)*8) + 4;
-
-extern volatile __bit ANSC5 @ (((unsigned) &ANSELC)*8) + 5;
-
-extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
-
-extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
-
-extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
-
-extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
-
-extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
-
-extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
-
-extern volatile __bit BRG16 @ (((unsigned) &BAUD1CON)*8) + 3;
-
-extern volatile __bit BRGH @ (((unsigned) &TX1STA)*8) + 2;
-
-extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
-
-extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
-
-extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
-
-extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
-
-extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
-
-extern volatile __bit BUF0 @ (((unsigned) &SSP1BUF)*8) + 0;
-
-extern volatile __bit BUF1 @ (((unsigned) &SSP1BUF)*8) + 1;
-
-extern volatile __bit BUF2 @ (((unsigned) &SSP1BUF)*8) + 2;
-
-extern volatile __bit BUF3 @ (((unsigned) &SSP1BUF)*8) + 3;
-
-extern volatile __bit BUF4 @ (((unsigned) &SSP1BUF)*8) + 4;
-
-extern volatile __bit BUF5 @ (((unsigned) &SSP1BUF)*8) + 5;
-
-extern volatile __bit BUF6 @ (((unsigned) &SSP1BUF)*8) + 6;
-
-extern volatile __bit BUF7 @ (((unsigned) &SSP1BUF)*8) + 7;
-
-extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
-
-extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
-
-extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
-
-extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
-
-extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
-
-extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
-
-extern volatile __bit C1NCH1 @ (((unsigned) &CM1CON1)*8) + 1;
-
-extern volatile __bit C1NCH2 @ (((unsigned) &CM1CON1)*8) + 2;
-
-extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
-
-extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
-
-extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 3;
-
-extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 4;
-
-extern volatile __bit C1PCH2 @ (((unsigned) &CM1CON1)*8) + 5;
-
-extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
-
-extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
-
-extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
-
-extern volatile __bit C1TSEL0 @ (((unsigned) &CCPTMRS)*8) + 0;
-
-extern volatile __bit C1TSEL1 @ (((unsigned) &CCPTMRS)*8) + 1;
-
-extern volatile __bit C1ZLF @ (((unsigned) &CM1CON0)*8) + 3;
-
-extern volatile __bit C2HYS @ (((unsigned) &CM2CON0)*8) + 1;
-
-extern volatile __bit C2IE @ (((unsigned) &PIE2)*8) + 6;
-
-extern volatile __bit C2IF @ (((unsigned) &PIR2)*8) + 6;
-
-extern volatile __bit C2INTN @ (((unsigned) &CM2CON1)*8) + 6;
-
-extern volatile __bit C2INTP @ (((unsigned) &CM2CON1)*8) + 7;
-
-extern volatile __bit C2NCH0 @ (((unsigned) &CM2CON1)*8) + 0;
-
-extern volatile __bit C2NCH1 @ (((unsigned) &CM2CON1)*8) + 1;
-
-extern volatile __bit C2NCH2 @ (((unsigned) &CM2CON1)*8) + 2;
-
-extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 7;
-
-extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 6;
-
-extern volatile __bit C2PCH0 @ (((unsigned) &CM2CON1)*8) + 3;
-
-extern volatile __bit C2PCH1 @ (((unsigned) &CM2CON1)*8) + 4;
-
-extern volatile __bit C2PCH2 @ (((unsigned) &CM2CON1)*8) + 5;
-
-extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 4;
-
-extern volatile __bit C2SP @ (((unsigned) &CM2CON0)*8) + 2;
-
-extern volatile __bit C2SYNC @ (((unsigned) &CM2CON0)*8) + 0;
-
-extern volatile __bit C2TSEL0 @ (((unsigned) &CCPTMRS)*8) + 2;
-
-extern volatile __bit C2TSEL1 @ (((unsigned) &CCPTMRS)*8) + 3;
-
-extern volatile __bit C2ZLF @ (((unsigned) &CM2CON0)*8) + 3;
-
-extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
-
-extern volatile __bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
-
-extern volatile __bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
-
-extern volatile __bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
-
-extern volatile __bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
-
-extern volatile __bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
-
-extern volatile __bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
-
-extern volatile __bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
-
-extern volatile __bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
-
-extern volatile __bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
-
-extern volatile __bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
-
-extern volatile __bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
-
-extern volatile __bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
-
-extern volatile __bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
-
-extern volatile __bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
-
-extern volatile __bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
-
-extern volatile __bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
-
-extern volatile __bit CCPIE @ (((unsigned) &PIE1)*8) + 2;
-
-extern volatile __bit CCPIF @ (((unsigned) &PIR1)*8) + 2;
-
-extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
-
-extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
-
-extern volatile __bit CFGS @ (((unsigned) &PMCON1)*8) + 6;
-
-extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
-
-extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
-
-extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
-
-extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
-
-extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
-
-extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
-
-extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
-
-extern volatile __bit CLC1IE @ (((unsigned) &PIE3)*8) + 0;
-
-extern volatile __bit CLC1IF @ (((unsigned) &PIR3)*8) + 0;
-
-extern volatile __bit CLC2IE @ (((unsigned) &PIE3)*8) + 1;
-
-extern volatile __bit CLC2IF @ (((unsigned) &PIR3)*8) + 1;
-
-extern volatile __bit CLC3IE @ (((unsigned) &PIE3)*8) + 2;
-
-extern volatile __bit CLC3IF @ (((unsigned) &PIR3)*8) + 2;
-
-extern volatile __bit COGIE @ (((unsigned) &PIE3)*8) + 5;
-
-extern volatile __bit COGIF @ (((unsigned) &PIR3)*8) + 5;
-
-extern volatile __bit CREN @ (((unsigned) &RC1STA)*8) + 4;
-
-extern volatile __bit CSRC @ (((unsigned) &TX1STA)*8) + 7;
-
-extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
-
-extern volatile __bit DAC1EN @ (((unsigned) &DAC1CON0)*8) + 7;
-
-extern volatile __bit DAC1NSS @ (((unsigned) &DAC1CON0)*8) + 0;
-
-extern volatile __bit DAC1OE1 @ (((unsigned) &DAC1CON0)*8) + 5;
-
-extern volatile __bit DAC1OE2 @ (((unsigned) &DAC1CON0)*8) + 4;
-
-extern volatile __bit DAC1PSS0 @ (((unsigned) &DAC1CON0)*8) + 2;
-
-extern volatile __bit DAC1PSS1 @ (((unsigned) &DAC1CON0)*8) + 3;
-
-extern volatile __bit DAC1R0 @ (((unsigned) &DAC1CON1)*8) + 0;
-
-extern volatile __bit DAC1R1 @ (((unsigned) &DAC1CON1)*8) + 1;
-
-extern volatile __bit DAC1R2 @ (((unsigned) &DAC1CON1)*8) + 2;
-
-extern volatile __bit DAC1R3 @ (((unsigned) &DAC1CON1)*8) + 3;
-
-extern volatile __bit DAC1R4 @ (((unsigned) &DAC1CON1)*8) + 4;
-
-extern volatile __bit DAC1R5 @ (((unsigned) &DAC1CON1)*8) + 5;
-
-extern volatile __bit DAC1R6 @ (((unsigned) &DAC1CON1)*8) + 6;
-
-extern volatile __bit DAC1R7 @ (((unsigned) &DAC1CON1)*8) + 7;
-
-extern volatile __bit DACEN @ (((unsigned) &DAC1CON0)*8) + 7;
-
-extern volatile __bit DACNSS @ (((unsigned) &DAC1CON0)*8) + 0;
-
-extern volatile __bit DACOE0 @ (((unsigned) &DAC1CON0)*8) + 4;
-
-extern volatile __bit DACOE1 @ (((unsigned) &DAC1CON0)*8) + 5;
-
-extern volatile __bit DACPSS0 @ (((unsigned) &DAC1CON0)*8) + 2;
-
-extern volatile __bit DACPSS1 @ (((unsigned) &DAC1CON0)*8) + 3;
-
-extern volatile __bit DACR0 @ (((unsigned) &DAC1CON1)*8) + 0;
-
-extern volatile __bit DACR1 @ (((unsigned) &DAC1CON1)*8) + 1;
-
-extern volatile __bit DACR2 @ (((unsigned) &DAC1CON1)*8) + 2;
-
-extern volatile __bit DACR3 @ (((unsigned) &DAC1CON1)*8) + 3;
-
-extern volatile __bit DACR4 @ (((unsigned) &DAC1CON1)*8) + 4;
-
-extern volatile __bit DACR5 @ (((unsigned) &DAC1CON1)*8) + 5;
-
-extern volatile __bit DACR6 @ (((unsigned) &DAC1CON1)*8) + 6;
-
-extern volatile __bit DACR7 @ (((unsigned) &DAC1CON1)*8) + 7;
-
-extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
-
-extern volatile __bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
-
-extern volatile __bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
-
-extern volatile __bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
-
-extern volatile __bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
-
-extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
-
-extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
-
-extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
-
-extern volatile __bit FERR @ (((unsigned) &RC1STA)*8) + 2;
-
-extern volatile __bit FREE @ (((unsigned) &PMCON1)*8) + 4;
-
-extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
-
-extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
-
-extern volatile __bit G1ARSEN @ (((unsigned) &COG1ASD0)*8) + 6;
-
-extern volatile __bit G1AS0E @ (((unsigned) &COG1ASD1)*8) + 0;
-
-extern volatile __bit G1AS1E @ (((unsigned) &COG1ASD1)*8) + 1;
-
-extern volatile __bit G1AS2E @ (((unsigned) &COG1ASD1)*8) + 2;
-
-extern volatile __bit G1AS3E @ (((unsigned) &COG1ASD1)*8) + 3;
-
-extern volatile __bit G1ASDAC0 @ (((unsigned) &COG1ASD0)*8) + 2;
-
-extern volatile __bit G1ASDAC1 @ (((unsigned) &COG1ASD0)*8) + 3;
-
-extern volatile __bit G1ASDBD0 @ (((unsigned) &COG1ASD0)*8) + 4;
-
-extern volatile __bit G1ASDBD1 @ (((unsigned) &COG1ASD0)*8) + 5;
-
-extern volatile __bit G1ASE @ (((unsigned) &COG1ASD0)*8) + 7;
-
-extern volatile __bit G1BLKF0 @ (((unsigned) &COG1BLKF)*8) + 0;
-
-extern volatile __bit G1BLKF1 @ (((unsigned) &COG1BLKF)*8) + 1;
-
-extern volatile __bit G1BLKF2 @ (((unsigned) &COG1BLKF)*8) + 2;
-
-extern volatile __bit G1BLKF3 @ (((unsigned) &COG1BLKF)*8) + 3;
-
-extern volatile __bit G1BLKF4 @ (((unsigned) &COG1BLKF)*8) + 4;
-
-extern volatile __bit G1BLKF5 @ (((unsigned) &COG1BLKF)*8) + 5;
-
-extern volatile __bit G1BLKR0 @ (((unsigned) &COG1BLKR)*8) + 0;
-
-extern volatile __bit G1BLKR1 @ (((unsigned) &COG1BLKR)*8) + 1;
-
-extern volatile __bit G1BLKR2 @ (((unsigned) &COG1BLKR)*8) + 2;
-
-extern volatile __bit G1BLKR3 @ (((unsigned) &COG1BLKR)*8) + 3;
-
-extern volatile __bit G1BLKR4 @ (((unsigned) &COG1BLKR)*8) + 4;
-
-extern volatile __bit G1BLKR5 @ (((unsigned) &COG1BLKR)*8) + 5;
-
-extern volatile __bit G1CS0 @ (((unsigned) &COG1CON0)*8) + 3;
-
-extern volatile __bit G1CS1 @ (((unsigned) &COG1CON0)*8) + 4;
-
-extern volatile __bit G1DBF0 @ (((unsigned) &COG1DBF)*8) + 0;
-
-extern volatile __bit G1DBF1 @ (((unsigned) &COG1DBF)*8) + 1;
-
-extern volatile __bit G1DBF2 @ (((unsigned) &COG1DBF)*8) + 2;
-
-extern volatile __bit G1DBF3 @ (((unsigned) &COG1DBF)*8) + 3;
-
-extern volatile __bit G1DBF4 @ (((unsigned) &COG1DBF)*8) + 4;
-
-extern volatile __bit G1DBF5 @ (((unsigned) &COG1DBF)*8) + 5;
-
-extern volatile __bit G1DBR0 @ (((unsigned) &COG1DBR)*8) + 0;
-
-extern volatile __bit G1DBR1 @ (((unsigned) &COG1DBR)*8) + 1;
-
-extern volatile __bit G1DBR2 @ (((unsigned) &COG1DBR)*8) + 2;
-
-extern volatile __bit G1DBR3 @ (((unsigned) &COG1DBR)*8) + 3;
-
-extern volatile __bit G1DBR4 @ (((unsigned) &COG1DBR)*8) + 4;
-
-extern volatile __bit G1DBR5 @ (((unsigned) &COG1DBR)*8) + 5;
-
-extern volatile __bit G1EN @ (((unsigned) &COG1CON0)*8) + 7;
-
-extern volatile __bit G1FDBS @ (((unsigned) &COG1CON1)*8) + 6;
-
-extern volatile __bit G1FIS0 @ (((unsigned) &COG1FIS)*8) + 0;
-
-extern volatile __bit G1FIS1 @ (((unsigned) &COG1FIS)*8) + 1;
-
-extern volatile __bit G1FIS2 @ (((unsigned) &COG1FIS)*8) + 2;
-
-extern volatile __bit G1FIS3 @ (((unsigned) &COG1FIS)*8) + 3;
-
-extern volatile __bit G1FIS4 @ (((unsigned) &COG1FIS)*8) + 4;
-
-extern volatile __bit G1FIS5 @ (((unsigned) &COG1FIS)*8) + 5;
-
-extern volatile __bit G1FIS6 @ (((unsigned) &COG1FIS)*8) + 6;
-
-extern volatile __bit G1FSIM0 @ (((unsigned) &COG1FSIM)*8) + 0;
-
-extern volatile __bit G1FSIM1 @ (((unsigned) &COG1FSIM)*8) + 1;
-
-extern volatile __bit G1FSIM2 @ (((unsigned) &COG1FSIM)*8) + 2;
-
-extern volatile __bit G1FSIM3 @ (((unsigned) &COG1FSIM)*8) + 3;
-
-extern volatile __bit G1FSIM4 @ (((unsigned) &COG1FSIM)*8) + 4;
-
-extern volatile __bit G1FSIM5 @ (((unsigned) &COG1FSIM)*8) + 5;
-
-extern volatile __bit G1FSIM6 @ (((unsigned) &COG1FSIM)*8) + 6;
-
-extern volatile __bit G1LD @ (((unsigned) &COG1CON0)*8) + 6;
-
-extern volatile __bit G1MD0 @ (((unsigned) &COG1CON0)*8) + 0;
-
-extern volatile __bit G1MD1 @ (((unsigned) &COG1CON0)*8) + 1;
-
-extern volatile __bit G1MD2 @ (((unsigned) &COG1CON0)*8) + 2;
-
-extern volatile __bit G1PHF0 @ (((unsigned) &COG1PHF)*8) + 0;
-
-extern volatile __bit G1PHF1 @ (((unsigned) &COG1PHF)*8) + 1;
-
-extern volatile __bit G1PHF2 @ (((unsigned) &COG1PHF)*8) + 2;
-
-extern volatile __bit G1PHF3 @ (((unsigned) &COG1PHF)*8) + 3;
-
-extern volatile __bit G1PHF4 @ (((unsigned) &COG1PHF)*8) + 4;
-
-extern volatile __bit G1PHF5 @ (((unsigned) &COG1PHF)*8) + 5;
-
-extern volatile __bit G1PHR0 @ (((unsigned) &COG1PHR)*8) + 0;
-
-extern volatile __bit G1PHR1 @ (((unsigned) &COG1PHR)*8) + 1;
-
-extern volatile __bit G1PHR2 @ (((unsigned) &COG1PHR)*8) + 2;
-
-extern volatile __bit G1PHR3 @ (((unsigned) &COG1PHR)*8) + 3;
-
-extern volatile __bit G1PHR4 @ (((unsigned) &COG1PHR)*8) + 4;
-
-extern volatile __bit G1PHR5 @ (((unsigned) &COG1PHR)*8) + 5;
-
-extern volatile __bit G1POLA @ (((unsigned) &COG1CON1)*8) + 0;
-
-extern volatile __bit G1POLB @ (((unsigned) &COG1CON1)*8) + 1;
-
-extern volatile __bit G1POLC @ (((unsigned) &COG1CON1)*8) + 2;
-
-extern volatile __bit G1POLD @ (((unsigned) &COG1CON1)*8) + 3;
-
-extern volatile __bit G1RDBS @ (((unsigned) &COG1CON1)*8) + 7;
-
-extern volatile __bit G1RIS0 @ (((unsigned) &COG1RIS)*8) + 0;
-
-extern volatile __bit G1RIS1 @ (((unsigned) &COG1RIS)*8) + 1;
-
-extern volatile __bit G1RIS2 @ (((unsigned) &COG1RIS)*8) + 2;
-
-extern volatile __bit G1RIS3 @ (((unsigned) &COG1RIS)*8) + 3;
-
-extern volatile __bit G1RIS4 @ (((unsigned) &COG1RIS)*8) + 4;
-
-extern volatile __bit G1RIS5 @ (((unsigned) &COG1RIS)*8) + 5;
-
-extern volatile __bit G1RIS6 @ (((unsigned) &COG1RIS)*8) + 6;
-
-extern volatile __bit G1RSIM0 @ (((unsigned) &COG1RSIM)*8) + 0;
-
-extern volatile __bit G1RSIM1 @ (((unsigned) &COG1RSIM)*8) + 1;
-
-extern volatile __bit G1RSIM2 @ (((unsigned) &COG1RSIM)*8) + 2;
-
-extern volatile __bit G1RSIM3 @ (((unsigned) &COG1RSIM)*8) + 3;
-
-extern volatile __bit G1RSIM4 @ (((unsigned) &COG1RSIM)*8) + 4;
-
-extern volatile __bit G1RSIM5 @ (((unsigned) &COG1RSIM)*8) + 5;
-
-extern volatile __bit G1RSIM6 @ (((unsigned) &COG1RSIM)*8) + 6;
-
-extern volatile __bit G1SDATA @ (((unsigned) &COG1STR)*8) + 4;
-
-extern volatile __bit G1SDATB @ (((unsigned) &COG1STR)*8) + 5;
-
-extern volatile __bit G1SDATC @ (((unsigned) &COG1STR)*8) + 6;
-
-extern volatile __bit G1SDATD @ (((unsigned) &COG1STR)*8) + 7;
-
-extern volatile __bit G1STRA @ (((unsigned) &COG1STR)*8) + 0;
-
-extern volatile __bit G1STRB @ (((unsigned) &COG1STR)*8) + 1;
-
-extern volatile __bit G1STRC @ (((unsigned) &COG1STR)*8) + 2;
-
-extern volatile __bit G1STRD @ (((unsigned) &COG1STR)*8) + 3;
-
-extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
-
-extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
-
-extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
-
-extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
-
-extern volatile __bit HFIOFL @ (((unsigned) &OSCSTAT)*8) + 3;
-
-extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
-
-extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
-
-extern volatile __bit INLVLA0 @ (((unsigned) &INLVLA)*8) + 0;
-
-extern volatile __bit INLVLA1 @ (((unsigned) &INLVLA)*8) + 1;
-
-extern volatile __bit INLVLA2 @ (((unsigned) &INLVLA)*8) + 2;
-
-extern volatile __bit INLVLA3 @ (((unsigned) &INLVLA)*8) + 3;
-
-extern volatile __bit INLVLA4 @ (((unsigned) &INLVLA)*8) + 4;
-
-extern volatile __bit INLVLA5 @ (((unsigned) &INLVLA)*8) + 5;
-
-extern volatile __bit INLVLC0 @ (((unsigned) &INLVLC)*8) + 0;
-
-extern volatile __bit INLVLC1 @ (((unsigned) &INLVLC)*8) + 1;
-
-extern volatile __bit INLVLC2 @ (((unsigned) &INLVLC)*8) + 2;
-
-extern volatile __bit INLVLC3 @ (((unsigned) &INLVLC)*8) + 3;
-
-extern volatile __bit INLVLC4 @ (((unsigned) &INLVLC)*8) + 4;
-
-extern volatile __bit INLVLC5 @ (((unsigned) &INLVLC)*8) + 5;
-
-extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
-
-extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
-
-extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
-
-extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
-
-extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
-
-extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
-
-extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
-
-extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
-
-extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
-
-extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
-
-extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
-
-extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
-
-extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
-
-extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
-
-extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
-
-extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
-
-extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
-
-extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
-
-extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
-
-extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
-
-extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
-
-extern volatile __bit IOCCF0 @ (((unsigned) &IOCCF)*8) + 0;
-
-extern volatile __bit IOCCF1 @ (((unsigned) &IOCCF)*8) + 1;
-
-extern volatile __bit IOCCF2 @ (((unsigned) &IOCCF)*8) + 2;
-
-extern volatile __bit IOCCF3 @ (((unsigned) &IOCCF)*8) + 3;
-
-extern volatile __bit IOCCF4 @ (((unsigned) &IOCCF)*8) + 4;
-
-extern volatile __bit IOCCF5 @ (((unsigned) &IOCCF)*8) + 5;
-
-extern volatile __bit IOCCN0 @ (((unsigned) &IOCCN)*8) + 0;
-
-extern volatile __bit IOCCN1 @ (((unsigned) &IOCCN)*8) + 1;
-
-extern volatile __bit IOCCN2 @ (((unsigned) &IOCCN)*8) + 2;
-
-extern volatile __bit IOCCN3 @ (((unsigned) &IOCCN)*8) + 3;
-
-extern volatile __bit IOCCN4 @ (((unsigned) &IOCCN)*8) + 4;
-
-extern volatile __bit IOCCN5 @ (((unsigned) &IOCCN)*8) + 5;
-
-extern volatile __bit IOCCP0 @ (((unsigned) &IOCCP)*8) + 0;
-
-extern volatile __bit IOCCP1 @ (((unsigned) &IOCCP)*8) + 1;
-
-extern volatile __bit IOCCP2 @ (((unsigned) &IOCCP)*8) + 2;
-
-extern volatile __bit IOCCP3 @ (((unsigned) &IOCCP)*8) + 3;
-
-extern volatile __bit IOCCP4 @ (((unsigned) &IOCCP)*8) + 4;
-
-extern volatile __bit IOCCP5 @ (((unsigned) &IOCCP)*8) + 5;
-
-extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
-
-extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
-
-extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
-
-extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
-
-extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
-
-extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
-
-extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
-
-extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
-
-extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
-
-extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
-
-extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
-
-extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
-
-extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
-
-extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
-
-extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
-
-extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
-
-extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
-
-extern volatile __bit LC1D1S0 @ (((unsigned) &CLC1SEL0)*8) + 0;
-
-extern volatile __bit LC1D1S1 @ (((unsigned) &CLC1SEL0)*8) + 1;
-
-extern volatile __bit LC1D1S2 @ (((unsigned) &CLC1SEL0)*8) + 2;
-
-extern volatile __bit LC1D1S3 @ (((unsigned) &CLC1SEL0)*8) + 3;
-
-extern volatile __bit LC1D1S4 @ (((unsigned) &CLC1SEL0)*8) + 4;
-
-extern volatile __bit LC1D2S0 @ (((unsigned) &CLC1SEL1)*8) + 0;
-
-extern volatile __bit LC1D2S1 @ (((unsigned) &CLC1SEL1)*8) + 1;
-
-extern volatile __bit LC1D2S2 @ (((unsigned) &CLC1SEL1)*8) + 2;
-
-extern volatile __bit LC1D2S3 @ (((unsigned) &CLC1SEL1)*8) + 3;
-
-extern volatile __bit LC1D2S4 @ (((unsigned) &CLC1SEL1)*8) + 4;
-
-extern volatile __bit LC1D3S0 @ (((unsigned) &CLC1SEL2)*8) + 0;
-
-extern volatile __bit LC1D3S1 @ (((unsigned) &CLC1SEL2)*8) + 1;
-
-extern volatile __bit LC1D3S2 @ (((unsigned) &CLC1SEL2)*8) + 2;
-
-extern volatile __bit LC1D3S3 @ (((unsigned) &CLC1SEL2)*8) + 3;
-
-extern volatile __bit LC1D3S4 @ (((unsigned) &CLC1SEL2)*8) + 4;
-
-extern volatile __bit LC1D4S0 @ (((unsigned) &CLC1SEL3)*8) + 0;
-
-extern volatile __bit LC1D4S1 @ (((unsigned) &CLC1SEL3)*8) + 1;
-
-extern volatile __bit LC1D4S2 @ (((unsigned) &CLC1SEL3)*8) + 2;
-
-extern volatile __bit LC1D4S3 @ (((unsigned) &CLC1SEL3)*8) + 3;
-
-extern volatile __bit LC1D4S4 @ (((unsigned) &CLC1SEL3)*8) + 4;
-
-extern volatile __bit LC1EN @ (((unsigned) &CLC1CON)*8) + 7;
-
-extern volatile __bit LC1G1D1N @ (((unsigned) &CLC1GLS0)*8) + 0;
-
-extern volatile __bit LC1G1D1T @ (((unsigned) &CLC1GLS0)*8) + 1;
-
-extern volatile __bit LC1G1D2N @ (((unsigned) &CLC1GLS0)*8) + 2;
-
-extern volatile __bit LC1G1D2T @ (((unsigned) &CLC1GLS0)*8) + 3;
-
-extern volatile __bit LC1G1D3N @ (((unsigned) &CLC1GLS0)*8) + 4;
-
-extern volatile __bit LC1G1D3T @ (((unsigned) &CLC1GLS0)*8) + 5;
-
-extern volatile __bit LC1G1D4N @ (((unsigned) &CLC1GLS0)*8) + 6;
-
-extern volatile __bit LC1G1D4T @ (((unsigned) &CLC1GLS0)*8) + 7;
-
-extern volatile __bit LC1G1POL @ (((unsigned) &CLC1POL)*8) + 0;
-
-extern volatile __bit LC1G2D1N @ (((unsigned) &CLC1GLS1)*8) + 0;
-
-extern volatile __bit LC1G2D1T @ (((unsigned) &CLC1GLS1)*8) + 1;
-
-extern volatile __bit LC1G2D2N @ (((unsigned) &CLC1GLS1)*8) + 2;
-
-extern volatile __bit LC1G2D2T @ (((unsigned) &CLC1GLS1)*8) + 3;
-
-extern volatile __bit LC1G2D3N @ (((unsigned) &CLC1GLS1)*8) + 4;
-
-extern volatile __bit LC1G2D3T @ (((unsigned) &CLC1GLS1)*8) + 5;
-
-extern volatile __bit LC1G2D4N @ (((unsigned) &CLC1GLS1)*8) + 6;
-
-extern volatile __bit LC1G2D4T @ (((unsigned) &CLC1GLS1)*8) + 7;
-
-extern volatile __bit LC1G2POL @ (((unsigned) &CLC1POL)*8) + 1;
-
-extern volatile __bit LC1G3D1N @ (((unsigned) &CLC1GLS2)*8) + 0;
-
-extern volatile __bit LC1G3D1T @ (((unsigned) &CLC1GLS2)*8) + 1;
-
-extern volatile __bit LC1G3D2N @ (((unsigned) &CLC1GLS2)*8) + 2;
-
-extern volatile __bit LC1G3D2T @ (((unsigned) &CLC1GLS2)*8) + 3;
-
-extern volatile __bit LC1G3D3N @ (((unsigned) &CLC1GLS2)*8) + 4;
-
-extern volatile __bit LC1G3D3T @ (((unsigned) &CLC1GLS2)*8) + 5;
-
-extern volatile __bit LC1G3D4N @ (((unsigned) &CLC1GLS2)*8) + 6;
-
-extern volatile __bit LC1G3D4T @ (((unsigned) &CLC1GLS2)*8) + 7;
-
-extern volatile __bit LC1G3POL @ (((unsigned) &CLC1POL)*8) + 2;
-
-extern volatile __bit LC1G4D1N @ (((unsigned) &CLC1GLS3)*8) + 0;
-
-extern volatile __bit LC1G4D1T @ (((unsigned) &CLC1GLS3)*8) + 1;
-
-extern volatile __bit LC1G4D2N @ (((unsigned) &CLC1GLS3)*8) + 2;
-
-extern volatile __bit LC1G4D2T @ (((unsigned) &CLC1GLS3)*8) + 3;
-
-extern volatile __bit LC1G4D3N @ (((unsigned) &CLC1GLS3)*8) + 4;
-
-extern volatile __bit LC1G4D3T @ (((unsigned) &CLC1GLS3)*8) + 5;
-
-extern volatile __bit LC1G4D4N @ (((unsigned) &CLC1GLS3)*8) + 6;
-
-extern volatile __bit LC1G4D4T @ (((unsigned) &CLC1GLS3)*8) + 7;
-
-extern volatile __bit LC1G4POL @ (((unsigned) &CLC1POL)*8) + 3;
-
-extern volatile __bit LC1INTN @ (((unsigned) &CLC1CON)*8) + 3;
-
-extern volatile __bit LC1INTP @ (((unsigned) &CLC1CON)*8) + 4;
-
-extern volatile __bit LC1MODE0 @ (((unsigned) &CLC1CON)*8) + 0;
-
-extern volatile __bit LC1MODE1 @ (((unsigned) &CLC1CON)*8) + 1;
-
-extern volatile __bit LC1MODE2 @ (((unsigned) &CLC1CON)*8) + 2;
-
-extern volatile __bit LC1OUT @ (((unsigned) &CLC1CON)*8) + 5;
-
-extern volatile __bit LC1POL @ (((unsigned) &CLC1POL)*8) + 7;
-
-extern volatile __bit LC2D1S0 @ (((unsigned) &CLC2SEL0)*8) + 0;
-
-extern volatile __bit LC2D1S1 @ (((unsigned) &CLC2SEL0)*8) + 1;
-
-extern volatile __bit LC2D1S2 @ (((unsigned) &CLC2SEL0)*8) + 2;
-
-extern volatile __bit LC2D1S3 @ (((unsigned) &CLC2SEL0)*8) + 3;
-
-extern volatile __bit LC2D1S4 @ (((unsigned) &CLC2SEL0)*8) + 4;
-
-extern volatile __bit LC2D2S0 @ (((unsigned) &CLC2SEL1)*8) + 0;
-
-extern volatile __bit LC2D2S1 @ (((unsigned) &CLC2SEL1)*8) + 1;
-
-extern volatile __bit LC2D2S2 @ (((unsigned) &CLC2SEL1)*8) + 2;
-
-extern volatile __bit LC2D2S3 @ (((unsigned) &CLC2SEL1)*8) + 3;
-
-extern volatile __bit LC2D2S4 @ (((unsigned) &CLC2SEL1)*8) + 4;
-
-extern volatile __bit LC2D3S0 @ (((unsigned) &CLC2SEL2)*8) + 0;
-
-extern volatile __bit LC2D3S1 @ (((unsigned) &CLC2SEL2)*8) + 1;
-
-extern volatile __bit LC2D3S2 @ (((unsigned) &CLC2SEL2)*8) + 2;
-
-extern volatile __bit LC2D3S3 @ (((unsigned) &CLC2SEL2)*8) + 3;
-
-extern volatile __bit LC2D3S4 @ (((unsigned) &CLC2SEL2)*8) + 4;
-
-extern volatile __bit LC2D4S0 @ (((unsigned) &CLC2SEL3)*8) + 0;
-
-extern volatile __bit LC2D4S1 @ (((unsigned) &CLC2SEL3)*8) + 1;
-
-extern volatile __bit LC2D4S2 @ (((unsigned) &CLC2SEL3)*8) + 2;
-
-extern volatile __bit LC2D4S3 @ (((unsigned) &CLC2SEL3)*8) + 3;
-
-extern volatile __bit LC2D4S4 @ (((unsigned) &CLC2SEL3)*8) + 4;
-
-extern volatile __bit LC2EN @ (((unsigned) &CLC2CON)*8) + 7;
-
-extern volatile __bit LC2G1D1N @ (((unsigned) &CLC2GLS0)*8) + 0;
-
-extern volatile __bit LC2G1D1T @ (((unsigned) &CLC2GLS0)*8) + 1;
-
-extern volatile __bit LC2G1D2N @ (((unsigned) &CLC2GLS0)*8) + 2;
-
-extern volatile __bit LC2G1D2T @ (((unsigned) &CLC2GLS0)*8) + 3;
-
-extern volatile __bit LC2G1D3N @ (((unsigned) &CLC2GLS0)*8) + 4;
-
-extern volatile __bit LC2G1D3T @ (((unsigned) &CLC2GLS0)*8) + 5;
-
-extern volatile __bit LC2G1D4N @ (((unsigned) &CLC2GLS0)*8) + 6;
-
-extern volatile __bit LC2G1D4T @ (((unsigned) &CLC2GLS0)*8) + 7;
-
-extern volatile __bit LC2G1POL @ (((unsigned) &CLC2POL)*8) + 0;
-
-extern volatile __bit LC2G2D1N @ (((unsigned) &CLC2GLS1)*8) + 0;
-
-extern volatile __bit LC2G2D1T @ (((unsigned) &CLC2GLS1)*8) + 1;
-
-extern volatile __bit LC2G2D2N @ (((unsigned) &CLC2GLS1)*8) + 2;
-
-extern volatile __bit LC2G2D2T @ (((unsigned) &CLC2GLS1)*8) + 3;
-
-extern volatile __bit LC2G2D3N @ (((unsigned) &CLC2GLS1)*8) + 4;
-
-extern volatile __bit LC2G2D3T @ (((unsigned) &CLC2GLS1)*8) + 5;
-
-extern volatile __bit LC2G2D4N @ (((unsigned) &CLC2GLS1)*8) + 6;
-
-extern volatile __bit LC2G2D4T @ (((unsigned) &CLC2GLS1)*8) + 7;
-
-extern volatile __bit LC2G2POL @ (((unsigned) &CLC2POL)*8) + 1;
-
-extern volatile __bit LC2G3D1N @ (((unsigned) &CLC2GLS2)*8) + 0;
-
-extern volatile __bit LC2G3D1T @ (((unsigned) &CLC2GLS2)*8) + 1;
-
-extern volatile __bit LC2G3D2N @ (((unsigned) &CLC2GLS2)*8) + 2;
-
-extern volatile __bit LC2G3D2T @ (((unsigned) &CLC2GLS2)*8) + 3;
-
-extern volatile __bit LC2G3D3N @ (((unsigned) &CLC2GLS2)*8) + 4;
-
-extern volatile __bit LC2G3D3T @ (((unsigned) &CLC2GLS2)*8) + 5;
-
-extern volatile __bit LC2G3D4N @ (((unsigned) &CLC2GLS2)*8) + 6;
-
-extern volatile __bit LC2G3D4T @ (((unsigned) &CLC2GLS2)*8) + 7;
-
-extern volatile __bit LC2G3POL @ (((unsigned) &CLC2POL)*8) + 2;
-
-extern volatile __bit LC2G4D1N @ (((unsigned) &CLC2GLS3)*8) + 0;
-
-extern volatile __bit LC2G4D1T @ (((unsigned) &CLC2GLS3)*8) + 1;
-
-extern volatile __bit LC2G4D2N @ (((unsigned) &CLC2GLS3)*8) + 2;
-
-extern volatile __bit LC2G4D2T @ (((unsigned) &CLC2GLS3)*8) + 3;
-
-extern volatile __bit LC2G4D3N @ (((unsigned) &CLC2GLS3)*8) + 4;
-
-extern volatile __bit LC2G4D3T @ (((unsigned) &CLC2GLS3)*8) + 5;
-
-extern volatile __bit LC2G4D4N @ (((unsigned) &CLC2GLS3)*8) + 6;
-
-extern volatile __bit LC2G4D4T @ (((unsigned) &CLC2GLS3)*8) + 7;
-
-extern volatile __bit LC2G4POL @ (((unsigned) &CLC2POL)*8) + 3;
-
-extern volatile __bit LC2INTN @ (((unsigned) &CLC2CON)*8) + 3;
-
-extern volatile __bit LC2INTP @ (((unsigned) &CLC2CON)*8) + 4;
-
-extern volatile __bit LC2MODE0 @ (((unsigned) &CLC2CON)*8) + 0;
-
-extern volatile __bit LC2MODE1 @ (((unsigned) &CLC2CON)*8) + 1;
-
-extern volatile __bit LC2MODE2 @ (((unsigned) &CLC2CON)*8) + 2;
-
-extern volatile __bit LC2OUT @ (((unsigned) &CLC2CON)*8) + 5;
-
-extern volatile __bit LC2POL @ (((unsigned) &CLC2POL)*8) + 7;
-
-extern volatile __bit LC3D1S0 @ (((unsigned) &CLC3SEL0)*8) + 0;
-
-extern volatile __bit LC3D1S1 @ (((unsigned) &CLC3SEL0)*8) + 1;
-
-extern volatile __bit LC3D1S2 @ (((unsigned) &CLC3SEL0)*8) + 2;
-
-extern volatile __bit LC3D1S3 @ (((unsigned) &CLC3SEL0)*8) + 3;
-
-extern volatile __bit LC3D1S4 @ (((unsigned) &CLC3SEL0)*8) + 4;
-
-extern volatile __bit LC3D2S0 @ (((unsigned) &CLC3SEL1)*8) + 0;
-
-extern volatile __bit LC3D2S1 @ (((unsigned) &CLC3SEL1)*8) + 1;
-
-extern volatile __bit LC3D2S2 @ (((unsigned) &CLC3SEL1)*8) + 2;
-
-extern volatile __bit LC3D2S3 @ (((unsigned) &CLC3SEL1)*8) + 3;
-
-extern volatile __bit LC3D2S4 @ (((unsigned) &CLC3SEL1)*8) + 4;
-
-extern volatile __bit LC3D3S0 @ (((unsigned) &CLC3SEL2)*8) + 0;
-
-extern volatile __bit LC3D3S1 @ (((unsigned) &CLC3SEL2)*8) + 1;
-
-extern volatile __bit LC3D3S2 @ (((unsigned) &CLC3SEL2)*8) + 2;
-
-extern volatile __bit LC3D3S3 @ (((unsigned) &CLC3SEL2)*8) + 3;
-
-extern volatile __bit LC3D3S4 @ (((unsigned) &CLC3SEL2)*8) + 4;
-
-extern volatile __bit LC3D4S0 @ (((unsigned) &CLC3SEL3)*8) + 0;
-
-extern volatile __bit LC3D4S1 @ (((unsigned) &CLC3SEL3)*8) + 1;
-
-extern volatile __bit LC3D4S2 @ (((unsigned) &CLC3SEL3)*8) + 2;
-
-extern volatile __bit LC3D4S3 @ (((unsigned) &CLC3SEL3)*8) + 3;
-
-extern volatile __bit LC3D4S4 @ (((unsigned) &CLC3SEL3)*8) + 4;
-
-extern volatile __bit LC3EN @ (((unsigned) &CLC3CON)*8) + 7;
-
-extern volatile __bit LC3G1D1N @ (((unsigned) &CLC3GLS0)*8) + 0;
-
-extern volatile __bit LC3G1D1T @ (((unsigned) &CLC3GLS0)*8) + 1;
-
-extern volatile __bit LC3G1D2N @ (((unsigned) &CLC3GLS0)*8) + 2;
-
-extern volatile __bit LC3G1D2T @ (((unsigned) &CLC3GLS0)*8) + 3;
-
-extern volatile __bit LC3G1D3N @ (((unsigned) &CLC3GLS0)*8) + 4;
-
-extern volatile __bit LC3G1D3T @ (((unsigned) &CLC3GLS0)*8) + 5;
-
-extern volatile __bit LC3G1D4N @ (((unsigned) &CLC3GLS0)*8) + 6;
-
-extern volatile __bit LC3G1D4T @ (((unsigned) &CLC3GLS0)*8) + 7;
-
-extern volatile __bit LC3G1POL @ (((unsigned) &CLC3POL)*8) + 0;
-
-extern volatile __bit LC3G2D1N @ (((unsigned) &CLC3GLS1)*8) + 0;
-
-extern volatile __bit LC3G2D1T @ (((unsigned) &CLC3GLS1)*8) + 1;
-
-extern volatile __bit LC3G2D2N @ (((unsigned) &CLC3GLS1)*8) + 2;
-
-extern volatile __bit LC3G2D2T @ (((unsigned) &CLC3GLS1)*8) + 3;
-
-extern volatile __bit LC3G2D3N @ (((unsigned) &CLC3GLS1)*8) + 4;
-
-extern volatile __bit LC3G2D3T @ (((unsigned) &CLC3GLS1)*8) + 5;
-
-extern volatile __bit LC3G2D4N @ (((unsigned) &CLC3GLS1)*8) + 6;
-
-extern volatile __bit LC3G2D4T @ (((unsigned) &CLC3GLS1)*8) + 7;
-
-extern volatile __bit LC3G2POL @ (((unsigned) &CLC3POL)*8) + 1;
-
-extern volatile __bit LC3G3D1N @ (((unsigned) &CLC3GLS2)*8) + 0;
-
-extern volatile __bit LC3G3D1T @ (((unsigned) &CLC3GLS2)*8) + 1;
-
-extern volatile __bit LC3G3D2N @ (((unsigned) &CLC3GLS2)*8) + 2;
-
-extern volatile __bit LC3G3D2T @ (((unsigned) &CLC3GLS2)*8) + 3;
-
-extern volatile __bit LC3G3D3N @ (((unsigned) &CLC3GLS2)*8) + 4;
-
-extern volatile __bit LC3G3D3T @ (((unsigned) &CLC3GLS2)*8) + 5;
-
-extern volatile __bit LC3G3D4N @ (((unsigned) &CLC3GLS2)*8) + 6;
-
-extern volatile __bit LC3G3D4T @ (((unsigned) &CLC3GLS2)*8) + 7;
-
-extern volatile __bit LC3G3POL @ (((unsigned) &CLC3POL)*8) + 2;
-
-extern volatile __bit LC3G4D1N @ (((unsigned) &CLC3GLS3)*8) + 0;
-
-extern volatile __bit LC3G4D1T @ (((unsigned) &CLC3GLS3)*8) + 1;
-
-extern volatile __bit LC3G4D2N @ (((unsigned) &CLC3GLS3)*8) + 2;
-
-extern volatile __bit LC3G4D2T @ (((unsigned) &CLC3GLS3)*8) + 3;
-
-extern volatile __bit LC3G4D3N @ (((unsigned) &CLC3GLS3)*8) + 4;
-
-extern volatile __bit LC3G4D3T @ (((unsigned) &CLC3GLS3)*8) + 5;
-
-extern volatile __bit LC3G4D4N @ (((unsigned) &CLC3GLS3)*8) + 6;
-
-extern volatile __bit LC3G4D4T @ (((unsigned) &CLC3GLS3)*8) + 7;
-
-extern volatile __bit LC3G4POL @ (((unsigned) &CLC3POL)*8) + 3;
-
-extern volatile __bit LC3INTN @ (((unsigned) &CLC3CON)*8) + 3;
-
-extern volatile __bit LC3INTP @ (((unsigned) &CLC3CON)*8) + 4;
-
-extern volatile __bit LC3MODE0 @ (((unsigned) &CLC3CON)*8) + 0;
-
-extern volatile __bit LC3MODE1 @ (((unsigned) &CLC3CON)*8) + 1;
-
-extern volatile __bit LC3MODE2 @ (((unsigned) &CLC3CON)*8) + 2;
-
-extern volatile __bit LC3OUT @ (((unsigned) &CLC3CON)*8) + 5;
-
-extern volatile __bit LC3POL @ (((unsigned) &CLC3POL)*8) + 7;
-
-extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
-
-extern volatile __bit LWLO @ (((unsigned) &PMCON1)*8) + 5;
-
-extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
-
-extern volatile __bit MC2OUT @ (((unsigned) &CMOUT)*8) + 1;
-
-extern volatile __bit MCLC1OUT @ (((unsigned) &CLCDATA)*8) + 0;
-
-extern volatile __bit MCLC2OUT @ (((unsigned) &CLCDATA)*8) + 1;
-
-extern volatile __bit MCLC3OUT @ (((unsigned) &CLCDATA)*8) + 2;
-
-extern volatile __bit MFIOFR @ (((unsigned) &OSCSTAT)*8) + 2;
-
-extern volatile __bit MSK0 @ (((unsigned) &SSP1MSK)*8) + 0;
-
-extern volatile __bit MSK1 @ (((unsigned) &SSP1MSK)*8) + 1;
-
-extern volatile __bit MSK2 @ (((unsigned) &SSP1MSK)*8) + 2;
-
-extern volatile __bit MSK3 @ (((unsigned) &SSP1MSK)*8) + 3;
-
-extern volatile __bit MSK4 @ (((unsigned) &SSP1MSK)*8) + 4;
-
-extern volatile __bit MSK5 @ (((unsigned) &SSP1MSK)*8) + 5;
-
-extern volatile __bit MSK6 @ (((unsigned) &SSP1MSK)*8) + 6;
-
-extern volatile __bit MSK7 @ (((unsigned) &SSP1MSK)*8) + 7;
-
-extern volatile __bit ODA0 @ (((unsigned) &ODCONA)*8) + 0;
-
-extern volatile __bit ODA1 @ (((unsigned) &ODCONA)*8) + 1;
-
-extern volatile __bit ODA2 @ (((unsigned) &ODCONA)*8) + 2;
-
-extern volatile __bit ODA4 @ (((unsigned) &ODCONA)*8) + 4;
-
-extern volatile __bit ODA5 @ (((unsigned) &ODCONA)*8) + 5;
-
-extern volatile __bit ODC0 @ (((unsigned) &ODCONC)*8) + 0;
-
-extern volatile __bit ODC1 @ (((unsigned) &ODCONC)*8) + 1;
-
-extern volatile __bit ODC2 @ (((unsigned) &ODCONC)*8) + 2;
-
-extern volatile __bit ODC3 @ (((unsigned) &ODCONC)*8) + 3;
-
-extern volatile __bit ODC4 @ (((unsigned) &ODCONC)*8) + 4;
-
-extern volatile __bit ODC5 @ (((unsigned) &ODCONC)*8) + 5;
-
-extern volatile __bit OERR @ (((unsigned) &RC1STA)*8) + 1;
-
-extern volatile __bit OPA1EN @ (((unsigned) &OPA1CON)*8) + 7;
-
-extern volatile __bit OPA1PCH0 @ (((unsigned) &OPA1CON)*8) + 0;
-
-extern volatile __bit OPA1PCH1 @ (((unsigned) &OPA1CON)*8) + 1;
-
-extern volatile __bit OPA1SP @ (((unsigned) &OPA1CON)*8) + 6;
-
-extern volatile __bit OPA1UG @ (((unsigned) &OPA1CON)*8) + 4;
-
-extern volatile __bit OPA2EN @ (((unsigned) &OPA2CON)*8) + 7;
-
-extern volatile __bit OPA2PCH0 @ (((unsigned) &OPA2CON)*8) + 0;
-
-extern volatile __bit OPA2PCH1 @ (((unsigned) &OPA2CON)*8) + 1;
-
-extern volatile __bit OPA2SP @ (((unsigned) &OPA2CON)*8) + 6;
-
-extern volatile __bit OPA2UG @ (((unsigned) &OPA2CON)*8) + 4;
-
-extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
-
-extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
-
-extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
-
-extern volatile __bit P3TSEL0 @ (((unsigned) &CCPTMRS)*8) + 4;
-
-extern volatile __bit P3TSEL1 @ (((unsigned) &CCPTMRS)*8) + 5;
-
-extern volatile __bit P4TSEL0 @ (((unsigned) &CCPTMRS)*8) + 6;
-
-extern volatile __bit P4TSEL1 @ (((unsigned) &CCPTMRS)*8) + 7;
-
-extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
-
-extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
-
-extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
-
-extern volatile __bit PLLR @ (((unsigned) &OSCSTAT)*8) + 6;
-
-extern volatile __bit PPSLOCKED @ (((unsigned) &PPSLOCK)*8) + 0;
-
-extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
-
-extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
-
-extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
-
-extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
-
-extern volatile __bit PWM3DCH0 @ (((unsigned) &PWM3DCH)*8) + 0;
-
-extern volatile __bit PWM3DCH1 @ (((unsigned) &PWM3DCH)*8) + 1;
-
-extern volatile __bit PWM3DCH2 @ (((unsigned) &PWM3DCH)*8) + 2;
-
-extern volatile __bit PWM3DCH3 @ (((unsigned) &PWM3DCH)*8) + 3;
-
-extern volatile __bit PWM3DCH4 @ (((unsigned) &PWM3DCH)*8) + 4;
-
-extern volatile __bit PWM3DCH5 @ (((unsigned) &PWM3DCH)*8) + 5;
-
-extern volatile __bit PWM3DCH6 @ (((unsigned) &PWM3DCH)*8) + 6;
-
-extern volatile __bit PWM3DCH7 @ (((unsigned) &PWM3DCH)*8) + 7;
-
-extern volatile __bit PWM3DCL0 @ (((unsigned) &PWM3DCL)*8) + 6;
-
-extern volatile __bit PWM3DCL1 @ (((unsigned) &PWM3DCL)*8) + 7;
-
-extern volatile __bit PWM3EN @ (((unsigned) &PWM3CON)*8) + 7;
-
-extern volatile __bit PWM3OUT @ (((unsigned) &PWM3CON)*8) + 5;
-
-extern volatile __bit PWM3POL @ (((unsigned) &PWM3CON)*8) + 4;
-
-extern volatile __bit PWM4DCH0 @ (((unsigned) &PWM4DCH)*8) + 0;
-
-extern volatile __bit PWM4DCH1 @ (((unsigned) &PWM4DCH)*8) + 1;
-
-extern volatile __bit PWM4DCH2 @ (((unsigned) &PWM4DCH)*8) + 2;
-
-extern volatile __bit PWM4DCH3 @ (((unsigned) &PWM4DCH)*8) + 3;
-
-extern volatile __bit PWM4DCH4 @ (((unsigned) &PWM4DCH)*8) + 4;
-
-extern volatile __bit PWM4DCH5 @ (((unsigned) &PWM4DCH)*8) + 5;
-
-extern volatile __bit PWM4DCH6 @ (((unsigned) &PWM4DCH)*8) + 6;
-
-extern volatile __bit PWM4DCH7 @ (((unsigned) &PWM4DCH)*8) + 7;
-
-extern volatile __bit PWM4DCL0 @ (((unsigned) &PWM4DCL)*8) + 6;
-
-extern volatile __bit PWM4DCL1 @ (((unsigned) &PWM4DCL)*8) + 7;
-
-extern volatile __bit PWM4EN @ (((unsigned) &PWM4CON)*8) + 7;
-
-extern volatile __bit PWM4OUT @ (((unsigned) &PWM4CON)*8) + 5;
-
-extern volatile __bit PWM4POL @ (((unsigned) &PWM4CON)*8) + 4;
-
-extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
-
-extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
-
-extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
-
-extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
-
-extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
-
-extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
-
-extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
-
-extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
-
-extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
-
-extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
-
-extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
-
-extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
-
-extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
-
-extern volatile __bit RCIDL @ (((unsigned) &BAUD1CON)*8) + 6;
-
-extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
-
-extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
-
-extern volatile __bit RD @ (((unsigned) &PMCON1)*8) + 0;
-
-extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
-
-extern volatile __bit RX9 @ (((unsigned) &RC1STA)*8) + 6;
-
-extern volatile __bit RX9D @ (((unsigned) &RC1STA)*8) + 0;
-
-extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
-
-extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
-
-extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
-
-extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
-
-extern volatile __bit SCKP @ (((unsigned) &BAUD1CON)*8) + 4;
-
-extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
-
-extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
-
-extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
-
-extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
-
-extern volatile __bit SENDB @ (((unsigned) &TX1STA)*8) + 3;
-
-extern volatile __bit SLRA0 @ (((unsigned) &SLRCONA)*8) + 0;
-
-extern volatile __bit SLRA1 @ (((unsigned) &SLRCONA)*8) + 1;
-
-extern volatile __bit SLRA2 @ (((unsigned) &SLRCONA)*8) + 2;
-
-extern volatile __bit SLRA4 @ (((unsigned) &SLRCONA)*8) + 4;
-
-extern volatile __bit SLRA5 @ (((unsigned) &SLRCONA)*8) + 5;
-
-extern volatile __bit SLRC0 @ (((unsigned) &SLRCONC)*8) + 0;
-
-extern volatile __bit SLRC1 @ (((unsigned) &SLRCONC)*8) + 1;
-
-extern volatile __bit SLRC2 @ (((unsigned) &SLRCONC)*8) + 2;
-
-extern volatile __bit SLRC3 @ (((unsigned) &SLRCONC)*8) + 3;
-
-extern volatile __bit SLRC4 @ (((unsigned) &SLRCONC)*8) + 4;
-
-extern volatile __bit SLRC5 @ (((unsigned) &SLRCONC)*8) + 5;
-
-extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
-
-extern volatile __bit SOSCR @ (((unsigned) &OSCSTAT)*8) + 7;
-
-extern volatile __bit SPEN @ (((unsigned) &RC1STA)*8) + 7;
-
-extern volatile __bit SPLLEN @ (((unsigned) &OSCCON)*8) + 7;
-
-extern volatile __bit SREN @ (((unsigned) &RC1STA)*8) + 5;
-
-extern volatile __bit SSP1ADD0 @ (((unsigned) &SSP1ADD)*8) + 0;
-
-extern volatile __bit SSP1ADD1 @ (((unsigned) &SSP1ADD)*8) + 1;
-
-extern volatile __bit SSP1ADD2 @ (((unsigned) &SSP1ADD)*8) + 2;
-
-extern volatile __bit SSP1ADD3 @ (((unsigned) &SSP1ADD)*8) + 3;
-
-extern volatile __bit SSP1ADD4 @ (((unsigned) &SSP1ADD)*8) + 4;
-
-extern volatile __bit SSP1ADD5 @ (((unsigned) &SSP1ADD)*8) + 5;
-
-extern volatile __bit SSP1ADD6 @ (((unsigned) &SSP1ADD)*8) + 6;
-
-extern volatile __bit SSP1ADD7 @ (((unsigned) &SSP1ADD)*8) + 7;
-
-extern volatile __bit SSP1BUF0 @ (((unsigned) &SSP1BUF)*8) + 0;
-
-extern volatile __bit SSP1BUF1 @ (((unsigned) &SSP1BUF)*8) + 1;
-
-extern volatile __bit SSP1BUF2 @ (((unsigned) &SSP1BUF)*8) + 2;
-
-extern volatile __bit SSP1BUF3 @ (((unsigned) &SSP1BUF)*8) + 3;
-
-extern volatile __bit SSP1BUF4 @ (((unsigned) &SSP1BUF)*8) + 4;
-
-extern volatile __bit SSP1BUF5 @ (((unsigned) &SSP1BUF)*8) + 5;
-
-extern volatile __bit SSP1BUF6 @ (((unsigned) &SSP1BUF)*8) + 6;
-
-extern volatile __bit SSP1BUF7 @ (((unsigned) &SSP1BUF)*8) + 7;
-
-extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
-
-extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
-
-extern volatile __bit SSP1MSK0 @ (((unsigned) &SSP1MSK)*8) + 0;
-
-extern volatile __bit SSP1MSK1 @ (((unsigned) &SSP1MSK)*8) + 1;
-
-extern volatile __bit SSP1MSK2 @ (((unsigned) &SSP1MSK)*8) + 2;
-
-extern volatile __bit SSP1MSK3 @ (((unsigned) &SSP1MSK)*8) + 3;
-
-extern volatile __bit SSP1MSK4 @ (((unsigned) &SSP1MSK)*8) + 4;
-
-extern volatile __bit SSP1MSK5 @ (((unsigned) &SSP1MSK)*8) + 5;
-
-extern volatile __bit SSP1MSK6 @ (((unsigned) &SSP1MSK)*8) + 6;
-
-extern volatile __bit SSP1MSK7 @ (((unsigned) &SSP1MSK)*8) + 7;
-
-extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
-
-extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
-
-extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
-
-extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
-
-extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
-
-extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
-
-extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
-
-extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
-
-extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
-
-extern volatile __bit SYNC @ (((unsigned) &TX1STA)*8) + 4;
-
-extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
-
-extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
-
-extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
-
-extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
-
-extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
-
-extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
-
-extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
-
-extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
-
-extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
-
-extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
-
-extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
-
-extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
-
-extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
-
-extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
-
-extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
-
-extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
-
-extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
-
-extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
-
-extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
-
-extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
-
-extern volatile __bit T4CKPS0 @ (((unsigned) &T4CON)*8) + 0;
-
-extern volatile __bit T4CKPS1 @ (((unsigned) &T4CON)*8) + 1;
-
-extern volatile __bit T4OUTPS0 @ (((unsigned) &T4CON)*8) + 3;
-
-extern volatile __bit T4OUTPS1 @ (((unsigned) &T4CON)*8) + 4;
-
-extern volatile __bit T4OUTPS2 @ (((unsigned) &T4CON)*8) + 5;
-
-extern volatile __bit T4OUTPS3 @ (((unsigned) &T4CON)*8) + 6;
-
-extern volatile __bit T6CKPS0 @ (((unsigned) &T6CON)*8) + 0;
-
-extern volatile __bit T6CKPS1 @ (((unsigned) &T6CON)*8) + 1;
-
-extern volatile __bit T6OUTPS0 @ (((unsigned) &T6CON)*8) + 3;
-
-extern volatile __bit T6OUTPS1 @ (((unsigned) &T6CON)*8) + 4;
-
-extern volatile __bit T6OUTPS2 @ (((unsigned) &T6CON)*8) + 5;
-
-extern volatile __bit T6OUTPS3 @ (((unsigned) &T6CON)*8) + 6;
-
-extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
-
-extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
-
-extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
-
-extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
-
-extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
-
-extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
-
-extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
-
-extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
-
-extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
-
-extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
-
-extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
-
-extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
-
-extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
-
-extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
-
-extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
-
-extern volatile __bit TMR4IE @ (((unsigned) &PIE2)*8) + 1;
-
-extern volatile __bit TMR4IF @ (((unsigned) &PIR2)*8) + 1;
-
-extern volatile __bit TMR4ON @ (((unsigned) &T4CON)*8) + 2;
-
-extern volatile __bit TMR6IE @ (((unsigned) &PIE2)*8) + 2;
-
-extern volatile __bit TMR6IF @ (((unsigned) &PIR2)*8) + 2;
-
-extern volatile __bit TMR6ON @ (((unsigned) &T6CON)*8) + 2;
-
-extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCON2)*8) + 4;
-
-extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCON2)*8) + 5;
-
-extern volatile __bit TRIGSEL2 @ (((unsigned) &ADCON2)*8) + 6;
-
-extern volatile __bit TRIGSEL3 @ (((unsigned) &ADCON2)*8) + 7;
-
-extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
-
-extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
-
-extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
-
-extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
-
-extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
-
-extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
-
-extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
-
-extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
-
-extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
-
-extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
-
-extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
-
-extern volatile __bit TRMT @ (((unsigned) &TX1STA)*8) + 1;
-
-extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
-
-extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
-
-extern volatile __bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
-
-extern volatile __bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
-
-extern volatile __bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
-
-extern volatile __bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
-
-extern volatile __bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
-
-extern volatile __bit TUN5 @ (((unsigned) &OSCTUNE)*8) + 5;
-
-extern volatile __bit TX9 @ (((unsigned) &TX1STA)*8) + 6;
-
-extern volatile __bit TX9D @ (((unsigned) &TX1STA)*8) + 0;
-
-extern volatile __bit TXEN @ (((unsigned) &TX1STA)*8) + 5;
-
-extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
-
-extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
-
-extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
-
-extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
-
-extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
-
-extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
-
-extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
-
-extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
-
-extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
-
-extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
-
-extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
-
-extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
-
-extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
-
-extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
-
-extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
-
-extern volatile __bit WPUC0 @ (((unsigned) &WPUC)*8) + 0;
-
-extern volatile __bit WPUC1 @ (((unsigned) &WPUC)*8) + 1;
-
-extern volatile __bit WPUC2 @ (((unsigned) &WPUC)*8) + 2;
-
-extern volatile __bit WPUC3 @ (((unsigned) &WPUC)*8) + 3;
-
-extern volatile __bit WPUC4 @ (((unsigned) &WPUC)*8) + 4;
-
-extern volatile __bit WPUC5 @ (((unsigned) &WPUC)*8) + 5;
-
-extern volatile __bit WR @ (((unsigned) &PMCON1)*8) + 1;
-
-extern volatile __bit WREN @ (((unsigned) &PMCON1)*8) + 2;
-
-extern volatile __bit WRERR @ (((unsigned) &PMCON1)*8) + 3;
-
-extern volatile __bit WUE @ (((unsigned) &BAUD1CON)*8) + 1;
-
-extern volatile __bit ZCD1EN @ (((unsigned) &ZCD1CON)*8) + 7;
-
-extern volatile __bit ZCD1INTN @ (((unsigned) &ZCD1CON)*8) + 0;
-
-extern volatile __bit ZCD1INTP @ (((unsigned) &ZCD1CON)*8) + 1;
-
-extern volatile __bit ZCD1OUT @ (((unsigned) &ZCD1CON)*8) + 5;
-
-extern volatile __bit ZCD1POL @ (((unsigned) &ZCD1CON)*8) + 4;
-
-extern volatile __bit ZCDIE @ (((unsigned) &PIE3)*8) + 4;
-
-extern volatile __bit ZCDIF @ (((unsigned) &PIR3)*8) + 4;
-
-extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
-
-extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
-
-extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
-
-extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
-
-extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
-
-extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
-
-extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
-
-extern volatile __bit nRWDT @ (((unsigned) &PCON)*8) + 4;
-
-extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
-
-extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
-
-extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
-
-
-# 27 "/opt/microchip/xc8/v1.32/include/pic.h"
-#pragma intrinsic(__nop)
-extern void __nop(void);
-
-# 80
-extern unsigned int flash_read(unsigned short addr);
-
-
-# 153
-#pragma intrinsic(_delay)
-extern __nonreentrant void _delay(unsigned long);
-
-
-# 11 "main.c"
-#pragma config FOSC = INTOSC
-#pragma config WDTE = OFF
-#pragma config PWRTE = OFF
-#pragma config MCLRE = ON
-#pragma config CP = OFF
-#pragma config BOREN = ON
-#pragma config CLKOUTEN = OFF
-#pragma config IESO = OFF
-#pragma config FCMEN = ON
-
-
-#pragma config WRT = OFF
-#pragma config PPS1WAY = ON
-#pragma config ZCDDIS = ON
-#pragma config PLLEN = ON
-#pragma config STVREN = ON
-#pragma config BORV = LO
-#pragma config LPBOR = ON
-#pragma config LVP = ON
-
-# 8 "/opt/microchip/xc8/v1.32/include/stdio.h"
-typedef int ptrdiff_t;
-typedef unsigned size_t;
-typedef unsigned short wchar_t;
-
-# 7 "/opt/microchip/xc8/v1.32/include/stdarg.h"
-typedef void * va_list[1];
-
-#pragma intrinsic(__va_start)
-extern void * __va_start(void);
-
-#pragma intrinsic(__va_arg)
-extern void * __va_arg(void *, ...);
-
-# 23 "/opt/microchip/xc8/v1.32/include/stdio.h"
-extern int errno;
-
-# 54
-struct __prbuf
-{
-char * ptr;
-void (* func)(char);
-};
-
-# 17 "/opt/microchip/xc8/v1.32/include/conio.h"
-extern int errno;
-
-
-extern void init_uart(void);
-
-extern char getch(void);
-extern char getche(void);
-extern void putch(char);
-extern void ungetch(char);
-
-extern __bit kbhit(void);
-
-# 31
-extern char * cgets(char *);
-extern void cputs(const char *);
-
-# 99 "/opt/microchip/xc8/v1.32/include/stdio.h"
-extern int cprintf(char *, ...);
-#pragma printf_check(cprintf)
-
-
-
-extern int _doprnt(struct __prbuf *, const register char *, register va_list);
-
-
-# 191
-#pragma printf_check(vprintf) const
-#pragma printf_check(vsprintf) const
-
-extern char * gets(char *);
-extern int puts(const char *);
-extern int scanf(const char *, ...) __attribute__((unsupported("scanf() is not supported by this compiler")));
-extern int sscanf(const char *, const char *, ...) __attribute__((unsupported("sscanf() is not supported by this compiler")));
-extern int vprintf(const char *, va_list) __attribute__((unsupported("vprintf() is not supported by this compiler")));
-extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler")));
-extern int vscanf(const char *, va_list ap) __attribute__((unsupported("vscanf() is not supported by this compiler")));
-extern int vsscanf(const char *, const char *, va_list) __attribute__((unsupported("vsscanf() is not supported by this compiler")));
-
-#pragma printf_check(printf) const
-#pragma printf_check(sprintf) const
-extern int sprintf(char *, const char *, ...);
-extern int printf(const char *, ...);
-
-# 13 "/opt/microchip/xc8/v1.32/include/stdint.h"
-typedef signed char int8_t;
-
-# 20
-typedef signed int int16_t;
-
-# 28
-typedef signed short long int int24_t;
-
-# 36
-typedef signed long int int32_t;
-
-# 43
-typedef unsigned char uint8_t;
-
-# 49
-typedef unsigned int uint16_t;
-
-# 56
-typedef unsigned short long int uint24_t;
-
-# 63
-typedef unsigned long int uint32_t;
-
-# 71
-typedef signed char int_least8_t;
-
-# 78
-typedef signed int int_least16_t;
-
-# 90
-typedef signed short long int int_least24_t;
-
-# 98
-typedef signed long int int_least32_t;
-
-# 105
-typedef unsigned char uint_least8_t;
-
-# 111
-typedef unsigned int uint_least16_t;
-
-# 121
-typedef unsigned short long int uint_least24_t;
-
-# 128
-typedef unsigned long int uint_least32_t;
-
-# 137
-typedef signed char int_fast8_t;
-
-# 144
-typedef signed int int_fast16_t;
-
-# 156
-typedef signed short long int int_fast24_t;
-
-# 164
-typedef signed long int int_fast32_t;
-
-# 171
-typedef unsigned char uint_fast8_t;
-
-# 177
-typedef unsigned int uint_fast16_t;
-
-# 187
-typedef unsigned short long int uint_fast24_t;
-
-# 194
-typedef unsigned long int uint_fast32_t;
-
-# 200
-typedef int32_t intmax_t;
-
-
-
-
-typedef uint32_t uintmax_t;
-
-
-
-
-typedef int16_t intptr_t;
-
-
-
-
-typedef uint16_t uintptr_t;
-
-# 27 "/opt/microchip/xc8/v1.32/include/stdlib.h"
-typedef struct {
-int rem;
-int quot;
-} div_t;
-typedef struct {
-unsigned rem;
-unsigned quot;
-} udiv_t;
-typedef struct {
-long quot;
-long rem;
-} ldiv_t;
-typedef struct {
-unsigned long quot;
-unsigned long rem;
-} uldiv_t;
-
-# 65
-extern double atof(const char *);
-extern double strtod(const char *, const char **);
-extern int atoi(const char *);
-extern unsigned xtoi(const char *);
-extern long atol(const char *);
-extern long strtol(const char *, char **, int);
-
-extern int rand(void);
-extern void srand(unsigned int);
-extern void * calloc(size_t, size_t);
-extern div_t div(int numer, int denom);
-extern udiv_t udiv(unsigned numer, unsigned denom);
-extern ldiv_t ldiv(long numer, long denom);
-extern uldiv_t uldiv(unsigned long numer,unsigned long denom);
-extern unsigned long _lrotl(unsigned long value, unsigned int shift);
-extern unsigned long _lrotr(unsigned long value, unsigned int shift);
-extern unsigned int _rotl(unsigned int value, unsigned int shift);
-extern unsigned int _rotr(unsigned int value, unsigned int shift);
-
-
-
-
-extern void * malloc(size_t);
-extern void free(void *);
-extern void * realloc(void *, size_t);
-
-extern void abort(void);
-extern void exit(int);
-extern int atexit(void (*)(void));
-extern char * getenv(const char *);
-extern char ** environ;
-extern int system(char *);
-extern void qsort(void *, size_t, size_t, int (*)(const void *, const void *));
-extern void * bsearch(const void *, void *, size_t, size_t, int(*)(const void *, const void *));
-extern int abs(int);
-extern long labs(long);
-
-
-extern char * itoa(char * buf, int val, int base);
-extern char * utoa(char * buf, unsigned val, int base);
-
-
-
-
-extern char * ltoa(char * buf, long val, int base);
-extern char * ultoa(char * buf, unsigned long val, int base);
-
-extern char * ftoa(float f, int * status);
-
-# 40 "main.c"
-uint8_t adc_buffer[256];
-uint8_t adc_buffer_write_pos = 0;
-uint8_t adc_buffer_read_pos = 0;
-
-void interrupt isr(void){
-
-if(PIR1bits.SSP1IF){
-
-uint8_t dummy = SSP1BUF;
-
-if(adc_buffer_write_pos != adc_buffer_read_pos)
-SSP1BUF = adc_buffer[adc_buffer_read_pos++];
-else
-SSP1BUF = 0x7F;
-
-PIR1bits.SSP1IF = 0;
-
-}
-else if(PIR1bits.ADIF){
-
-uint8_t adc_result = ADRESH;
-
-
-if(adc_result >= 0x80)
-adc_result -= 0x80;
-else
-adc_result += 0x80;
-
-if(adc_result == 0x7F)
-adc_buffer[adc_buffer_write_pos++] = 0x7E;
-else
-adc_buffer[adc_buffer_write_pos++] = adc_result;
-
-PIR1bits.ADIF = 0;
-
-}
-else if(INTCONbits.TMR0IF){
-
-TMR0 = TMR0 + 0x4E;
-
-
-ADCON0bits.GO = 1;
-
-INTCONbits.TMR0IF = 0;
-
-}
-
-}
-
-void main(void) {
-
-
-OSCCONbits.IRCF = 0b1111;
-OSCCONbits.SCS = 0b10;
-
-while(OSCSTATbits.HFIOFS == 0);
-
-SLRCONAbits.SLRA2 = 0;
-TRISAbits.TRISA2 = 0;
-LATAbits.LATA2 = 0;
-
-
-
-GIE = 0;
-PPSLOCK = 0x55;
-PPSLOCK = 0xAA;
-PPSLOCK = 0x00;
-
-
-RA5PPSbits.RA5PPS = 0b10010;
-SSPCLKPPSbits.SSPCLKPPS = 0b10000;
-SSPDATPPSbits.SSPDATPPS = 0b10001;
-
-
-PPSLOCK = 0x55;
-PPSLOCK = 0xAA;
-PPSLOCK = 0x01;
-
-
-OPA2CONbits.OPA2SP = 0;
-OPA2CONbits.OPA2UG = 0;
-OPA2CONbits.OPA2PCH = 0b00;
-
-OPA2CONbits.OPA2EN = 1;
-
-
-TRISAbits.TRISA4 = 1;
-
-
-PIE1bits.ADIE = 0;
-PIR1bits.ADIF = 0;
-
-ANSELA = 0;
-ANSELC = 0;
-ANSELAbits.ANSA4 = 1;
-
-ADCON0bits.CHS = 0b00011;
-
-ADCON1bits.ADFM = 0;
-ADCON1bits.ADCS = 0b111;
-ADCON1bits.ADPREF = 0b00;
-
-ADCON2bits.TRIGSEL = 0x0000;
-
-ADCON0bits.ADON = 1;
-
-PIE1bits.ADIE = 0;
-
-
-
-TRISAbits.TRISA5 = 0;
-TRISCbits.TRISC0 = 1;
-TRISCbits.TRISC1 = 1;
-
-
-PIR1bits.SSP1IF = 0;
-PIE1bits.SSP1IE = 0;
-
-SSP1STATbits.CKE = 0;
-SSP1STATbits.SMP = 0;
-
-SSP1CON1bits.CKP = 0;
-SSP1CON1bits.SSPM = 0b0101;
-
-SSP1CON3bits.BOEN = 1;
-
-
-
-SSP1CON1bits.SSPEN = 1;
-
-PIE1bits.SSP1IE = 1;
-
-
-
-
-INTCONbits.TMR0IE = 0;
-INTCONbits.TMR0IF = 0;
-
-OPTION_REGbits.T0CS = 0;
-OPTION_REGbits.PSA = 0;
-OPTION_REGbits.PS = 0b000;
-
-INTCONbits.TMR0IE = 1;
-
-
-INTCONbits.PEIE = 1;
-INTCONbits.GIE = 1;
-
-
-SSP1BUF = 'A';
-
-while(1){}
-
-}
-

--- a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.cmf
+++ /dev/null
@@ -1,537 +1,1 @@
-%CMF
-# %PSECTS Section
-# For each object file, details of its psects are enumerated here.
-# The begining of the section is indicated by %PSECTS.  The first
-# line indicates the name of the first object file, e.g.
-#    $foo.obj
-# Each line that follows describes a psect in that object file, until
-# the next object file.  The lines that describe a psect have the
-# format:
-#    <psect name> <class name> <space> <link address> <load addresses> <length> <delta>
-# All addresses and the length are given in unqualified hexadecimal
-# in delta units.  Any other numeric values are decimal.
-%PSECTS
-$/tmp/cgtFJOGTL.obj
-end_init CODE 0 68 68 2 2
-reset_vec CODE 0 0 0 2 2
-config CONFIG 0 8007 8007 2 2
-$dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-cinit CODE 0 6A 6A 10 2
-intentry CODE 0 4 4 64 2
-maintext CODE 0 7A 7A 67 2
-cstackCOMMON COMMON 1 70 70 5 1
-clrtext CODE 0 E1 E1 C 2
-bssCOMMON COMMON 1 75 75 2 1
-# %UNUSED Section
-# This section enumerates the unused ranges of each CLASS. Each entry
-# is described on a single line as follows:
-#    <class name> <range> <delta>
-# Addresses given in the range are in hexadecimal and units of delta.
-%UNUSED
-BANK0 00020-0006F 1
-BANK1 000A0-000EF 1
-BANK2 00120-0016F 1
-BIGRAM 02000-021EF 1
-CODE 00002-00003 2
-CODE 000ED-00FFF 2
-COMMON 00077-0007D 1
-CONST 00002-00003 2
-CONST 000ED-00FFF 2
-ENTRY 00002-00003 2
-ENTRY 000ED-00FFF 2
-IDLOC 08000-08003 2
-RAM 00020-0006F 1
-RAM 000A0-000EF 1
-RAM 00120-0016F 1
-SFR0 00000-0001F 1
-SFR1 00080-0009F 1
-SFR10 00500-0056F 1
-SFR11 00580-005EF 1
-SFR12 00600-0066F 1
-SFR13 00680-006EF 1
-SFR14 00700-0076F 1
-SFR15 00780-007EF 1
-SFR16 00800-0086F 1
-SFR17 00880-008EF 1
-SFR18 00900-0096F 1
-SFR19 00980-009EF 1
-SFR2 00100-0011F 1
-SFR20 00A00-00A6F 1
-SFR21 00A80-00AEF 1
-SFR22 00B00-00B6F 1
-SFR23 00B80-00BEF 1
-SFR24 00C00-00C6F 1
-SFR25 00C80-00CEF 1
-SFR26 00D00-00D6F 1
-SFR27 00D80-00DEF 1
-SFR28 00E00-00E6F 1
-SFR29 00E80-00EEF 1
-SFR3 00180-0019F 1
-SFR30 00F00-00F6F 1
-SFR31 00F80-00FEF 1
-SFR4 00200-0021F 1
-SFR5 00280-0029F 1
-SFR6 00300-0031F 1
-SFR7 00380-003EF 1
-SFR8 00400-0046F 1
-SFR9 00480-004EF 1
-STACK 02000-020EF 1
-STRCODE 00002-00003 2
-STRCODE 000ED-00FFF 2
-STRING 00002-00003 2
-STRING 000ED-00FFF 2
-# %LINETAB Section
-# This section enumerates the file/line to address mappings.
-# The beginning of the section is indicated by %LINETAB.
-# The first line indicates the name of the first object file, e.g.
-#   $foo.obj
-# Each line that follows describes a single mapping until the next
-# object file.  Mappings have the following format:
-#    <file name>:<line number> <address> <psect name> <class name>
-# The address is absolute and given given in unqualified hex 
-# in delta units of the psect. All mappings within an object file
-# are in ascending order of addresses.
-# All other numeric values are in decimal.
-%LINETAB
-$dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-"/opt/microchip/xc8/v1.32/include/pic16lf1704.h":11537 4 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":44 4 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":46 9 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":48 B intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":50 10 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":51 14 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":53 21 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":55 23 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":57 25 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":58 26 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":60 28 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":63 2D intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":64 31 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":66 34 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":68 38 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":69 3C intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":71 48 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":73 58 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":75 5A intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":76 5B intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":78 5D intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":81 60 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":83 62 intentry CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":87 63 intentry CODE
-"/tmp/cgtcwIImG":627 6A cinit CODE
-"/tmp/cgtcwIImG":630 6A cinit CODE
-"/tmp/cgtcwIImG":663 6A cinit CODE
-"/tmp/cgtcwIImG":664 6B cinit CODE
-"/tmp/cgtcwIImG":665 6C cinit CODE
-"/tmp/cgtcwIImG":666 6D cinit CODE
-"/tmp/cgtcwIImG":667 6E cinit CODE
-"/tmp/cgtcwIImG":668 6F cinit CODE
-"/tmp/cgtcwIImG":669 70 cinit CODE
-"/tmp/cgtcwIImG":670 71 cinit CODE
-"/tmp/cgtcwIImG":671 72 cinit CODE
-"/tmp/cgtcwIImG":675 74 cinit CODE
-"/tmp/cgtcwIImG":676 75 cinit CODE
-"/tmp/cgtcwIImG":682 76 cinit CODE
-"/tmp/cgtcwIImG":683 76 cinit CODE
-"/tmp/cgtcwIImG":684 77 cinit CODE
-"/tmp/cgtcwIImG":685 78 cinit CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":89 7A maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":92 7A maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":93 7D maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":95 81 maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":97 83 maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":98 85 maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":99 87 maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":103 89 maintext CODE
-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":104 8A maintext CODE
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-"/proj/BluetoothLE_AFSK_TNC/src/BLE_TNC_ADC_DAC.X/main.c":191 E0 maintext CODE
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-# %SYMTAB Section
-# An enumeration of all symbols in the program.
-# The beginning of the section is indicated by %SYMTAB.
-# Each line describes a single symbol as follows:
-#    <label> <value> [-]<load-adj> <class> <space> <psect> <file-name>
-# The value and load-adj are both in unqualified hexadecimal.
-# All other numeric values are in decimal.  The load-adj is the
-# quantity one needs to add to the symbol value in order to obtain the load
-# address of the symbol.  This value may be signed. If the symbol
-# was defined in a psect then <psect> will be "-". File-name
-# is the name of the object file in which the symbol was defined.
-%SYMTAB
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-ttemp 7E 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-wtemp 7E 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-start D0 0 CODE 0 init /tmp/cgtFJOGTL.obj
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-ttemp4 7F 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-wtemp4 86 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
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-wtemp6 7F 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
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-_SSPDATPPSbits E21 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hbigram 0 0 ABS 0 bigram -
-__Lbigram 0 0 ABS 0 bigram -
-__Hram 0 0 ABS 0 ram -
-__Lram 0 0 ABS 0 ram -
-__size_of_isr 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_STVREN$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_LPBOR$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_ZCDDIS$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hfunctab 0 0 CODE 0 functab -
-__Lfunctab 0 0 CODE 0 functab -
-__Hcommon 0 0 ABS 0 common -
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-_PIE1bits 91 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Heeprom_data 0 0 EEDATA 3 eeprom_data -
-__Leeprom_data 0 0 EEDATA 3 eeprom_data -
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-_LATAbits 10C 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-___int_sp 0 0 STACK 2 stack /tmp/cgtFJOGTL.obj
-__CFG_CLKOUTEN$OFF 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_ANSELA 18C 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_ANSELC 18E 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_ADRESH 9C 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Habs1 0 0 ABS 0 abs1 -
-__Labs1 0 0 ABS 0 abs1 -
-__Hsfr0 0 0 ABS 0 sfr0 -
-__Lsfr0 0 0 ABS 0 sfr0 -
-__Hsfr1 0 0 ABS 0 sfr1 -
-__Lsfr1 0 0 ABS 0 sfr1 -
-__Hsfr2 0 0 ABS 0 sfr2 -
-__Lsfr2 0 0 ABS 0 sfr2 -
-__Hsfr3 0 0 ABS 0 sfr3 -
-__Lsfr3 0 0 ABS 0 sfr3 -
-__Hsfr4 0 0 ABS 0 sfr4 -
-__Lsfr4 0 0 ABS 0 sfr4 -
-__Hsfr5 0 0 ABS 0 sfr5 -
-pic14e$flags 7E 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Lsfr5 0 0 ABS 0 sfr5 -
-__Hsfr6 0 0 ABS 0 sfr6 -
-__Lsfr6 0 0 ABS 0 sfr6 -
-__Hsfr7 0 0 ABS 0 sfr7 -
-__Lsfr7 0 0 ABS 0 sfr7 -
-__Hsfr8 0 0 ABS 0 sfr8 -
-__Lsfr8 0 0 ABS 0 sfr8 -
-__Hsfr9 0 0 ABS 0 sfr9 -
-__Lsfr9 0 0 ABS 0 sfr9 -
-isr@dummy 73 0 COMMON 1 cstackCOMMON dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hcode 0 0 ABS 0 code -
-__Lcode 0 0 ABS 0 code -
-stackhi 20EF 0 ABS 0 - /tmp/cgtFJOGTL.obj
-stacklo 2000 0 ABS 0 - /tmp/cgtFJOGTL.obj
-__Hinit D0 0 CODE 0 init -
-__Linit D0 0 CODE 0 init -
-__end_of_main 1C2 0 CODE 0 maintext dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Htext 0 0 ABS 0 text -
-__Ltext 0 0 ABS 0 text -
-__CFG_LVP$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-end_of_initialization EC 0 CODE 0 cinit dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hsfr10 0 0 ABS 0 sfr10 -
-__Lsfr10 0 0 ABS 0 sfr10 -
-__Hsfr20 0 0 ABS 0 sfr20 -
-__Lsfr20 0 0 ABS 0 sfr20 -
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-__Hsfr11 0 0 ABS 0 sfr11 -
-__Lsfr30 0 0 ABS 0 sfr30 -
-__Lsfr11 0 0 ABS 0 sfr11 -
-__Hsfr21 0 0 ABS 0 sfr21 -
-__Lsfr21 0 0 ABS 0 sfr21 -
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-__Hsfr12 0 0 ABS 0 sfr12 -
-__Lsfr31 0 0 ABS 0 sfr31 -
-__Lsfr12 0 0 ABS 0 sfr12 -
-__Hsfr22 0 0 ABS 0 sfr22 -
-__Lsfr22 0 0 ABS 0 sfr22 -
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-__Lsfr13 0 0 ABS 0 sfr13 -
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-__Hsfr14 0 0 ABS 0 sfr14 -
-__Lsfr14 0 0 ABS 0 sfr14 -
-__Hsfr24 0 0 ABS 0 sfr24 -
-__Lsfr24 0 0 ABS 0 sfr24 -
-__Hsfr15 0 0 ABS 0 sfr15 -
-__Lsfr15 0 0 ABS 0 sfr15 -
-__Hsfr25 0 0 ABS 0 sfr25 -
-__Lsfr25 0 0 ABS 0 sfr25 -
-__Hsfr16 0 0 ABS 0 sfr16 -
-__Lsfr16 0 0 ABS 0 sfr16 -
-__Hsfr26 0 0 ABS 0 sfr26 -
-__Lsfr26 0 0 ABS 0 sfr26 -
-__Hsfr17 0 0 ABS 0 sfr17 -
-__Lsfr17 0 0 ABS 0 sfr17 -
-__Hsfr27 0 0 ABS 0 sfr27 -
-__Lsfr27 0 0 ABS 0 sfr27 -
-__Hsfr18 0 0 ABS 0 sfr18 -
-__Lsfr18 0 0 ABS 0 sfr18 -
-__Hsfr28 0 0 ABS 0 sfr28 -
-__Lsfr28 0 0 ABS 0 sfr28 -
-__Hsfr19 0 0 ABS 0 sfr19 -
-__Lsfr19 0 0 ABS 0 sfr19 -
-__Hsfr29 0 0 ABS 0 sfr29 -
-__Lsfr29 0 0 ABS 0 sfr29 -
-_TRISAbits 8C 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_TRISCbits 8E 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hstrings 0 0 ABS 0 strings -
-__Lstrings 0 0 ABS 0 strings -
-_SSP1BUF 211 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_PPSLOCK E0F 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__pbssBIGRAM 20F0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hbank0 0 0 ABS 0 bank0 -
-__Lbank0 0 0 ABS 0 bank0 -
-__Hbank1 0 0 ABS 0 bank1 -
-__Lbank1 0 0 ABS 0 bank1 -
-__Hbank2 0 0 ABS 0 bank2 -
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-___latbits 1 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hbank4 0 0 ABS 0 bank4 -
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-__Hbank5 0 0 ABS 0 bank5 -
-__Lbank5 0 0 ABS 0 bank5 -
-__Hpowerup 0 0 CODE 0 powerup -
-__Lpowerup 0 0 CODE 0 powerup -
-__Hbank6 0 0 ABS 0 bank6 -
-__Lbank6 0 0 ABS 0 bank6 -
-__Hbank7 0 0 BANK7 1 bank7 -
-__Lbank7 0 0 BANK7 1 bank7 -
-__Hbank8 0 0 BANK8 1 bank8 -
-__Lbank8 0 0 BANK8 1 bank8 -
-__Hbank9 0 0 BANK9 1 bank9 -
-__Lbank9 0 0 BANK9 1 bank9 -
-__Hclrtext 0 0 ABS 0 clrtext -
-__Lclrtext 0 0 ABS 0 clrtext -
-_SLRCONAbits 30C 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_OPA2CONbits 515 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__end_of__initialization EC 0 CODE 0 cinit dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_OSCSTATbits 9A 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hidloc 0 0 IDLOC 0 idloc -
-__Lidloc 0 0 IDLOC 0 idloc -
-__Hstack 0 0 STACK 2 stack -
-__Lstack 0 0 STACK 2 stack -
-__Hspace_0 8009 0 ABS 0 - -
-__Lspace_0 0 0 ABS 0 - -
-__end_of_isr D0 0 CODE 0 intentry dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_adc_buffer_write_pos 76 0 COMMON 1 bssCOMMON dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__Hspace_1 77 0 ABS 0 - -
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-__Lspace_2 0 0 ABS 0 - -
-__Hcinit F4 0 CODE 0 cinit -
-__Lcinit D4 0 CODE 0 cinit -
-__Hspace_3 0 0 ABS 0 - -
-__Lspace_3 0 0 ABS 0 - -
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-_adc_buffer 20F0 0 ABS 1 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
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-__Hbank10 0 0 BANK10 1 bank10 -
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-__Lbank18 0 0 BANK18 1 bank18 -
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-_ADCON2bits 9F 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
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-__Hend_init D4 0 CODE 0 end_init -
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-__Hreset_vec 4 0 CODE 0 reset_vec -
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-__Hmaintext 0 0 ABS 0 maintext -
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-__CFG_IESO$OFF 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__pmaintext F4 0 CODE 0 maintext dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_MCLRE$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-_OPTION_REGbits 95 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_FOSC$INTOSC 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__initialization D4 0 CODE 0 cinit dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-isr@adc_result 74 0 COMMON 1 cstackCOMMON dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_CP$OFF 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-__CFG_FCMEN$ON 0 0 ABS 0 - dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-# %SPLITSTAB Section
-# This section enumerates all the psect splits performed by the assembler.
-# The beginning of the section is indicated by %SPLITSTAB.
-# Each line is a record a particular split, where the parent psect in on
-# the left and the child on the right.  Note that a child psect is always
-# split form the top of the parent psect. All splits from a given parent
-# are listed in the order in which they occurred.
-%SPLITSTAB
-# %DABS Section
-# This section contains a table of all usuage of the assember
-# directive DABS in the program. Each line has the following format:
-#   <name> <space> <address> <size>
-# If the DABS was originally labelled then that shall be <name>,
-# otherwise name will be "-".  The <space> number is in decimal.
-# <address> and <size> are in byte units as unqaulified hexadecimal
-%DABS
-- 1 320 10
-- 1 2A0 50
-- 1 220 50
-- 1 1A0 50
-_adc_buffer 1 20F0 0
-- 1 7E 2
-# %SEGMENTS Section
-# This sections enumerates the segments of the program.  Each segment
-# is described on a single line as follows:
-#    <name> <space> <link address> <file address> <size> <delta>
-# Addresses and size are in unqualified hexadecimal.  The link address
-# and size are in units of delta. The file address is in units of bytes.
-# All other numeric quantities are in decimal.
-%SEGMENTS
-reset_vec 0 0 0 2 2
-intentry 0 4 8 E9 2
-config 0 8007 1000E 2 2
-cstackCOMMON 1 70 70 7 1
 

 Binary files a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.elf and /dev/null differ
--- a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.hex
+++ /dev/null
@@ -1,35 +1,1 @@
-:0400000080316828BB
-:100008007E14803120007F08F200911D26282400EC
-:100018001108F0007008F300760875060319212806
-:100028007508F03E860087012030873D0108910061
-:100038000130F0007008F50723287F309100200078
-:1000480091116328111F5B2821001C08F00070081B
-:10005800F40080307402031C34288030F4023828FD
-:100068008030F0007008F40774087F3A031D4828B0
-:100078007608F03EF000F1012030F13D700886006E
-:10008800710887007E3053287608F03EF000F101B1
-:100098002030F13D700886007108870074088100DF
-:1000A8000130F0007008F6072000111363280B1DBB
-:1000B800632815084E3E950021009D140B11720807
-:1000C8002000FF007E10090080316A28F03084008B
-:1000D800203085000030FE000130FF008031E12033
-:1000E800F501F6017E10200080317A287830210051
-:1000F80099041908FC39023899001A1C812826002D
-:100108000C1121000C1122000C118B1355303C00EE
-:100118008F00AA308F008F013D001508E039123892
-:1001280095003C002008E0391038A0002108E0398B
-:100138001138A10055308F00AA308F0001308F0090
-:100148002A0015131512FC309505951721000C1679
-:1001580011132000111323008C018E010C162100AD
-:100168001D0883390C389D009E1370309E04FC30A6
-:100178009E050F309F051D1411138C120E148E143A
-:1001880020009111210091112400141394131512C9
-:100198001508F039053895001716951621009115A0
-:1001A8008B120B1195129511F83095058B160B17BC
-:1001B8008B17413024009100E02864008001013150
-:1001C8000130FE020030FF3B7F087E040319003433
-:0201D800E2281B
-:020000040001F9
-:04000E00E4EFFFF725
-:00000001FF
 

--- a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.hxl
+++ /dev/null
@@ -1,34 +1,1 @@
-### HEXMate logfile and output summary ###
-### Memory Usage ###
- Unused memory ranges:
-  4h - 7h
-  1DAh - 1000Dh
-  10012h - 1003Fh
-  
- dist/default/production/BLE_TNC_ADC_DAC.X.production.hex ranges:
-  0h - 3h
-  8h - 1D9h
-  1000Eh - 10011h
-  
-### Hex Memory Map ###
- Legend:
-  - = Unused memory
-  F = Filled ROM
-  S = Stored serial code
-  A = Stored ASCII string
-  R = Reserved for checksum
-  C = Stored checksum result
-  T = Trailing code
-  & = Find & replace opcode
-  X = Find & delete opcode
-  1 = dist/default/production/BLE_TNC_ADC_DAC.X.production.hex
-00000000: 1111----11111111111111111111111111111111111111111111111111111111
-00000040: 1111111111111111111111111111111111111111111111111111111111111111
-00000080: 1111111111111111111111111111111111111111111111111111111111111111
-000000C0: 1111111111111111111111111111111111111111111111111111111111111111
-00000100: 1111111111111111111111111111111111111111111111111111111111111111
-00000140: 1111111111111111111111111111111111111111111111111111111111111111
-00000180: 1111111111111111111111111111111111111111111111111111111111111111
-000001C0: 11111111111111111111111111--------------------------------------
-00010000: --------------1111----------------------------------------------
 

--- a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.lst
+++ /dev/null
@@ -1,1071 +1,1 @@
 
-
-Microchip Technology PIC LITE Macro Assembler V1.32 build 58300 
-                                                                                               Sat Aug  2 02:55:02 2014
-
-Microchip Technology Omniscient Code Generator (Lite mode) build 58300
-     1                           	processor	16LF1704
-     2                           	opt	pw 120
-     3                           	opt	lm
-     4                           	psect	intentry,global,class=CODE,delta=2
-     5                           	psect	cinit,global,class=CODE,merge=1,delta=2
-     6                           	psect	bssCOMMON,global,class=COMMON,space=1,delta=1
-     7                           	psect	clrtext,global,class=CODE,delta=2
-     8                           	psect	cstackCOMMON,global,class=COMMON,space=1,delta=1
-     9                           	psect	maintext,global,class=CODE,merge=1,split=1,delta=2
-    10                           	dabs	1,0x320,16
-    11                           	dabs	1,0x2A0,80
-    12                           	dabs	1,0x220,80
-    13                           	dabs	1,0x1A0,80
-    14                           	dabs	1,0x20F0,0,_adc_buffer
-    15                           	dabs	1,0x7E,2
-    16  0000                     	;# 
-    17  0001                     	;# 
-    18  0002                     	;# 
-    19  0003                     	;# 
-    20  0004                     	;# 
-    21  0005                     	;# 
-    22  0006                     	;# 
-    23  0007                     	;# 
-    24  0008                     	;# 
-    25  0009                     	;# 
-    26  000A                     	;# 
-    27  000B                     	;# 
-    28  000C                     	;# 
-    29  000E                     	;# 
-    30  0011                     	;# 
-    31  0012                     	;# 
-    32  0013                     	;# 
-    33  0015                     	;# 
-    34  0016                     	;# 
-    35  0016                     	;# 
-    36  0017                     	;# 
-    37  0018                     	;# 
-    38  0019                     	;# 
-    39  001A                     	;# 
-    40  001B                     	;# 
-    41  001C                     	;# 
-    42  008C                     	;# 
-    43  008E                     	;# 
-    44  0091                     	;# 
-    45  0092                     	;# 
-    46  0093                     	;# 
-    47  0095                     	;# 
-    48  0096                     	;# 
-    49  0097                     	;# 
-    50  0098                     	;# 
-    51  0099                     	;# 
-    52  009A                     	;# 
-    53  009B                     	;# 
-    54  009B                     	;# 
-    55  009C                     	;# 
-    56  009D                     	;# 
-    57  009E                     	;# 
-    58  009F                     	;# 
-    59  010C                     	;# 
-    60  010E                     	;# 
-    61  0111                     	;# 
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-    70  011C                     	;# 
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-    80  0196                     	;# 
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-    90  019B                     	;# 
-    91  019B                     	;# 
-    92  019C                     	;# 
-    93  019C                     	;# 
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-    98  019E                     	;# 
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-   100  019E                     	;# 
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-   106  020C                     	;# 
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-   109  0211                     	;# 
-   110  0212                     	;# 
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-   124  028C                     	;# 
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-   129  0293                     	;# 
-   130  0293                     	;# 
-   131  0298                     	;# 
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-   133  0299                     	;# 
-   134  029A                     	;# 
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-   137  030C                     	;# 
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-   150  041C                     	;# 
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-   161  061C                     	;# 
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-   168  0696                     	;# 
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-   176  069E                     	;# 
-   177  069F                     	;# 
-   178  0E0F                     	;# 
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-   180  0E11                     	;# 
-   181  0E12                     	;# 
-   182  0E13                     	;# 
-   183  0E14                     	;# 
-   184  0E15                     	;# 
-   185  0E17                     	;# 
-   186  0E20                     	;# 
-   187  0E21                     	;# 
-   188  0E22                     	;# 
-   189  0E24                     	;# 
-   190  0E25                     	;# 
-   191  0E28                     	;# 
-   192  0E29                     	;# 
-   193  0E2A                     	;# 
-   194  0E2B                     	;# 
-   195  0E90                     	;# 
-   196  0E91                     	;# 
-   197  0E92                     	;# 
-   198  0E94                     	;# 
-   199  0E95                     	;# 
-   200  0EA0                     	;# 
-   201  0EA1                     	;# 
-   202  0EA2                     	;# 
-   203  0EA3                     	;# 
-   204  0EA4                     	;# 
-   205  0EA5                     	;# 
-   206  0F0F                     	;# 
-   207  0F10                     	;# 
-   208  0F11                     	;# 
-   209  0F12                     	;# 
-   210  0F13                     	;# 
-   211  0F14                     	;# 
-   212  0F15                     	;# 
-   213  0F16                     	;# 
-   214  0F17                     	;# 
-   215  0F18                     	;# 
-   216  0F19                     	;# 
-   217  0F1A                     	;# 
-   218  0F1B                     	;# 
-   219  0F1C                     	;# 
-   220  0F1D                     	;# 
-   221  0F1E                     	;# 
-   222  0F1F                     	;# 
-   223  0F20                     	;# 
-   224  0F21                     	;# 
-   225  0F22                     	;# 
-   226  0F23                     	;# 
-   227  0F24                     	;# 
-   228  0F25                     	;# 
-   229  0F26                     	;# 
-   230  0F27                     	;# 
-   231  0F28                     	;# 
-   232  0F29                     	;# 
-   233  0F2A                     	;# 
-   234  0F2B                     	;# 
-   235  0F2C                     	;# 
-   236  0F2D                     	;# 
-   237  0FE4                     	;# 
-   238  0FE5                     	;# 
-   239  0FE6                     	;# 
-   240  0FE7                     	;# 
-   241  0FE8                     	;# 
-   242  0FE9                     	;# 
-   243  0FEA                     	;# 
-   244  0FEB                     	;# 
-   245  0FED                     	;# 
-   246  0FEE                     	;# 
-   247  0FEF                     	;_adc_buffer
-   248  000B                     _INTCONbits	set	11
-   249  0011                     _PIR1bits	set	17
-   250  0015                     _TMR0	set	21
-   251  005F                     _GIE	set	95
-   252  009D                     _ADCON0bits	set	157
-   253  009E                     _ADCON1bits	set	158
-   254  009F                     _ADCON2bits	set	159
-   255  009C                     _ADRESH	set	156
-   256  0095                     _OPTION_REGbits	set	149
-   257  0099                     _OSCCONbits	set	153
-   258  009A                     _OSCSTATbits	set	154
-   259  0091                     _PIE1bits	set	145
-   260  008C                     _TRISAbits	set	140
-   261  008E                     _TRISCbits	set	142
-   262  010C                     _LATAbits	set	268
-   263  018C                     _ANSELA	set	396
-   264  018C                     _ANSELAbits	set	396
-   265  018E                     _ANSELC	set	398
-   266  0211                     _SSP1BUF	set	529
-   267  0215                     _SSP1CON1bits	set	533
-   268  0217                     _SSP1CON3bits	set	535
-   269  0214                     _SSP1STATbits	set	532
-   270  030C                     _SLRCONAbits	set	780
-   271  0515                     _OPA2CONbits	set	1301
-   272  0E0F                     _PPSLOCK	set	3599
-   273  0E20                     _SSPCLKPPSbits	set	3616
-   274  0E21                     _SSPDATPPSbits	set	3617
-   275  0E95                     _RA5PPSbits	set	3733
-   276                           
-   277                           	psect	intentry
-   278  0004                     __pintentry:	
-   279                           
-   280                           ; #config settings
-   281  0000                     
-   282 ;; *************** function _isr *****************
-   283 ;; Defined at:
-   284 ;;		line 44 in file "main.c"
-   285 ;; Parameters:    Size  Location     Type
-   286 ;;		None
-   287 ;; Auto vars:     Size  Location     Type
-   288 ;;  adc_result      1    4[COMMON] unsigned char 
-   289 ;;  dummy           1    3[COMMON] unsigned char 
-   290 ;; Return value:  Size  Location     Type
-   291 ;;		None               void
-   292 ;; Registers used:
-   293 ;;		wreg, fsr1l, fsr1h, status,2, status,0
-   294 ;; Tracked objects:
-   295 ;;		On entry : 0/0
-   296 ;;		On exit  : 0/0
-   297 ;;		Unchanged: 0/0
-   298 ;; Data sizes:     COMMON   BANK0   BANK1   BANK2   BANK3   BANK4   BANK5   BANK6
-   299 ;;      Params:         0       0       0       0       0       0       0       0
-   300 ;;      Locals:         2       0       0       0       0       0       0       0
-   301 ;;      Temps:          3       0       0       0       0       0       0       0
-   302 ;;      Totals:         5       0       0       0       0       0       0       0
-   303 ;;Total ram usage:        5 bytes
-   304 ;; Hardware stack levels used:    1
-   305 ;; This function calls:
-   306 ;;		Nothing
-   307 ;; This function is called by:
-   308 ;;		Interrupt level 1
-   309 ;; This function uses a non-reentrant model
-   310 ;;
-   311  0004                     _isr:	
-   312                           
-   313                           ;incstack = 0
-   314                           ; Regs used in _isr: [wreg+fsr1l+fsr1h+status,2+status,0]
-   315  0004  147E               	bsf	126,0	;set compiler interrupt flag
-   316  0005  3180               	pagesel	$
-   317  0006  0020               	movlb	0	; select bank0
-   318  0007  087F               	movf	127,w
-   319  0008  00F2               	movwf	??_isr+2
-   320                           
-   321                           ;main.c: 46: if(PIR1bits.SSP1IF){
-   322  0009  1D91               	btfss	17,3	;volatile
-   323  000A  2826               	goto	i1l65
-   324                           
-   325                           ;main.c: 48: uint8_t dummy = SSP1BUF;
-   326  000B  0024               	movlb	4	; select bank4
-   327  000C  0811               	movf	17,w	;volatile
-   328  000D  00F0               	movwf	??_isr
-   329  000E  0870               	movf	??_isr,w
-   330  000F  00F3               	movwf	isr@dummy
-   331                           
-   332                           ;main.c: 50: if(adc_buffer_write_pos != adc_buffer_read_pos)
-   333  0010  0876               	movf	_adc_buffer_write_pos,w
-   334  0011  0675               	xorwf	_adc_buffer_read_pos,w
-   335  0012  1903               	skipnz
-   336  0013  2821               	goto	i1l466
-   337                           
-   338                           ;main.c: 51: SSP1BUF = adc_buffer[adc_buffer_read_pos++];
-   339  0014  0875               	movf	_adc_buffer_read_pos,w
-   340  0015  3EF0               	addlw	240
-   341  0016  0086               	movwf	6
-   342  0017  0187               	clrf	7
-   343  0018  3020               	movlw	32
-   344  0019  3D87               	addwfc	7,f
-   345  001A  0801               	movf	1,w
-   346  001B  0091               	movwf	17	;volatile
-   347  001C  3001               	movlw	1
-   348  001D  00F0               	movwf	??_isr
-   349  001E  0870               	movf	??_isr,w
-   350  001F  07F5               	addwf	_adc_buffer_read_pos,f
-   351  0020  2823               	goto	i1l468
-   352  0021                     i1l466:	
-   353                           
-   354                           ;main.c: 52: else
-   355                           ;main.c: 53: SSP1BUF = 0x7F;
-   356  0021  307F               	movlw	127
-   357  0022  0091               	movwf	17	;volatile
-   358  0023                     i1l468:	
-   359                           
-   360                           ;main.c: 55: PIR1bits.SSP1IF = 0;
-   361  0023  0020               	movlb	0	; select bank0
-   362  0024  1191               	bcf	17,3	;volatile
-   363                           
-   364                           ;main.c: 57: }
-   365  0025  2863               	goto	i1l76
-   366  0026                     i1l65:	
-   367                           
-   368                           ;main.c: 58: else if(PIR1bits.ADIF){
-   369  0026  1F11               	btfss	17,6	;volatile
-   370  0027  285B               	goto	i1l69
-   371                           
-   372                           ;main.c: 60: uint8_t adc_result = ADRESH;
-   373  0028  0021               	movlb	1	; select bank1
-   374  0029  081C               	movf	28,w	;volatile
-   375  002A  00F0               	movwf	??_isr
-   376  002B  0870               	movf	??_isr,w
-   377  002C  00F4               	movwf	isr@adc_result
-   378                           
-   379                           ;main.c: 63: if(adc_result >= 0x80)
-   380  002D  3080               	movlw	128
-   381  002E  0274               	subwf	isr@adc_result,w
-   382  002F  1C03               	skipc
-   383  0030  2834               	goto	i1l474
-   384                           
-   385                           ;main.c: 64: adc_result -= 0x80;
-   386  0031  3080               	movlw	128
-   387  0032  02F4               	subwf	isr@adc_result,f
-   388  0033  2838               	goto	i1l476
-   389  0034                     i1l474:	
-   390                           
-   391                           ;main.c: 65: else
-   392                           ;main.c: 66: adc_result += 0x80;
-   393  0034  3080               	movlw	128
-   394  0035  00F0               	movwf	??_isr
-   395  0036  0870               	movf	??_isr,w
-   396  0037  07F4               	addwf	isr@adc_result,f
-   397  0038                     i1l476:	
-   398                           
-   399                           ;main.c: 68: if(adc_result == 0x7F)
-   400  0038  0874               	movf	isr@adc_result,w
-   401  0039  3A7F               	xorlw	127
-   402  003A  1D03               	skipz
-   403  003B  2848               	goto	i1l482
-   404                           
-   405                           ;main.c: 69: adc_buffer[adc_buffer_write_pos++] = 0x7E;
-   406  003C  0876               	movf	_adc_buffer_write_pos,w
-   407  003D  3EF0               	addlw	240
-   408  003E  00F0               	movwf	??_isr
-   409  003F  01F1               	clrf	??_isr+1
-   410  0040  3020               	movlw	32
-   411  0041  3DF1               	addwfc	??_isr+1,f
-   412  0042  0870               	movf	??_isr,w
-   413  0043  0086               	movwf	6
-   414  0044  0871               	movf	??_isr+1,w
-   415  0045  0087               	movwf	7
-   416  0046  307E               	movlw	126
-   417  0047  2853               	goto	L1
-   418  0048                     i1l482:	
-   419                           
-   420                           ;main.c: 70: else
-   421                           ;main.c: 71: adc_buffer[adc_buffer_write_pos++] = adc_result;
-   422  0048  0876               	movf	_adc_buffer_write_pos,w
-   423  0049  3EF0               	addlw	240
-   424  004A  00F0               	movwf	??_isr
-   425  004B  01F1               	clrf	??_isr+1
-   426  004C  3020               	movlw	32
-   427  004D  3DF1               	addwfc	??_isr+1,f
-   428  004E  0870               	movf	??_isr,w
-   429  004F  0086               	movwf	6
-   430  0050  0871               	movf	??_isr+1,w
-   431  0051  0087               	movwf	7
-   432  0052  0874               	movf	isr@adc_result,w
-   433  0053                     L1:	
-   434  0053  0081               	movwf	1
-   435  0054  3001               	movlw	1
-   436  0055  00F0               	movwf	??_isr
-   437  0056  0870               	movf	??_isr,w
-   438  0057  07F6               	addwf	_adc_buffer_write_pos,f
-   439                           
-   440                           ;main.c: 73: PIR1bits.ADIF = 0;
-   441  0058  0020               	movlb	0	; select bank0
-   442  0059  1311               	bcf	17,6	;volatile
-   443                           
-   444                           ;main.c: 75: }
-   445  005A  2863               	goto	i1l76
-   446  005B                     i1l69:	
-   447                           
-   448                           ;main.c: 76: else if(INTCONbits.TMR0IF){
-   449  005B  1D0B               	btfss	11,2	;volatile
-   450  005C  2863               	goto	i1l76
-   451                           
-   452                           ;main.c: 78: TMR0 = TMR0 + 0x4E;
-   453  005D  0815               	movf	21,w	;volatile
-   454  005E  3E4E               	addlw	78
-   455  005F  0095               	movwf	21	;volatile
-   456                           
-   457                           ;main.c: 81: ADCON0bits.GO = 1;
-   458  0060  0021               	movlb	1	; select bank1
-   459  0061  149D               	bsf	29,1	;volatile
-   460                           
-   461                           ;main.c: 83: INTCONbits.TMR0IF = 0;
-   462  0062  110B               	bcf	11,2	;volatile
-   463  0063                     i1l76:	
-   464  0063  0872               	movf	??_isr+2,w
-   465  0064  0020               	movlb	0	; select bank0
-   466  0065  00FF               	movwf	127
-   467  0066  107E               	bcf	126,0	;clear compiler interrupt flag
-   468  0067  0009               	retfie
-   469  0068                     __end_of_isr:	
-   470  007E                     btemp	set	126	;btemp
-   471  007E                     pic14e$flags	set	126
-   472  007E                     wtemp	set	126
-   473  007E                     wtemp0	set	126
-   474  0080                     wtemp1	set	128
-   475  0082                     wtemp2	set	130
-   476  0084                     wtemp3	set	132
-   477  0086                     wtemp4	set	134
-   478  0088                     wtemp5	set	136
-   479  007F                     wtemp6	set	127
-   480  007E                     ttemp	set	126
-   481  007E                     ttemp0	set	126
-   482  0081                     ttemp1	set	129
-   483  0084                     ttemp2	set	132
-   484  0087                     ttemp3	set	135
-   485  007F                     ttemp4	set	127
-   486  007E                     ltemp	set	126
-   487  007E                     ltemp0	set	126
-   488  0082                     ltemp1	set	130
-   489  0086                     ltemp2	set	134
-   490  0080                     ltemp3	set	128
-   491  20F0                     
-   492                           	psect	cinit
-   493  006A                     start_initialization:	
-   494  006A                     __initialization:		;BIGRAM
-   495                           
-   496                           ; Clear objects allocated to BIGRAM
-   497  006A  30F0               	movlw	low (0+8432)
-   498  006B  0084               	movwf	4
-   499  006C  3020               	movlw	high (0+8432)
-   500  006D  0085               	movwf	5
-   501  006E  3000               	movlw	0
-   502  006F  00FE               	movwf	btemp
-   503  0070  3001               	movlw	1
-   504  0071  00FF               	movwf	btemp+1
-   505  0072  3180  20E1         	fcall	clear_ram0
-   506                           
-   507                           ; Clear objects allocated to COMMON
-   508  0074  01F5               	clrf	__pbssCOMMON& (0+127)
-   509  0075  01F6               	clrf	(__pbssCOMMON+1)& (0+127)
-   510  0076                     end_of_initialization:	
-   511                           ;End of C runtime variable initialization code
-   512                           
-   513  0076                     __end_of__initialization:	
-   514  0076  107E               	bcf	pic14e$flags,0	;clear compiler interrupt flag
-   515  0077  0020               	movlb	0
-   516  0078  3180  287A         	ljmp	_main	;jump to C main() function
-   517                           
-   518                           	psect	bssCOMMON
-   519  0075                     __pbssCOMMON:	
-   520  0075                     _adc_buffer_read_pos:	
-   521  0075                     	ds	1
-   522  0076                     _adc_buffer_write_pos:	
-   523  0076                     	ds	1
-   524                           
-   525                           	psect	clrtext
-   526  00E1                     clear_ram0:	
-   527                           ;	Called with FSR0 containing the base address, and
-   528                           ;	btemp/btemp+1 has the size to clear
-   529                           
-   530  00E1  0064               	clrwdt	;clear the watchdog before getting into this loop
-   531  00E2                     clrloop0:	
-   532  00E2  0180               	clrf	0	;clear RAM location pointed to by FSR
-   533  00E3  3101               	addfsr 0,1
-   534  00E4  3001               	movlw	1
-   535  00E5  02FE               	subwf	126,f
-   536  00E6  3000               	movlw	0
-   537  00E7  3BFF               	subwfb	127,f
-   538  00E8  087F               	movf	127,w
-   539  00E9  047E               	iorwf	126,w
-   540  00EA  1903               	btfsc	3,2
-   541  00EB  3400               	retlw	0	;all done for this memory range, return
-   542  00EC  28E2               	goto	clrloop0	;have we reached the end yet?
-   543                           
-   544                           	psect	cstackCOMMON
-   545  0070                     __pcstackCOMMON:	
-   546  0070                     ?_isr:	
-   547  0070                     ??_isr:	
-   548                           ; 0 bytes @ 0x0
-   549                           
-   550  0070                     ?_main:	
-   551                           ; 0 bytes @ 0x0
-   552                           
-   553                           
-   554                           ; 0 bytes @ 0x0
-   555  0070                     	ds	3
-   556  0073                     isr@dummy:	
-   557                           
-   558                           ; 1 bytes @ 0x3
-   559  0073                     	ds	1
-   560  0074                     isr@adc_result:	
-   561                           
-   562                           ; 1 bytes @ 0x4
-   563  0074                     	ds	1
-   564  0075                     ??_main:	
-   565                           
-   566                           	psect	maintext
-   567  007A                     __pmaintext:	
-   568                           ; 0 bytes @ 0x5
-   569 ;;
-   570 ;;Main: autosize = 0, tempsize = 0, incstack = 0, save=0
-   571 ;;
-   572 ;; *************** function _main *****************
-   573 ;; Defined at:
-   574 ;;		line 89 in file "main.c"
-   575 ;; Parameters:    Size  Location     Type
-   576 ;;		None
-   577 ;; Auto vars:     Size  Location     Type
-   578 ;;		None
-   579 ;; Return value:  Size  Location     Type
-   580 ;;		None               void
-   581 ;; Registers used:
-   582 ;;		wreg, status,2, status,0
-   583 ;; Tracked objects:
-   584 ;;		On entry : 17F/0
-   585 ;;		On exit  : 0/0
-   586 ;;		Unchanged: 0/0
-   587 ;; Data sizes:     COMMON   BANK0   BANK1   BANK2   BANK3   BANK4   BANK5   BANK6
-   588 ;;      Params:         0       0       0       0       0       0       0       0
-   589 ;;      Locals:         0       0       0       0       0       0       0       0
-   590 ;;      Temps:          0       0       0       0       0       0       0       0
-   591 ;;      Totals:         0       0       0       0       0       0       0       0
-   592 ;;Total ram usage:        0 bytes
-   593 ;; Hardware stack levels required when called:    1
-   594 ;; This function calls:
-   595 ;;		Nothing
-   596 ;; This function is called by:
-   597 ;;		Startup code after reset
-   598 ;; This function uses a non-reentrant model
-   599 ;;
-   600                           
-   601                           
-   602                           ;psect for function _main
-   603  007A                     _main:	
-   604                           
-   605                           ;main.c: 92: OSCCONbits.IRCF = 0b1111;
-   606                           
-   607                           ;incstack = 0
-   608                           ; Regs used in _main: [wreg+status,2+status,0]
-   609  007A  3078               	movlw	120
-   610  007B  0021               	movlb	1	; select bank1
-   611  007C  0499               	iorwf	25,f	;volatile
-   612                           
-   613                           ;main.c: 93: OSCCONbits.SCS = 0b10;
-   614  007D  0819               	movf	25,w	;volatile
-   615  007E  39FC               	andlw	-4
-   616  007F  3802               	iorlw	2
-   617  0080  0099               	movwf	25	;volatile
-   618  0081                     l79:	
-   619                           ;main.c: 95: while(OSCSTATbits.HFIOFS == 0);
-   620                           
-   621  0081  1C1A               	btfss	26,0	;volatile
-   622  0082  2881               	goto	l79
-   623                           
-   624                           ;main.c: 97: SLRCONAbits.SLRA2 = 0;
-   625  0083  0026               	movlb	6	; select bank6
-   626  0084  110C               	bcf	12,2	;volatile
-   627                           
-   628                           ;main.c: 98: TRISAbits.TRISA2 = 0;
-   629  0085  0021               	movlb	1	; select bank1
-   630  0086  110C               	bcf	12,2	;volatile
-   631                           
-   632                           ;main.c: 99: LATAbits.LATA2 = 0;
-   633  0087  0022               	movlb	2	; select bank2
-   634  0088  110C               	bcf	12,2	;volatile
-   635                           
-   636                           ;main.c: 103: GIE = 0;
-   637  0089  138B               	bcf	11,7	;volatile
-   638                           
-   639                           ;main.c: 104: PPSLOCK = 0x55;
-   640  008A  3055               	movlw	85
-   641  008B  003C               	movlb	28	; select bank28
-   642  008C  008F               	movwf	15	;volatile
-   643                           
-   644                           ;main.c: 105: PPSLOCK = 0xAA;
-   645  008D  30AA               	movlw	170
-   646  008E  008F               	movwf	15	;volatile
-   647                           
-   648                           ;main.c: 106: PPSLOCK = 0x00;
-   649  008F  018F               	clrf	15	;volatile
-   650                           
-   651                           ;main.c: 109: RA5PPSbits.RA5PPS = 0b10010;
-   652  0090  003D               	movlb	29	; select bank29
-   653  0091  0815               	movf	21,w	;volatile
-   654  0092  39E0               	andlw	-32
-   655  0093  3812               	iorlw	18
-   656  0094  0095               	movwf	21	;volatile
-   657                           
-   658                           ;main.c: 110: SSPCLKPPSbits.SSPCLKPPS = 0b10000;
-   659  0095  003C               	movlb	28	; select bank28
-   660  0096  0820               	movf	32,w	;volatile
-   661  0097  39E0               	andlw	-32
-   662  0098  3810               	iorlw	16
-   663  0099  00A0               	movwf	32	;volatile
-   664                           
-   665                           ;main.c: 111: SSPDATPPSbits.SSPDATPPS = 0b10001;
-   666  009A  0821               	movf	33,w	;volatile
-   667  009B  39E0               	andlw	-32
-   668  009C  3811               	iorlw	17
-   669  009D  00A1               	movwf	33	;volatile
-   670                           
-   671                           ;main.c: 114: PPSLOCK = 0x55;
-   672  009E  3055               	movlw	85
-   673  009F  008F               	movwf	15	;volatile
-   674                           
-   675                           ;main.c: 115: PPSLOCK = 0xAA;
-   676  00A0  30AA               	movlw	170
-   677  00A1  008F               	movwf	15	;volatile
-   678                           
-   679                           ;main.c: 116: PPSLOCK = 0x01;
-   680  00A2  3001               	movlw	1
-   681  00A3  008F               	movwf	15	;volatile
-   682                           
-   683                           ;main.c: 119: OPA2CONbits.OPA2SP = 0;
-   684  00A4  002A               	movlb	10	; select bank10
-   685  00A5  1315               	bcf	21,6	;volatile
-   686                           
-   687                           ;main.c: 120: OPA2CONbits.OPA2UG = 0;
-   688  00A6  1215               	bcf	21,4	;volatile
-   689                           
-   690                           ;main.c: 121: OPA2CONbits.OPA2PCH = 0b00;
-   691  00A7  30FC               	movlw	-4
-   692  00A8  0595               	andwf	21,f	;volatile
-   693                           
-   694                           ;main.c: 123: OPA2CONbits.OPA2EN = 1;
-   695  00A9  1795               	bsf	21,7	;volatile
-   696                           
-   697                           ;main.c: 126: TRISAbits.TRISA4 = 1;
-   698  00AA  0021               	movlb	1	; select bank1
-   699  00AB  160C               	bsf	12,4	;volatile
-   700                           
-   701                           ;main.c: 129: PIE1bits.ADIE = 0;
-   702  00AC  1311               	bcf	17,6	;volatile
-   703                           
-   704                           ;main.c: 130: PIR1bits.ADIF = 0;
-   705  00AD  0020               	movlb	0	; select bank0
-   706  00AE  1311               	bcf	17,6	;volatile
-   707                           
-   708                           ;main.c: 132: ANSELA = 0;
-   709  00AF  0023               	movlb	3	; select bank3
-   710  00B0  018C               	clrf	12	;volatile
-   711                           
-   712                           ;main.c: 133: ANSELC = 0;
-   713  00B1  018E               	clrf	14	;volatile
-   714                           
-   715                           ;main.c: 134: ANSELAbits.ANSA4 = 1;
-   716  00B2  160C               	bsf	12,4	;volatile
-   717                           
-   718                           ;main.c: 136: ADCON0bits.CHS = 0b00011;
-   719  00B3  0021               	movlb	1	; select bank1
-   720  00B4  081D               	movf	29,w	;volatile
-   721  00B5  3983               	andlw	-125
-   722  00B6  380C               	iorlw	12
-   723  00B7  009D               	movwf	29	;volatile
-   724                           
-   725                           ;main.c: 138: ADCON1bits.ADFM = 0;
-   726  00B8  139E               	bcf	30,7	;volatile
-   727                           
-   728                           ;main.c: 139: ADCON1bits.ADCS = 0b111;
-   729  00B9  3070               	movlw	112
-   730  00BA  049E               	iorwf	30,f	;volatile
-   731                           
-   732                           ;main.c: 140: ADCON1bits.ADPREF = 0b00;
-   733  00BB  30FC               	movlw	-4
-   734  00BC  059E               	andwf	30,f	;volatile
-   735                           
-   736                           ;main.c: 142: ADCON2bits.TRIGSEL = 0x0000;
-   737  00BD  300F               	movlw	-241
-   738  00BE  059F               	andwf	31,f	;volatile
-   739                           
-   740                           ;main.c: 144: ADCON0bits.ADON = 1;
-   741  00BF  141D               	bsf	29,0	;volatile
-   742                           
-   743                           ;main.c: 146: PIE1bits.ADIE = 0;
-   744  00C0  1311               	bcf	17,6	;volatile
-   745                           
-   746                           ;main.c: 150: TRISAbits.TRISA5 = 0;
-   747  00C1  128C               	bcf	12,5	;volatile
-   748                           
-   749                           ;main.c: 151: TRISCbits.TRISC0 = 1;
-   750  00C2  140E               	bsf	14,0	;volatile
-   751                           
-   752                           ;main.c: 152: TRISCbits.TRISC1 = 1;
-   753  00C3  148E               	bsf	14,1	;volatile
-   754                           
-   755                           ;main.c: 155: PIR1bits.SSP1IF = 0;
-   756  00C4  0020               	movlb	0	; select bank0
-   757  00C5  1191               	bcf	17,3	;volatile
-   758                           
-   759                           ;main.c: 156: PIE1bits.SSP1IE = 0;
-   760  00C6  0021               	movlb	1	; select bank1
-   761  00C7  1191               	bcf	17,3	;volatile
-   762                           
-   763                           ;main.c: 158: SSP1STATbits.CKE = 0;
-   764  00C8  0024               	movlb	4	; select bank4
-   765  00C9  1314               	bcf	20,6	;volatile
-   766                           
-   767                           ;main.c: 159: SSP1STATbits.SMP = 0;
-   768  00CA  1394               	bcf	20,7	;volatile
-   769                           
-   770                           ;main.c: 161: SSP1CON1bits.CKP = 0;
-   771  00CB  1215               	bcf	21,4	;volatile
-   772                           
-   773                           ;main.c: 162: SSP1CON1bits.SSPM = 0b0101;
-   774  00CC  0815               	movf	21,w	;volatile
-   775  00CD  39F0               	andlw	-16
-   776  00CE  3805               	iorlw	5
-   777  00CF  0095               	movwf	21	;volatile
-   778                           
-   779                           ;main.c: 164: SSP1CON3bits.BOEN = 1;
-   780  00D0  1617               	bsf	23,4	;volatile
-   781                           
-   782                           ;main.c: 168: SSP1CON1bits.SSPEN = 1;
-   783  00D1  1695               	bsf	21,5	;volatile
-   784                           
-   785                           ;main.c: 170: PIE1bits.SSP1IE = 1;
-   786  00D2  0021               	movlb	1	; select bank1
-   787  00D3  1591               	bsf	17,3	;volatile
-   788                           
-   789                           ;main.c: 175: INTCONbits.TMR0IE = 0;
-   790  00D4  128B               	bcf	11,5	;volatile
-   791                           
-   792                           ;main.c: 176: INTCONbits.TMR0IF = 0;
-   793  00D5  110B               	bcf	11,2	;volatile
-   794                           
-   795                           ;main.c: 178: OPTION_REGbits.T0CS = 0;
-   796  00D6  1295               	bcf	21,5	;volatile
-   797                           
-   798                           ;main.c: 179: OPTION_REGbits.PSA = 0;
-   799  00D7  1195               	bcf	21,3	;volatile
-   800                           
-   801                           ;main.c: 180: OPTION_REGbits.PS = 0b000;
-   802  00D8  30F8               	movlw	-8
-   803  00D9  0595               	andwf	21,f	;volatile
-   804                           
-   805                           ;main.c: 182: INTCONbits.TMR0IE = 1;
-   806  00DA  168B               	bsf	11,5	;volatile
-   807                           
-   808                           ;main.c: 185: INTCONbits.PEIE = 1;
-   809  00DB  170B               	bsf	11,6	;volatile
-   810                           
-   811                           ;main.c: 186: INTCONbits.GIE = 1;
-   812  00DC  178B               	bsf	11,7	;volatile
-   813                           
-   814                           ;main.c: 189: SSP1BUF = 'A';
-   815  00DD  3041               	movlw	65
-   816  00DE  0024               	movlb	4	; select bank4
-   817  00DF  0091               	movwf	17	;volatile
-   818  00E0                     l82:	
-   819                           ;main.c: 191: while(1){}
-   820                           
-   821  00E0  28E0               	goto	l82
-   822  00E1                     __end_of_main:	
-
-
-Data Sizes:
-    Strings     0
-    Constant    0
-    Data        0
-    BSS         2
-    Persistent  0
-    Stack       0
-
-Auto Spaces:
-    Space          Size  Autos    Used
-    COMMON           14      5       7
-    BANK0            80      0       0
-    BANK1            80      0       0
-    BANK2            80      0       0
-    BANK3             0      0       0
-    BANK4             0      0       0
-    BANK5             0      0       0
-    BANK6             0      0       0
-
-Pointer List with Targets:
-
-    None.
-
-Critical Paths under _main in COMMON
-
-    None.
-
-Critical Paths under _isr in COMMON
-
-    None.
-
-Critical Paths under _main in BANK0
-
-    None.
-
-Critical Paths under _isr in BANK0
-
-    None.
-
-Critical Paths under _main in BANK1
-
-    None.
-
-Critical Paths under _isr in BANK1
-
-    None.
-
-Critical Paths under _main in BANK2
-
-    None.
-
-Critical Paths under _isr in BANK2
-
-    None.
-
-Critical Paths under _main in BANK3
-
-    None.
-
-Critical Paths under _isr in BANK3
-
-    None.
-
-Critical Paths under _main in BANK4
-
-    None.
-
-Critical Paths under _isr in BANK4
-
-    None.
-
-Critical Paths under _main in BANK5
-
-    None.
-
-Critical Paths under _isr in BANK5
-
-    None.
-
-Critical Paths under _main in BANK6
-
-    None.
-
-Critical Paths under _isr in BANK6
-
-    None.
-
-Call Graph Tables:
-
- ---------------------------------------------------------------------------------
- (Depth) Function   	        Calls       Base Space   Used Autos Params    Refs
- ---------------------------------------------------------------------------------
- (0) _main                                                 0     0      0       0
- ---------------------------------------------------------------------------------
- Estimated maximum stack depth 0
- ---------------------------------------------------------------------------------
- (Depth) Function   	        Calls       Base Space   Used Autos Params    Refs
- ---------------------------------------------------------------------------------
- (1) _isr                                                  5     5      0      45
-                                              0 COMMON     5     5      0
- ---------------------------------------------------------------------------------
- Estimated maximum stack depth 1
- ---------------------------------------------------------------------------------
-
- Call Graph Graphs:
-
- _main (ROOT)
-
- _isr (ROOT)
-
- Address spaces:
-Name               Size   Autos  Total    Cost      Usage
-BIGRAM             1F0      0       0       0        0.0%
-NULL                 0      0       0       0        0.0%
-CODE                 0      0       0       0        0.0%
-BITCOMMON            E      0       0       1        0.0%
-BITSFR0              0      0       0       1        0.0%
-SFR0                 0      0       0       1        0.0%
-COMMON               E      5       7       2       50.0%
-BITSFR1              0      0       0       2        0.0%
-SFR1                 0      0       0       2        0.0%
-BITSFR2              0      0       0       3        0.0%
-SFR2                 0      0       0       3        0.0%
-STACK                0      0       0       3        0.0%
-BITSFR3              0      0       0       4        0.0%
-SFR3                 0      0       0       4        0.0%
-ABS                  0      0       7       4        0.0%
-BITBANK0            50      0       0       5        0.0%
-BITSFR4              0      0       0       5        0.0%
-SFR4                 0      0       0       5        0.0%
-BANK0               50      0       0       6        0.0%
-BITSFR5              0      0       0       6        0.0%
-SFR5                 0      0       0       6        0.0%
-BITBANK1            50      0       0       7        0.0%
-BITSFR6              0      0       0       7        0.0%
-SFR6                 0      0       0       7        0.0%
-BANK1               50      0       0       8        0.0%
-BITSFR7              0      0       0       8        0.0%
-SFR7                 0      0       0       8        0.0%
-BITBANK2            50      0       0       9        0.0%
-BITSFR8              0      0       0       9        0.0%
-SFR8                 0      0       0       9        0.0%
-BANK2               50      0       0      10        0.0%
-BITSFR9              0      0       0      10        0.0%
-SFR9                 0      0       0      10        0.0%
-BITBANK3            50      0       0      11        0.0%
-BITSFR10             0      0       0      11        0.0%
-SFR10                0      0       0      11        0.0%
-BITSFR11             0      0       0      12        0.0%
-SFR11                0      0       0      12        0.0%
-BANK3                0      0       0      12        0.0%
-BITBANK4            50      0       0      13        0.0%
-BITSFR12             0      0       0      13        0.0%
-SFR12                0      0       0      13        0.0%
-BITSFR13             0      0       0      14        0.0%
-SFR13                0      0       0      14        0.0%
-BANK4                0      0       0      14        0.0%
-BITBANK5            50      0       0      15        0.0%
-BITSFR14             0      0       0      15        0.0%
-SFR14                0      0       0      15        0.0%
-BITSFR15             0      0       0      16        0.0%
-SFR15                0      0       0      16        0.0%
-BANK5                0      0       0      16        0.0%
-BITBANK6            10      0       0      17        0.0%
-BITSFR16             0      0       0      17        0.0%
-SFR16                0      0       0      17        0.0%
-BITSFR17             0      0       0      18        0.0%
-SFR17                0      0       0      18        0.0%
-BANK6                0      0       0      18        0.0%
-BITSFR18             0      0       0      19        0.0%
-SFR18                0      0       0      19        0.0%
-DATA                 0      0       7      19        0.0%
-BITSFR19             0      0       0      20        0.0%
-SFR19                0      0       0      20        0.0%
-BITSFR20             0      0       0      21        0.0%
-SFR20                0      0       0      21        0.0%
-BITSFR21             0      0       0      22        0.0%
-SFR21                0      0       0      22        0.0%
-BITSFR22             0      0       0      23        0.0%
-SFR22                0      0       0      23        0.0%
-BITSFR23             0      0       0      24        0.0%
-SFR23                0      0       0      24        0.0%
-BITSFR24             0      0       0      25        0.0%
-SFR24                0      0       0      25        0.0%
-BITSFR25             0      0       0      26        0.0%
-SFR25                0      0       0      26        0.0%
-BITSFR26             0      0       0      27        0.0%
-SFR26                0      0       0      27        0.0%
-BITSFR27             0      0       0      28        0.0%
-SFR27                0      0       0      28        0.0%
-BITSFR28             0      0       0      29        0.0%
-SFR28                0      0       0      29        0.0%
-BITSFR29             0      0       0      30        0.0%
-SFR29                0      0       0      30        0.0%
-BITSFR30             0      0       0      31        0.0%
-SFR30                0      0       0      31        0.0%
-BITSFR31             0      0       0      32        0.0%
-SFR31                0      0       0      32        0.0%
-
-
-Microchip Technology PIC Macro Assembler V1.32 build 58300 
-Symbol Table                                                                                   Sat Aug  2 02:55:02 2014
-
-            __CFG_CP$OFF 0000                       l82 00E0                       l79 0081  
-            __CFG_LVP$ON 0000                      _GIE 005F                      _isr 0004  
-           __CFG_BORV$LO 0000                     ?_isr 0070                     i1l65 0026  
-                   i1l76 0063                     i1l69 005B                     _TMR0 0015  
-           __CFG_WRT$OFF 0000            __CFG_FCMEN$ON 0000                     _main 007A  
-                   fsr0h 0005                     fsr1h 0007                     fsr0l 0004  
-                   indf0 0000                     indf1 0001                     fsr1l 0006  
-                   btemp 007E            __CFG_BOREN$ON 0000                     ltemp 007E  
-                   start 0068                     ttemp 007E                     wtemp 007E  
-          __CFG_IESO$OFF 0000            __CFG_MCLRE$ON 0000            __CFG_LPBOR$ON 0000  
-                  ??_isr 0070            __CFG_PLLEN$ON 0000                    ?_main 0070  
-          __CFG_WDTE$OFF 0000                    i1l482 0048                    i1l474 0034  
-                  i1l466 0021                    i1l476 0038                    i1l468 0023  
-                  ltemp0 007E                    ltemp1 0082                    ltemp2 0086  
-                  ltemp3 0080                    ttemp0 007E                    ttemp1 0081  
-                  ttemp2 0084                    ttemp3 0087                    ttemp4 007F  
-                  wtemp0 007E                    wtemp1 0080                    wtemp2 0082  
-                  wtemp3 0084                    wtemp4 0086                    wtemp5 0088  
-                  wtemp6 007F          __initialization 006A             __end_of_main 00E1  
-                 ??_main 0075                   _ADRESH 009C           __CFG_ZCDDIS$ON 0000  
-                 _ANSELA 018C                   _ANSELC 018E           __CFG_PWRTE$OFF 0000  
-         __CFG_STVREN$ON 0000  __end_of__initialization 0076           __pcstackCOMMON 0070  
-             _adc_buffer 20F0           _OPTION_REGbits 0095               __pmaintext 007A  
-        __CFG_PPS1WAY$ON 0000               __pintentry 0004      _adc_buffer_read_pos 0075  
-                _PPSLOCK 0E0F                  _SSP1BUF 0211             __size_of_isr 0064  
-                clrloop0 00E2     end_of_initialization 0076         __CFG_FOSC$INTOSC 0000  
-              _TRISAbits 008C                _TRISCbits 008E      start_initialization 006A  
-            __end_of_isr 0068            isr@adc_result 0074              __pbssBIGRAM 20F0  
-            __pbssCOMMON 0075                ___latbits 0001                 _LATAbits 010C  
-              clear_ram0 00E1                 _PIE1bits 0091                 _PIR1bits 0011  
-             _ADCON0bits 009D               _ADCON1bits 009E               _ADCON2bits 009F  
-            _OPA2CONbits 0515     _adc_buffer_write_pos 0076               _ANSELAbits 018C  
-           _SSP1CON1bits 0215             _SSP1CON3bits 0217            __size_of_main 0067  
-          _SSPDATPPSbits 0E21               _RA5PPSbits 0E95            _SSPCLKPPSbits 0E20  
-           _SSP1STATbits 0214              _OSCSTATbits 009A               _INTCONbits 000B  
-               isr@dummy 0073              pic14e$flags 007E                 intlevel1 0000  
-            _SLRCONAbits 030C        __CFG_CLKOUTEN$OFF 0000               _OSCCONbits 0099  
-

--- a/src/BLE_TNC_ADC_DAC.X/dist/default/production/BLE_TNC_ADC_DAC.X.production.map
+++ /dev/null
@@ -1,652 +1,1 @@
-Microchip MPLAB XC8 Compiler V1.32 ()
 
-Linker command line:
-
---edf=/opt/microchip/xc8/v1.32/dat/en_msgs.txt -cs \
-  -h+dist/default/production/BLE_TNC_ADC_DAC.X.production.sym \
-  --cmf=dist/default/production/BLE_TNC_ADC_DAC.X.production.cmf -z \
-  -Q16LF1704 -o/tmp/cgt1f8SNj \
-  -Mdist/default/production/BLE_TNC_ADC_DAC.X.production.map -E1 -ver=XC8 \
-  -ASTACK=02000h-020efh -pstack=STACK -ACONST=00h-0FFhx16 \
-  -ACODE=00h-07FFhx2 -ASTRCODE=00h-0FFFh -AENTRY=00h-0FFhx16 \
-  -ASTRING=00h-0FFhx16 -ACOMMON=070h-07Fh -ABANK0=020h-06Fh \
-  -ABANK1=0A0h-0EFh -ABANK2=0120h-016Fh -ABANK3=01A0h-01EFh \
-  -ABANK4=0220h-026Fh -ABANK5=02A0h-02EFh -ABANK6=0320h-032Fh \
-  -ABIGRAM=02000h-021EFh \
-  -ARAM=020h-06Fh,0A0h-0EFh,0120h-016Fh,01A0h-01EFh,0220h-026Fh,02A0h-02EFh,0320h-032Fh \
-  -AABS1=020h-07Fh,0A0h-0EFh,0120h-016Fh,01A0h-01EFh,0220h-026Fh,02A0h-02EFh,0320h-032Fh \
-  -ASFR0=00h-01Fh -ASFR1=080h-09Fh -ASFR2=0100h-011Fh -ASFR3=0180h-019Fh \
-  -ASFR4=0200h-021Fh -ASFR5=0280h-029Fh -ASFR6=0300h-031Fh \
-  -ASFR7=0380h-03EFh -ASFR8=0400h-046Fh -ASFR9=0480h-04EFh \
-  -ASFR10=0500h-056Fh -ASFR11=0580h-05EFh -ASFR12=0600h-066Fh \
-  -ASFR13=0680h-06EFh -ASFR14=0700h-076Fh -ASFR15=0780h-07EFh \
-  -ASFR16=0800h-086Fh -ASFR17=0880h-08EFh -ASFR18=0900h-096Fh \
-  -ASFR19=0980h-09EFh -ASFR20=0A00h-0A6Fh -ASFR21=0A80h-0AEFh \
-  -ASFR22=0B00h-0B6Fh -ASFR23=0B80h-0BEFh -ASFR24=0C00h-0C6Fh \
-  -ASFR25=0C80h-0CEFh -ASFR26=0D00h-0D6Fh -ASFR27=0D80h-0DEFh \
-  -ASFR28=0E00h-0E6Fh -ASFR29=0E80h-0EEFh -ASFR30=0F00h-0F6Fh \
-  -ASFR31=0F80h-0FEFh -preset_vec=00h,intentry=04h,init,end_init \
-  -ppowerup=CODE -pcinit=CODE -pfunctab=CODE -ACONFIG=08007h-08008h \
-  -pconfig=CONFIG -DCONFIG=2 -AIDLOC=08000h-08003h -pidloc=IDLOC -DIDLOC=2 \
-  -DCODE=2 -DSTRCODE=2 -DSTRING=2 -DCONST=2 -DENTRY=2 -k /tmp/cgtFJOGTL.obj \
-  dist/default/production/BLE_TNC_ADC_DAC.X.production.obj 
-
-Object code version is 3.11
-
-Machine type is 16LF1704
-
-
-
-                Name                               Link     Load   Length Selector   Space Scale
-/tmp/cgtFJOGTL.obj
-                end_init                             68       68        2        8       0
-                reset_vec                             0        0        2        0       0
-                config                             8007     8007        2    1000E       0
-dist/default/production/BLE_TNC_ADC_DAC.X.production.obj
-                cinit                                6A       6A       10        8       0
-                intentry                              4        4       64        8       0
-                maintext                             7A       7A       67        8       0
-                cstackCOMMON                         70       70        5       70       1
-                clrtext                              E1       E1        C        8       0
-                bssCOMMON                            75       75        2       70       1
-
-TOTAL           Name                               Link     Load   Length     Space
-        CLASS   STACK          
-
-        CLASS   CONST          
-
-        CLASS   CODE           
-                end_init                             68       68        2         0
-                cinit                                6A       6A       10         0
-                intentry                              4        4       64         0
-                reset_vec                             0        0        2         0
-                maintext                             7A       7A       67         0
-                clrtext                              E1       E1        C         0
-
-        CLASS   STRCODE        
-
-        CLASS   ENTRY          
-
-        CLASS   STRING         
-
-        CLASS   COMMON         
-                cstackCOMMON                         70       70        5         1
-                bssCOMMON                            75       75        2         1
-
-        CLASS   BANK0          
-
-        CLASS   BANK1          
-
-        CLASS   BANK2          
-
-        CLASS   BANK3          
-
-        CLASS   BANK4          
-
-        CLASS   BANK5          
-
-        CLASS   BANK6          
-
-        CLASS   BIGRAM         
-
-        CLASS   RAM            
-
-        CLASS   ABS1           
-                abs_s1                               7E       7E        2         1
-                abs_s1                              1A0      1A0       50         1
-                abs_s1                              220      220       50         1
-                abs_s1                              2A0      2A0       50         1
-                abs_s1                              320      320       10         1
-                abs_s1                             20F0     20F0        0         1
-
-        CLASS   SFR0           
-
-        CLASS   SFR1           
-
-        CLASS   SFR2           
-
-        CLASS   SFR3           
-
-        CLASS   SFR4           
-
-        CLASS   SFR5           
-
-        CLASS   SFR6           
-
-        CLASS   SFR7           
-
-        CLASS   SFR8           
-
-        CLASS   SFR9           
-
-        CLASS   SFR10          
-
-        CLASS   SFR11          
-
-        CLASS   SFR12          
-
-        CLASS   SFR13          
-
-        CLASS   SFR14          
-
-        CLASS   SFR15          
-
-        CLASS   SFR16          
-
-        CLASS   SFR17          
-
-        CLASS   SFR18          
-
-        CLASS   SFR19          
-
-        CLASS   SFR20          
-
-        CLASS   SFR21          
-
-        CLASS   SFR22          
-
-        CLASS   SFR23          
-
-        CLASS   SFR24          
-
-        CLASS   SFR25          
-
-        CLASS   SFR26          
-
-        CLASS   SFR27          
-
-        CLASS   SFR28          
-
-        CLASS   SFR29          
-
-        CLASS   SFR30          
-
-        CLASS   SFR31          
-
-        CLASS   CONFIG         
-                config                             8007     8007        2         0
-
-        CLASS   IDLOC          
-
-        CLASS   BANK31         
-
-        CLASS   BANK30         
-
-        CLASS   BANK29         
-
-        CLASS   BANK28         
-
-        CLASS   BANK27         
-
-        CLASS   BANK26         
-
-        CLASS   BANK25         
-
-        CLASS   BANK24         
-
-        CLASS   BANK23         
-
-        CLASS   BANK22         
-
-        CLASS   BANK21         
-
-        CLASS   BANK20         
-
-        CLASS   BANK19         
-
-        CLASS   BANK18         
-
-        CLASS   BANK17         
-
-        CLASS   BANK16         
-
-        CLASS   BANK15         
-
-        CLASS   BANK14         
-
-        CLASS   BANK13         
-
-        CLASS   BANK12         
-
-        CLASS   BANK11         
-
-        CLASS   BANK10         
-
-        CLASS   BANK9          
-
-        CLASS   BANK8          
-
-        CLASS   BANK7          
-
-        CLASS   EEDATA         
-
-
-
-SEGMENTS        Name                           Load    Length   Top    Selector   Space  Class     Delta
-
-                reset_vec                      000000  000002  000002         0       0  CODE        2
-                intentry                       000004  0000E9  0000ED         8       0  CODE        2
-                cstackCOMMON                   000070  000007  000077        70       1  COMMON      1
-                config                         008007  000002  008009     1000E       0  CONFIG      2
-
-
-UNUSED ADDRESS RANGES
-
-        Name                Unused          Largest block    Delta
-        BANK0            00020-0006F              50           1
-        BANK1            000A0-000EF              50           1
-        BANK2            00120-0016F              50           1
-        BIGRAM           02000-021EF             1F0           1
-        CODE             00002-00003               2           2
-                         000ED-00FFF             713
-        COMMON           00077-0007D               7           1
-        CONST            00002-00003               2           2
-                         000ED-00FFF             100
-        ENTRY            00002-00003               2           2
-                         000ED-00FFF             100
-        IDLOC            08000-08003               4           2
-        RAM              00020-0006F              50           1
-                         000A0-000EF              50
-                         00120-0016F              50
-        SFR0             00000-0001F              20           1
-        SFR1             00080-0009F              20           1
-        SFR10            00500-0056F              70           1
-        SFR11            00580-005EF              70           1
-        SFR12            00600-0066F              70           1
-        SFR13            00680-006EF              70           1
-        SFR14            00700-0076F              70           1
-        SFR15            00780-007EF              70           1
-        SFR16            00800-0086F              70           1
-        SFR17            00880-008EF              70           1
-        SFR18            00900-0096F              70           1
-        SFR19            00980-009EF              70           1
-        SFR2             00100-0011F              20           1
-        SFR20            00A00-00A6F              70           1
-        SFR21            00A80-00AEF              70           1
-        SFR22            00B00-00B6F              70           1
-        SFR23            00B80-00BEF              70           1
-        SFR24            00C00-00C6F              70           1
-        SFR25            00C80-00CEF              70           1
-        SFR26            00D00-00D6F              70           1
-        SFR27            00D80-00DEF              70           1
-        SFR28            00E00-00E6F              70           1
-        SFR29            00E80-00EEF              70           1
-        SFR3             00180-0019F              20           1
-        SFR30            00F00-00F6F              70           1
-        SFR31            00F80-00FEF              70           1
-        SFR4             00200-0021F              20           1
-        SFR5             00280-0029F              20           1
-        SFR6             00300-0031F              20           1
-        SFR7             00380-003EF              70           1
-        SFR8             00400-0046F              70           1
-        SFR9             00480-004EF              70           1
-        STACK            02000-020EF              F0           1
-        STRCODE          00002-00003               2           2
-                         000ED-00FFF             F13
-        STRING           00002-00003               2           2
-                         000ED-00FFF             100
-
-                                  Symbol Table
-
-_ADCON0bits              (abs)        0009D
-_ADCON1bits              (abs)        0009E
-_ADCON2bits              (abs)        0009F
-_ADRESH                  (abs)        0009C
-_ANSELA                  (abs)        0018C
-_ANSELAbits              (abs)        0018C
-_ANSELC                  (abs)        0018E
-_GIE                     (abs)        0005F
-_INTCONbits              (abs)        0000B
-_LATAbits                (abs)        0010C
-_OPA2CONbits             (abs)        00515
-_OPTION_REGbits          (abs)        00095
-_OSCCONbits              (abs)        00099
-_OSCSTATbits             (abs)        0009A
-_PIE1bits                (abs)        00091
-_PIR1bits                (abs)        00011
-_PPSLOCK                 (abs)        00E0F
-_RA5PPSbits              (abs)        00E95
-_SLRCONAbits             (abs)        0030C
-_SSP1BUF                 (abs)        00211
-_SSP1CON1bits            (abs)        00215